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authorAndy Fleming <afleming@freescale.com>2005-10-28 20:46:27 -0400
committerPaul Mackerras <paulus@samba.org>2005-10-29 00:42:28 -0400
commitb37665e0ba1d3f05697bfae249b09a2e9cc95132 (patch)
tree22c80609e3254524038d5b690f1f886b0987f58d /include/asm-ppc/mpc85xx.h
parentdd03d25fac90ee6f394874fb4e6995866304e4ba (diff)
[PATCH] ppc32: 85xx PHY Platform Update
This patch updates the 85xx platform code to support the new PHY Layer. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <Kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-ppc/mpc85xx.h')
-rw-r--r--include/asm-ppc/mpc85xx.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
index 516984ee14b5..d98db980cd49 100644
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -67,6 +67,8 @@ extern unsigned char __res[];
67#define MPC85xx_DMA3_SIZE (0x00080) 67#define MPC85xx_DMA3_SIZE (0x00080)
68#define MPC85xx_ENET1_OFFSET (0x24000) 68#define MPC85xx_ENET1_OFFSET (0x24000)
69#define MPC85xx_ENET1_SIZE (0x01000) 69#define MPC85xx_ENET1_SIZE (0x01000)
70#define MPC85xx_MIIM_OFFSET (0x24520)
71#define MPC85xx_MIIM_SIZE (0x00018)
70#define MPC85xx_ENET2_OFFSET (0x25000) 72#define MPC85xx_ENET2_OFFSET (0x25000)
71#define MPC85xx_ENET2_SIZE (0x01000) 73#define MPC85xx_ENET2_SIZE (0x01000)
72#define MPC85xx_ENET3_OFFSET (0x26000) 74#define MPC85xx_ENET3_OFFSET (0x26000)
@@ -132,6 +134,7 @@ enum ppc_sys_devices {
132 MPC85xx_eTSEC3, 134 MPC85xx_eTSEC3,
133 MPC85xx_eTSEC4, 135 MPC85xx_eTSEC4,
134 MPC85xx_IIC2, 136 MPC85xx_IIC2,
137 MPC85xx_MDIO,
135}; 138};
136 139
137/* Internal interrupts are all Level Sensitive, and Positive Polarity */ 140/* Internal interrupts are all Level Sensitive, and Positive Polarity */