diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2008-01-25 16:41:00 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2008-01-28 09:33:09 -0500 |
commit | 3155f7f23f7865e64f7eb14e226a2dff8197e51f (patch) | |
tree | 1ab72855399616a248c967a15b6a2801a751f2d5 /include/asm-ppc/mpc83xx.h | |
parent | 80f4ec7f5b81e7e238acfaf50ac82489b5fcee6f (diff) |
[PPC] Remove 83xx from arch/ppc
83xx exists in arch/powerpc as well as cuImage support to boot from
a u-boot that doesn't support device trees.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-ppc/mpc83xx.h')
-rw-r--r-- | include/asm-ppc/mpc83xx.h | 107 |
1 files changed, 0 insertions, 107 deletions
diff --git a/include/asm-ppc/mpc83xx.h b/include/asm-ppc/mpc83xx.h deleted file mode 100644 index c3061972309b..000000000000 --- a/include/asm-ppc/mpc83xx.h +++ /dev/null | |||
@@ -1,107 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-ppc/mpc83xx.h | ||
3 | * | ||
4 | * MPC83xx definitions | ||
5 | * | ||
6 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | ||
7 | * | ||
8 | * Copyright 2005 Freescale Semiconductor, Inc | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #ifdef __KERNEL__ | ||
17 | #ifndef __ASM_MPC83xx_H__ | ||
18 | #define __ASM_MPC83xx_H__ | ||
19 | |||
20 | #include <asm/mmu.h> | ||
21 | |||
22 | #ifdef CONFIG_83xx | ||
23 | |||
24 | #ifdef CONFIG_MPC834x_SYS | ||
25 | #include <platforms/83xx/mpc834x_sys.h> | ||
26 | #endif | ||
27 | |||
28 | /* | ||
29 | * The "residual" board information structure the boot loader passes | ||
30 | * into the kernel. | ||
31 | */ | ||
32 | extern unsigned char __res[]; | ||
33 | |||
34 | /* Internal IRQs on MPC83xx OpenPIC */ | ||
35 | /* Not all of these exist on all MPC83xx implementations */ | ||
36 | |||
37 | #ifndef MPC83xx_IPIC_IRQ_OFFSET | ||
38 | #define MPC83xx_IPIC_IRQ_OFFSET 0 | ||
39 | #endif | ||
40 | |||
41 | #define NR_IPIC_INTS 128 | ||
42 | |||
43 | #define MPC83xx_IRQ_UART1 ( 9 + MPC83xx_IPIC_IRQ_OFFSET) | ||
44 | #define MPC83xx_IRQ_UART2 (10 + MPC83xx_IPIC_IRQ_OFFSET) | ||
45 | #define MPC83xx_IRQ_SEC2 (11 + MPC83xx_IPIC_IRQ_OFFSET) | ||
46 | #define MPC83xx_IRQ_IIC1 (14 + MPC83xx_IPIC_IRQ_OFFSET) | ||
47 | #define MPC83xx_IRQ_IIC2 (15 + MPC83xx_IPIC_IRQ_OFFSET) | ||
48 | #define MPC83xx_IRQ_SPI (16 + MPC83xx_IPIC_IRQ_OFFSET) | ||
49 | #define MPC83xx_IRQ_EXT1 (17 + MPC83xx_IPIC_IRQ_OFFSET) | ||
50 | #define MPC83xx_IRQ_EXT2 (18 + MPC83xx_IPIC_IRQ_OFFSET) | ||
51 | #define MPC83xx_IRQ_EXT3 (19 + MPC83xx_IPIC_IRQ_OFFSET) | ||
52 | #define MPC83xx_IRQ_EXT4 (20 + MPC83xx_IPIC_IRQ_OFFSET) | ||
53 | #define MPC83xx_IRQ_EXT5 (21 + MPC83xx_IPIC_IRQ_OFFSET) | ||
54 | #define MPC83xx_IRQ_EXT6 (22 + MPC83xx_IPIC_IRQ_OFFSET) | ||
55 | #define MPC83xx_IRQ_EXT7 (23 + MPC83xx_IPIC_IRQ_OFFSET) | ||
56 | #define MPC83xx_IRQ_TSEC1_TX (32 + MPC83xx_IPIC_IRQ_OFFSET) | ||
57 | #define MPC83xx_IRQ_TSEC1_RX (33 + MPC83xx_IPIC_IRQ_OFFSET) | ||
58 | #define MPC83xx_IRQ_TSEC1_ERROR (34 + MPC83xx_IPIC_IRQ_OFFSET) | ||
59 | #define MPC83xx_IRQ_TSEC2_TX (35 + MPC83xx_IPIC_IRQ_OFFSET) | ||
60 | #define MPC83xx_IRQ_TSEC2_RX (36 + MPC83xx_IPIC_IRQ_OFFSET) | ||
61 | #define MPC83xx_IRQ_TSEC2_ERROR (37 + MPC83xx_IPIC_IRQ_OFFSET) | ||
62 | #define MPC83xx_IRQ_USB2_DR (38 + MPC83xx_IPIC_IRQ_OFFSET) | ||
63 | #define MPC83xx_IRQ_USB2_MPH (39 + MPC83xx_IPIC_IRQ_OFFSET) | ||
64 | #define MPC83xx_IRQ_EXT0 (48 + MPC83xx_IPIC_IRQ_OFFSET) | ||
65 | #define MPC83xx_IRQ_RTC_SEC (64 + MPC83xx_IPIC_IRQ_OFFSET) | ||
66 | #define MPC83xx_IRQ_PIT (65 + MPC83xx_IPIC_IRQ_OFFSET) | ||
67 | #define MPC83xx_IRQ_PCI1 (66 + MPC83xx_IPIC_IRQ_OFFSET) | ||
68 | #define MPC83xx_IRQ_PCI2 (67 + MPC83xx_IPIC_IRQ_OFFSET) | ||
69 | #define MPC83xx_IRQ_RTC_ALR (68 + MPC83xx_IPIC_IRQ_OFFSET) | ||
70 | #define MPC83xx_IRQ_MU (69 + MPC83xx_IPIC_IRQ_OFFSET) | ||
71 | #define MPC83xx_IRQ_SBA (70 + MPC83xx_IPIC_IRQ_OFFSET) | ||
72 | #define MPC83xx_IRQ_DMA (71 + MPC83xx_IPIC_IRQ_OFFSET) | ||
73 | #define MPC83xx_IRQ_GTM4 (72 + MPC83xx_IPIC_IRQ_OFFSET) | ||
74 | #define MPC83xx_IRQ_GTM8 (73 + MPC83xx_IPIC_IRQ_OFFSET) | ||
75 | #define MPC83xx_IRQ_GPIO1 (74 + MPC83xx_IPIC_IRQ_OFFSET) | ||
76 | #define MPC83xx_IRQ_GPIO2 (75 + MPC83xx_IPIC_IRQ_OFFSET) | ||
77 | #define MPC83xx_IRQ_DDR (76 + MPC83xx_IPIC_IRQ_OFFSET) | ||
78 | #define MPC83xx_IRQ_LBC (77 + MPC83xx_IPIC_IRQ_OFFSET) | ||
79 | #define MPC83xx_IRQ_GTM2 (78 + MPC83xx_IPIC_IRQ_OFFSET) | ||
80 | #define MPC83xx_IRQ_GTM6 (79 + MPC83xx_IPIC_IRQ_OFFSET) | ||
81 | #define MPC83xx_IRQ_PMC (80 + MPC83xx_IPIC_IRQ_OFFSET) | ||
82 | #define MPC83xx_IRQ_GTM3 (84 + MPC83xx_IPIC_IRQ_OFFSET) | ||
83 | #define MPC83xx_IRQ_GTM7 (85 + MPC83xx_IPIC_IRQ_OFFSET) | ||
84 | #define MPC83xx_IRQ_GTM1 (90 + MPC83xx_IPIC_IRQ_OFFSET) | ||
85 | #define MPC83xx_IRQ_GTM5 (91 + MPC83xx_IPIC_IRQ_OFFSET) | ||
86 | |||
87 | #define MPC83xx_CCSRBAR_SIZE (1024*1024) | ||
88 | |||
89 | /* Let modules/drivers get at immrbar (physical) */ | ||
90 | extern phys_addr_t immrbar; | ||
91 | |||
92 | enum ppc_sys_devices { | ||
93 | MPC83xx_TSEC1, | ||
94 | MPC83xx_TSEC2, | ||
95 | MPC83xx_IIC1, | ||
96 | MPC83xx_IIC2, | ||
97 | MPC83xx_DUART, | ||
98 | MPC83xx_SEC2, | ||
99 | MPC83xx_USB2_DR, | ||
100 | MPC83xx_USB2_MPH, | ||
101 | MPC83xx_MDIO, | ||
102 | NUM_PPC_SYS_DEVS, | ||
103 | }; | ||
104 | |||
105 | #endif /* CONFIG_83xx */ | ||
106 | #endif /* __ASM_MPC83xx_H__ */ | ||
107 | #endif /* __KERNEL__ */ | ||