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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-23 01:11:30 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-23 01:11:30 -0400 |
commit | 45c091bb2d453ce4a8b06cf19872ec7a77fc4799 (patch) | |
tree | 06fb2e05518ebfba163f8424e028e7faf5672d66 /include/asm-ppc/mmu.h | |
parent | d588fcbe5a7ba8bba2cebf7799ab2d573717a806 (diff) | |
parent | 2191fe3e39159e3375f4b7ec1420df149f154101 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (139 commits)
[POWERPC] re-enable OProfile for iSeries, using timer interrupt
[POWERPC] support ibm,extended-*-frequency properties
[POWERPC] Extra sanity check in EEH code
[POWERPC] Dont look for class-code in pci children
[POWERPC] Fix mdelay badness on shared processor partitions
[POWERPC] disable floating point exceptions for init
[POWERPC] Unify ppc syscall tables
[POWERPC] mpic: add support for serial mode interrupts
[POWERPC] pseries: Print PCI slot location code on failure
[POWERPC] spufs: one more fix for 64k pages
[POWERPC] spufs: fail spu_create with invalid flags
[POWERPC] spufs: clear class2 interrupt status before wakeup
[POWERPC] spufs: fix Makefile for "make clean"
[POWERPC] spufs: remove stop_code from struct spu
[POWERPC] spufs: fix spu irq affinity setting
[POWERPC] spufs: further abstract priv1 register access
[POWERPC] spufs: split the Cell BE support into generic and platform dependant parts
[POWERPC] spufs: dont try to access SPE channel 1 count
[POWERPC] spufs: use kzalloc in create_spu
[POWERPC] spufs: fix initial state of wbox file
...
Manually resolved conflicts in:
drivers/net/phy/Makefile
include/asm-powerpc/spu.h
Diffstat (limited to 'include/asm-ppc/mmu.h')
-rw-r--r-- | include/asm-ppc/mmu.h | 23 |
1 files changed, 4 insertions, 19 deletions
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 0a70b05b3afb..14584e505ed5 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h | |||
@@ -23,25 +23,18 @@ extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t); | |||
23 | #define PHYS_FMT "%16Lx" | 23 | #define PHYS_FMT "%16Lx" |
24 | #endif | 24 | #endif |
25 | 25 | ||
26 | /* Default "unsigned long" context */ | 26 | typedef struct { |
27 | typedef unsigned long mm_context_t; | 27 | unsigned long id; |
28 | unsigned long vdso_base; | ||
29 | } mm_context_t; | ||
28 | 30 | ||
29 | /* Hardware Page Table Entry */ | 31 | /* Hardware Page Table Entry */ |
30 | typedef struct _PTE { | 32 | typedef struct _PTE { |
31 | #ifdef CONFIG_PPC64BRIDGE | ||
32 | unsigned long long vsid:52; | ||
33 | unsigned long api:5; | ||
34 | unsigned long :5; | ||
35 | unsigned long h:1; | ||
36 | unsigned long v:1; | ||
37 | unsigned long long rpn:52; | ||
38 | #else /* CONFIG_PPC64BRIDGE */ | ||
39 | unsigned long v:1; /* Entry is valid */ | 33 | unsigned long v:1; /* Entry is valid */ |
40 | unsigned long vsid:24; /* Virtual segment identifier */ | 34 | unsigned long vsid:24; /* Virtual segment identifier */ |
41 | unsigned long h:1; /* Hash algorithm indicator */ | 35 | unsigned long h:1; /* Hash algorithm indicator */ |
42 | unsigned long api:6; /* Abbreviated page index */ | 36 | unsigned long api:6; /* Abbreviated page index */ |
43 | unsigned long rpn:20; /* Real (physical) page number */ | 37 | unsigned long rpn:20; /* Real (physical) page number */ |
44 | #endif /* CONFIG_PPC64BRIDGE */ | ||
45 | unsigned long :3; /* Unused */ | 38 | unsigned long :3; /* Unused */ |
46 | unsigned long r:1; /* Referenced */ | 39 | unsigned long r:1; /* Referenced */ |
47 | unsigned long c:1; /* Changed */ | 40 | unsigned long c:1; /* Changed */ |
@@ -82,11 +75,7 @@ typedef struct _P601_BATU { /* Upper part of BAT for 601 processor */ | |||
82 | } P601_BATU; | 75 | } P601_BATU; |
83 | 76 | ||
84 | typedef struct _BATU { /* Upper part of BAT (all except 601) */ | 77 | typedef struct _BATU { /* Upper part of BAT (all except 601) */ |
85 | #ifdef CONFIG_PPC64BRIDGE | ||
86 | unsigned long long bepi:47; | ||
87 | #else /* CONFIG_PPC64BRIDGE */ | ||
88 | unsigned long bepi:15; /* Effective page index (virtual address) */ | 78 | unsigned long bepi:15; /* Effective page index (virtual address) */ |
89 | #endif /* CONFIG_PPC64BRIDGE */ | ||
90 | unsigned long :4; /* Unused */ | 79 | unsigned long :4; /* Unused */ |
91 | unsigned long bl:11; /* Block size mask */ | 80 | unsigned long bl:11; /* Block size mask */ |
92 | unsigned long vs:1; /* Supervisor valid */ | 81 | unsigned long vs:1; /* Supervisor valid */ |
@@ -101,11 +90,7 @@ typedef struct _P601_BATL { /* Lower part of BAT for 601 processor */ | |||
101 | } P601_BATL; | 90 | } P601_BATL; |
102 | 91 | ||
103 | typedef struct _BATL { /* Lower part of BAT (all except 601) */ | 92 | typedef struct _BATL { /* Lower part of BAT (all except 601) */ |
104 | #ifdef CONFIG_PPC64BRIDGE | ||
105 | unsigned long long brpn:47; | ||
106 | #else /* CONFIG_PPC64BRIDGE */ | ||
107 | unsigned long brpn:15; /* Real page index (physical address) */ | 93 | unsigned long brpn:15; /* Real page index (physical address) */ |
108 | #endif /* CONFIG_PPC64BRIDGE */ | ||
109 | unsigned long :10; /* Unused */ | 94 | unsigned long :10; /* Unused */ |
110 | unsigned long w:1; /* Write-thru cache */ | 95 | unsigned long w:1; /* Write-thru cache */ |
111 | unsigned long i:1; /* Cache inhibit */ | 96 | unsigned long i:1; /* Cache inhibit */ |