diff options
author | Adrian Bunk <bunk@stusta.de> | 2007-01-14 04:15:00 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-01-24 05:13:58 -0500 |
commit | c53653130f2868e44c6e8346d110d27d39e7d07b (patch) | |
tree | 291a9d53bf37c814af3724a6e026e899f6c814ad /include/asm-ppc/m48t35.h | |
parent | cfcd1705b61ecce1ab102b9593cf733fef314a19 (diff) |
[POWERPC] Remove the broken Gemini support
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-ppc/m48t35.h')
-rw-r--r-- | include/asm-ppc/m48t35.h | 77 |
1 files changed, 0 insertions, 77 deletions
diff --git a/include/asm-ppc/m48t35.h b/include/asm-ppc/m48t35.h deleted file mode 100644 index a5277ea4b194..000000000000 --- a/include/asm-ppc/m48t35.h +++ /dev/null | |||
@@ -1,77 +0,0 @@ | |||
1 | /* | ||
2 | * Registers for the SGS-Thomson M48T35 Timekeeper RAM chip | ||
3 | * and | ||
4 | * Registers for the SGS-Thomson M48T37 Timekeeper RAM chip | ||
5 | * The 37 is the 35 plus alarm and century thus the offsets | ||
6 | * are shifted by the extra registers. | ||
7 | */ | ||
8 | |||
9 | #ifndef __PPC_M48T35_H | ||
10 | #define __PPC_M48T35_H | ||
11 | |||
12 | /* RTC offsets */ | ||
13 | #define M48T35_RTC_FLAGS (-8) /* the negative regs are really T37 only */ | ||
14 | #define M48T35_RTC_CENTURY (-7) | ||
15 | #define M48T35_RTC_AL_SEC (-6) | ||
16 | #define M48T35_RTC_AL_MIN (-5) | ||
17 | #define M48T35_RTC_AL_HRS (-4) | ||
18 | #define M48T35_RTC_AL_DOM (-3) | ||
19 | #define M48T35_RTC_INTERRUPT (-2) | ||
20 | #define M48T35_RTC_WATCHDOG (-1) | ||
21 | #define M48T35_RTC_CONTROL 0 /* T35 starts here */ | ||
22 | #define M48T35_RTC_SECONDS 1 | ||
23 | #define M48T35_RTC_MINUTES 2 | ||
24 | #define M48T35_RTC_HOURS 3 | ||
25 | #define M48T35_RTC_DAY 4 | ||
26 | #define M48T35_RTC_DOM 5 | ||
27 | #define M48T35_RTC_MONTH 6 | ||
28 | #define M48T35_RTC_YEAR 7 | ||
29 | |||
30 | /* this way help us know which bits go with which regs */ | ||
31 | #define M48T35_RTC_FLAGS_BL 0x10 | ||
32 | #define M48T35_RTC_FLAGS_AF 0x40 | ||
33 | #define M48T35_RTC_FLAGS_WDF 0x80 | ||
34 | |||
35 | #define M48T35_RTC_INTERRUPT_AFE 0x80 | ||
36 | #define M48T35_RTC_INTERRUPT_ABE 0x20 | ||
37 | #define M48T35_RTC_INTERRUPT_ALL (M48T35_RTC_INTERRUPT_AFE|M48T35_RTC_INTERRUPT_ABE) | ||
38 | |||
39 | #define M48T35_RTC_WATCHDOG_RB 0x03 | ||
40 | #define M48T35_RTC_WATCHDOG_BMB 0x7c | ||
41 | #define M48T35_RTC_WATCHDOG_WDS 0x80 | ||
42 | #define M48T35_RTC_WATCHDOG_ALL (M48T35_RTC_WATCHDOG_RB|M48T35_RTC_WATCHDOG_BMB|M48T35_RTC_W) | ||
43 | |||
44 | #define M48T35_RTC_CONTROL_WRITE 0x80 | ||
45 | #define M48T35_RTC_CONTROL_READ 0x40 | ||
46 | #define M48T35_RTC_CONTROL_CAL_SIGN 0x20 | ||
47 | #define M48T35_RTC_CONTROL_CAL_VALUE 0x1f | ||
48 | #define M48T35_RTC_CONTROL_LOCKED (M48T35_RTC_WRITE|M48T35_RTC_READ) | ||
49 | #define M48T35_RTC_CONTROL_CALIBRATION (M48T35_RTC_CONTROL_CAL_SIGN|M48T35_RTC_CONTROL_CAL_VALUE) | ||
50 | |||
51 | #define M48T35_RTC_SECONDS_SEC_1 0x0f | ||
52 | #define M48T35_RTC_SECONDS_SEC_10 0x70 | ||
53 | #define M48T35_RTC_SECONDS_ST 0x80 | ||
54 | #define M48T35_RTC_SECONDS_SEC_ALL (M48T35_RTC_SECONDS_SEC_1|M48T35_RTC_SECONDS_SEC_10) | ||
55 | |||
56 | #define M48T35_RTC_MINUTES_MIN_1 0x0f | ||
57 | #define M48T35_RTC_MINUTES_MIN_10 0x70 | ||
58 | #define M48T35_RTC_MINUTES_MIN_ALL (M48T35_RTC_MINUTES_MIN_1|M48T35_RTC_MINUTES_MIN_10) | ||
59 | |||
60 | #define M48T35_RTC_HOURS_HRS_1 0x0f | ||
61 | #define M48T35_RTC_HOURS_HRS_10 0x30 | ||
62 | #define M48T35_RTC_HOURS_HRS_ALL (M48T35_RTC_HOURS_HRS_1|M48T35_RTC_HOURS_HRS_10) | ||
63 | |||
64 | #define M48T35_RTC_DAY_DAY_1 0x03 | ||
65 | #define M48T35_RTC_DAY_FT 0x40 | ||
66 | |||
67 | #define M48T35_RTC_ALARM_OFF 0x00 | ||
68 | #define M48T35_RTC_WATCHDOG_OFF 0x00 | ||
69 | |||
70 | |||
71 | /* legacy */ | ||
72 | #define M48T35_RTC_SET 0x80 | ||
73 | #define M48T35_RTC_STOPPED 0x80 | ||
74 | #define M48T35_RTC_READ 0x40 | ||
75 | |||
76 | |||
77 | #endif | ||