diff options
| author | Jeff Garzik <jgarzik@pobox.com> | 2005-09-21 22:34:08 -0400 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-09-21 22:34:08 -0400 |
| commit | a3536c839f04682ed06c84a7f75968c27c6108c8 (patch) | |
| tree | 92c26ea74c0ffb9b83a2285ad2539cc271b09856 /include/asm-ppc/irq.h | |
| parent | a33a1982012e9070736e3717231714dc9892303b (diff) | |
| parent | efb0372bbaf5b829ff8c39db372779928af542a7 (diff) | |
Merge /spare/repo/linux-2.6/
Diffstat (limited to 'include/asm-ppc/irq.h')
| -rw-r--r-- | include/asm-ppc/irq.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h index 55752474d0d9..bd9674807f05 100644 --- a/include/asm-ppc/irq.h +++ b/include/asm-ppc/irq.h | |||
| @@ -138,6 +138,16 @@ irq_canonicalize(int irq) | |||
| 138 | #define SIU_IRQ7 (14) | 138 | #define SIU_IRQ7 (14) |
| 139 | #define SIU_LEVEL7 (15) | 139 | #define SIU_LEVEL7 (15) |
| 140 | 140 | ||
| 141 | #define MPC8xx_INT_FEC1 SIU_LEVEL1 | ||
| 142 | #define MPC8xx_INT_FEC2 SIU_LEVEL3 | ||
| 143 | |||
| 144 | #define MPC8xx_INT_SCC1 (CPM_IRQ_OFFSET + CPMVEC_SCC1) | ||
| 145 | #define MPC8xx_INT_SCC2 (CPM_IRQ_OFFSET + CPMVEC_SCC2) | ||
| 146 | #define MPC8xx_INT_SCC3 (CPM_IRQ_OFFSET + CPMVEC_SCC3) | ||
| 147 | #define MPC8xx_INT_SCC4 (CPM_IRQ_OFFSET + CPMVEC_SCC4) | ||
| 148 | #define MPC8xx_INT_SMC1 (CPM_IRQ_OFFSET + CPMVEC_SMC1) | ||
| 149 | #define MPC8xx_INT_SMC2 (CPM_IRQ_OFFSET + CPMVEC_SMC2) | ||
| 150 | |||
| 141 | /* The internal interrupts we can configure as we see fit. | 151 | /* The internal interrupts we can configure as we see fit. |
| 142 | * My personal preference is CPM at level 2, which puts it above the | 152 | * My personal preference is CPM at level 2, which puts it above the |
| 143 | * MBX PCI/ISA/IDE interrupts. | 153 | * MBX PCI/ISA/IDE interrupts. |