diff options
| author | Kumar Gala <galak@freescale.com> | 2005-06-21 20:15:18 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-06-21 21:46:23 -0400 |
| commit | 5b37b700f7c491a9320f4e29472bbaf23dded8fd (patch) | |
| tree | e8a77c322bec5e75f0524c99f3be61645560b3c3 /include/asm-ppc/irq.h | |
| parent | da3caa204ca40c32dcb751ebead2a6835b83e8d1 (diff) | |
[PATCH] ppc32: Added support for new MPC8548 family of PowerQUICC III processors
Added descriptions of the new MPC8548 family processors, e500 core and
peripherals.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-ppc/irq.h')
| -rw-r--r-- | include/asm-ppc/irq.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h index 06b86be61ed1..434fc515ba64 100644 --- a/include/asm-ppc/irq.h +++ b/include/asm-ppc/irq.h | |||
| @@ -223,9 +223,15 @@ static __inline__ int irq_canonicalize(int irq) | |||
| 223 | #define MPC85xx_IRQ_RIO_RX (12 + MPC85xx_OPENPIC_IRQ_OFFSET) | 223 | #define MPC85xx_IRQ_RIO_RX (12 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 224 | #define MPC85xx_IRQ_TSEC1_TX (13 + MPC85xx_OPENPIC_IRQ_OFFSET) | 224 | #define MPC85xx_IRQ_TSEC1_TX (13 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 225 | #define MPC85xx_IRQ_TSEC1_RX (14 + MPC85xx_OPENPIC_IRQ_OFFSET) | 225 | #define MPC85xx_IRQ_TSEC1_RX (14 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 226 | #define MPC85xx_IRQ_TSEC3_TX (15 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 227 | #define MPC85xx_IRQ_TSEC3_RX (16 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 228 | #define MPC85xx_IRQ_TSEC3_ERROR (17 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 226 | #define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET) | 229 | #define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 227 | #define MPC85xx_IRQ_TSEC2_TX (19 + MPC85xx_OPENPIC_IRQ_OFFSET) | 230 | #define MPC85xx_IRQ_TSEC2_TX (19 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 228 | #define MPC85xx_IRQ_TSEC2_RX (20 + MPC85xx_OPENPIC_IRQ_OFFSET) | 231 | #define MPC85xx_IRQ_TSEC2_RX (20 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 232 | #define MPC85xx_IRQ_TSEC4_TX (21 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 233 | #define MPC85xx_IRQ_TSEC4_RX (22 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 234 | #define MPC85xx_IRQ_TSEC4_ERROR (23 + MPC85xx_OPENPIC_IRQ_OFFSET) | ||
| 229 | #define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET) | 235 | #define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 230 | #define MPC85xx_IRQ_FEC (25 + MPC85xx_OPENPIC_IRQ_OFFSET) | 236 | #define MPC85xx_IRQ_FEC (25 + MPC85xx_OPENPIC_IRQ_OFFSET) |
| 231 | #define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET) | 237 | #define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET) |