diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-ppc/heathrow.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-ppc/heathrow.h')
-rw-r--r-- | include/asm-ppc/heathrow.h | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/include/asm-ppc/heathrow.h b/include/asm-ppc/heathrow.h new file mode 100644 index 000000000000..22ac179856b9 --- /dev/null +++ b/include/asm-ppc/heathrow.h | |||
@@ -0,0 +1,62 @@ | |||
1 | /* | ||
2 | * heathrow.h: definitions for using the "Heathrow" I/O controller chip. | ||
3 | * | ||
4 | * Grabbed from Open Firmware definitions on a PowerBook G3 Series | ||
5 | * | ||
6 | * Copyright (C) 1997 Paul Mackerras. | ||
7 | */ | ||
8 | |||
9 | /* Front light color on Yikes/B&W G3. 32 bits */ | ||
10 | #define HEATHROW_FRONT_LIGHT 0x32 /* (set to 0 or 0xffffffff) */ | ||
11 | |||
12 | /* Brightness/contrast (gossamer iMac ?). 8 bits */ | ||
13 | #define HEATHROW_BRIGHTNESS_CNTL 0x32 | ||
14 | #define HEATHROW_CONTRAST_CNTL 0x33 | ||
15 | |||
16 | /* offset from ohare base for feature control register */ | ||
17 | #define HEATHROW_MBCR 0x34 /* Media bay control */ | ||
18 | #define HEATHROW_FCR 0x38 /* Feature control */ | ||
19 | #define HEATHROW_AUX_CNTL_REG 0x3c /* Aux control */ | ||
20 | |||
21 | /* | ||
22 | * Bits in feature control register. | ||
23 | * Bits postfixed with a _N are in inverse logic | ||
24 | */ | ||
25 | #define HRW_SCC_TRANS_EN_N 0x00000001 /* Also controls modem power */ | ||
26 | #define HRW_BAY_POWER_N 0x00000002 | ||
27 | #define HRW_BAY_PCI_ENABLE 0x00000004 | ||
28 | #define HRW_BAY_IDE_ENABLE 0x00000008 | ||
29 | #define HRW_BAY_FLOPPY_ENABLE 0x00000010 | ||
30 | #define HRW_IDE0_ENABLE 0x00000020 | ||
31 | #define HRW_IDE0_RESET_N 0x00000040 | ||
32 | #define HRW_BAY_DEV_MASK 0x0000001c | ||
33 | #define HRW_BAY_RESET_N 0x00000080 | ||
34 | #define HRW_IOBUS_ENABLE 0x00000100 /* Internal IDE ? */ | ||
35 | #define HRW_SCC_ENABLE 0x00000200 | ||
36 | #define HRW_MESH_ENABLE 0x00000400 | ||
37 | #define HRW_SWIM_ENABLE 0x00000800 | ||
38 | #define HRW_SOUND_POWER_N 0x00001000 | ||
39 | #define HRW_SOUND_CLK_ENABLE 0x00002000 | ||
40 | #define HRW_SCCA_IO 0x00004000 | ||
41 | #define HRW_SCCB_IO 0x00008000 | ||
42 | #define HRW_PORT_OR_DESK_VIA_N 0x00010000 /* This one is 0 on PowerBook */ | ||
43 | #define HRW_PWM_MON_ID_N 0x00020000 /* ??? (0) */ | ||
44 | #define HRW_HOOK_MB_CNT_N 0x00040000 /* ??? (0) */ | ||
45 | #define HRW_SWIM_CLONE_FLOPPY 0x00080000 /* ??? (0) */ | ||
46 | #define HRW_AUD_RUN22 0x00100000 /* ??? (1) */ | ||
47 | #define HRW_SCSI_LINK_MODE 0x00200000 /* Read ??? (1) */ | ||
48 | #define HRW_ARB_BYPASS 0x00400000 /* Disable internal PCI arbitrer */ | ||
49 | #define HRW_IDE1_RESET_N 0x00800000 /* Media bay */ | ||
50 | #define HRW_SLOW_SCC_PCLK 0x01000000 /* ??? (0) */ | ||
51 | #define HRW_RESET_SCC 0x02000000 | ||
52 | #define HRW_MFDC_CELL_ENABLE 0x04000000 /* ??? (0) */ | ||
53 | #define HRW_USE_MFDC 0x08000000 /* ??? (0) */ | ||
54 | #define HRW_BMAC_IO_ENABLE 0x60000000 /* two bits, not documented in OF */ | ||
55 | #define HRW_BMAC_RESET 0x80000000 /* not documented in OF */ | ||
56 | |||
57 | /* We OR those features at boot on desktop G3s */ | ||
58 | #define HRW_DEFAULTS (HRW_SCCA_IO | HRW_SCCB_IO | HRW_SCC_ENABLE) | ||
59 | |||
60 | /* Looks like Heathrow has some sort of GPIOs as well... */ | ||
61 | #define HRW_GPIO_MODEM_RESET 0x6d | ||
62 | |||