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authorOlof Johansson <olof@lixom.net>2007-02-04 17:36:53 -0500
committerPaul Mackerras <paulus@samba.org>2007-02-06 22:03:22 -0500
commitc388cfebbf22acd2b6adf757b35e28d4be66ac7c (patch)
treedc367aa9c8dd94dddefad9062bf43ac16dcd1ea6 /include/asm-powerpc
parentf620be99e9355c41693f0c748ba9260f69278ee0 (diff)
[POWERPC] pasemi: SMP timebase sync
Timebase update is simple on PA6T, since global updates can be done from one core by writing to an SPR. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/reg.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 923df6ceaa5c..0d7f0164ed81 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -392,6 +392,12 @@
392#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */ 392#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */
393#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */ 393#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */
394 394
395#define SPRN_TBCTL 0x35f /* PA6T Timebase control register */
396#define TBCTL_FREEZE 0x0000000000000000ull /* Freeze all tbs */
397#define TBCTL_RESTART 0x0000000100000000ull /* Restart all tbs */
398#define TBCTL_UPDATE_UPPER 0x0000000200000000ull /* Set upper 32 bits */
399#define TBCTL_UPDATE_LOWER 0x0000000300000000ull /* Set lower 32 bits */
400
395#ifndef SPRN_SVR 401#ifndef SPRN_SVR
396#define SPRN_SVR 0x11E /* System Version Register */ 402#define SPRN_SVR 0x11E /* System Version Register */
397#endif 403#endif