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authorAnton Vorontsov <avorontsov@ru.mvista.com>2007-10-05 13:47:29 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-10-08 09:38:57 -0400
commitcccd21027c17c27ad275093c22475354b4495814 (patch)
tree75bd9835a6cb7677ddcab7c5091d7ca4e370b345 /include/asm-powerpc
parent55f9ed0f6a3af19b5b5cc633eced658723bd3395 (diff)
[POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading
set_irq_chained_handler overwrites MPIC's handle_irq function (handle_fasteoi_irq) thus MPIC never gets eoi event from the cascaded IRQ. This situation hangs MPIC on MPC8568E. To solve this problem efficiently, QEIC needs pluggable handlers, specific to the underlaying interrupt controller. Patch extends qe_ic_init() function to accept low and high interrupt handlers. To avoid #ifdefs, stack of interrupt handlers specified in the header file and functions are marked 'static inline', thus handlers are compiled-in only if actually used (in the board file). Another option would be to lookup for parent controller and automatically detect handlers (will waste text size because of never used handlers, so this option abolished). qe_ic_init() also changed in regard to support multiplexed high/low lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic() handler implemented appropriately. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/qe_ic.h68
1 files changed, 67 insertions, 1 deletions
diff --git a/include/asm-powerpc/qe_ic.h b/include/asm-powerpc/qe_ic.h
index e386fb7e44b0..a779b2c9eaf1 100644
--- a/include/asm-powerpc/qe_ic.h
+++ b/include/asm-powerpc/qe_ic.h
@@ -56,9 +56,75 @@ enum qe_ic_grp_id {
56 QE_IC_GRP_RISCB /* QE interrupt controller RISC group B */ 56 QE_IC_GRP_RISCB /* QE interrupt controller RISC group B */
57}; 57};
58 58
59void qe_ic_init(struct device_node *node, unsigned int flags); 59void qe_ic_init(struct device_node *node, unsigned int flags,
60 void (*low_handler)(unsigned int irq, struct irq_desc *desc),
61 void (*high_handler)(unsigned int irq, struct irq_desc *desc));
60void qe_ic_set_highest_priority(unsigned int virq, int high); 62void qe_ic_set_highest_priority(unsigned int virq, int high);
61int qe_ic_set_priority(unsigned int virq, unsigned int priority); 63int qe_ic_set_priority(unsigned int virq, unsigned int priority);
62int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high); 64int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high);
63 65
66struct qe_ic;
67unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);
68unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);
69
70static inline void qe_ic_cascade_low_ipic(unsigned int irq,
71 struct irq_desc *desc)
72{
73 struct qe_ic *qe_ic = desc->handler_data;
74 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
75
76 if (cascade_irq != NO_IRQ)
77 generic_handle_irq(cascade_irq);
78}
79
80static inline void qe_ic_cascade_high_ipic(unsigned int irq,
81 struct irq_desc *desc)
82{
83 struct qe_ic *qe_ic = desc->handler_data;
84 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
85
86 if (cascade_irq != NO_IRQ)
87 generic_handle_irq(cascade_irq);
88}
89
90static inline void qe_ic_cascade_low_mpic(unsigned int irq,
91 struct irq_desc *desc)
92{
93 struct qe_ic *qe_ic = desc->handler_data;
94 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
95
96 if (cascade_irq != NO_IRQ)
97 generic_handle_irq(cascade_irq);
98
99 desc->chip->eoi(irq);
100}
101
102static inline void qe_ic_cascade_high_mpic(unsigned int irq,
103 struct irq_desc *desc)
104{
105 struct qe_ic *qe_ic = desc->handler_data;
106 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
107
108 if (cascade_irq != NO_IRQ)
109 generic_handle_irq(cascade_irq);
110
111 desc->chip->eoi(irq);
112}
113
114static inline void qe_ic_cascade_muxed_mpic(unsigned int irq,
115 struct irq_desc *desc)
116{
117 struct qe_ic *qe_ic = desc->handler_data;
118 unsigned int cascade_irq;
119
120 cascade_irq = qe_ic_get_high_irq(qe_ic);
121 if (cascade_irq == NO_IRQ)
122 cascade_irq = qe_ic_get_low_irq(qe_ic);
123
124 if (cascade_irq != NO_IRQ)
125 generic_handle_irq(cascade_irq);
126
127 desc->chip->eoi(irq);
128}
129
64#endif /* _ASM_POWERPC_QE_IC_H */ 130#endif /* _ASM_POWERPC_QE_IC_H */