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authorLinus Torvalds <torvalds@g5.osdl.org>2006-07-03 18:28:34 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-03 18:28:34 -0400
commit912b2539e1e062cec73e2e61448e507f7719bd08 (patch)
tree233807569ee5e0ab3118dd54c0ae9164fec8343e /include/asm-powerpc
parent70b97a7f0b19cf1f2619deb5cc41e8b78c591aa7 (diff)
parent39ab9c212aac48f2744f2fd7722fa639ec048eb7 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: powerpc: add defconfig for Freescale MPC8349E-mITX board powerpc: Add base support for the Freescale MPC8349E-mITX eval board Documentation: correct values in MPC8548E SEC example node [POWERPC] Actually copy over i8259.c to arch/ppc/syslib this time [POWERPC] Add new interrupt mapping core and change platforms to use it [POWERPC] Copy i8259 code back to arch/ppc [POWERPC] New device-tree interrupt parsing code [POWERPC] Use the genirq framework [PATCH] genirq: Allow fasteoi handler to retrigger disabled interrupts [POWERPC] Update the SWIM3 (powermac) floppy driver [POWERPC] Fix error handling in detecting legacy serial ports [POWERPC] Fix booting on Momentum "Apache" board (a Maple derivative) [POWERPC] Fix various offb and BootX-related issues [POWERPC] Add a default config for 32-bit CHRP machines [POWERPC] fix implicit declaration on cell. [POWERPC] change get_property to return void *
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/i8259.h8
-rw-r--r--include/asm-powerpc/irq.h358
-rw-r--r--include/asm-powerpc/machdep.h2
-rw-r--r--include/asm-powerpc/mpic.h67
-rw-r--r--include/asm-powerpc/prom.h98
-rw-r--r--include/asm-powerpc/spu.h1
6 files changed, 436 insertions, 98 deletions
diff --git a/include/asm-powerpc/i8259.h b/include/asm-powerpc/i8259.h
index 0392159e16e4..c80e113052cd 100644
--- a/include/asm-powerpc/i8259.h
+++ b/include/asm-powerpc/i8259.h
@@ -4,11 +4,13 @@
4 4
5#include <linux/irq.h> 5#include <linux/irq.h>
6 6
7extern struct hw_interrupt_type i8259_pic; 7#ifdef CONFIG_PPC_MERGE
8 8extern void i8259_init(struct device_node *node, unsigned long intack_addr);
9extern unsigned int i8259_irq(struct pt_regs *regs);
10#else
9extern void i8259_init(unsigned long intack_addr, int offset); 11extern void i8259_init(unsigned long intack_addr, int offset);
10extern int i8259_irq(struct pt_regs *regs); 12extern int i8259_irq(struct pt_regs *regs);
11extern int i8259_irq_cascade(struct pt_regs *regs, void *unused); 13#endif
12 14
13#endif /* __KERNEL__ */ 15#endif /* __KERNEL__ */
14#endif /* _ASM_POWERPC_I8259_H */ 16#endif /* _ASM_POWERPC_I8259_H */
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index eb5f33e1977a..e05754752028 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -9,26 +9,14 @@
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12#include <linux/config.h>
12#include <linux/threads.h> 13#include <linux/threads.h>
14#include <linux/list.h>
15#include <linux/radix-tree.h>
13 16
14#include <asm/types.h> 17#include <asm/types.h>
15#include <asm/atomic.h> 18#include <asm/atomic.h>
16 19
17/* this number is used when no interrupt has been assigned */
18#define NO_IRQ (-1)
19
20/*
21 * These constants are used for passing information about interrupt
22 * signal polarity and level/edge sensing to the low-level PIC chip
23 * drivers.
24 */
25#define IRQ_SENSE_MASK 0x1
26#define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */
27#define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */
28
29#define IRQ_POLARITY_MASK 0x2
30#define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */
31#define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */
32 20
33#define get_irq_desc(irq) (&irq_desc[(irq)]) 21#define get_irq_desc(irq) (&irq_desc[(irq)])
34 22
@@ -36,50 +24,325 @@
36#define for_each_irq(i) \ 24#define for_each_irq(i) \
37 for ((i) = 0; (i) < NR_IRQS; ++(i)) 25 for ((i) = 0; (i) < NR_IRQS; ++(i))
38 26
39#ifdef CONFIG_PPC64 27extern atomic_t ppc_n_lost_interrupts;
40 28
41/* 29#ifdef CONFIG_PPC_MERGE
42 * Maximum number of interrupt sources that we can handle. 30
31/* This number is used when no interrupt has been assigned */
32#define NO_IRQ (0)
33
34/* This is a special irq number to return from get_irq() to tell that
35 * no interrupt happened _and_ ignore it (don't count it as bad). Some
36 * platforms like iSeries rely on that.
43 */ 37 */
38#define NO_IRQ_IGNORE ((unsigned int)-1)
39
40/* Total number of virq in the platform (make it a CONFIG_* option ? */
44#define NR_IRQS 512 41#define NR_IRQS 512
45 42
46/* Interrupt numbers are virtual in case they are sparsely 43/* Number of irqs reserved for the legacy controller */
47 * distributed by the hardware. 44#define NUM_ISA_INTERRUPTS 16
45
46/* This type is the placeholder for a hardware interrupt number. It has to
47 * be big enough to enclose whatever representation is used by a given
48 * platform.
49 */
50typedef unsigned long irq_hw_number_t;
51
52/* Interrupt controller "host" data structure. This could be defined as a
53 * irq domain controller. That is, it handles the mapping between hardware
54 * and virtual interrupt numbers for a given interrupt domain. The host
55 * structure is generally created by the PIC code for a given PIC instance
56 * (though a host can cover more than one PIC if they have a flat number
57 * model). It's the host callbacks that are responsible for setting the
58 * irq_chip on a given irq_desc after it's been mapped.
59 *
60 * The host code and data structures are fairly agnostic to the fact that
61 * we use an open firmware device-tree. We do have references to struct
62 * device_node in two places: in irq_find_host() to find the host matching
63 * a given interrupt controller node, and of course as an argument to its
64 * counterpart host->ops->match() callback. However, those are treated as
65 * generic pointers by the core and the fact that it's actually a device-node
66 * pointer is purely a convention between callers and implementation. This
67 * code could thus be used on other architectures by replacing those two
68 * by some sort of arch-specific void * "token" used to identify interrupt
69 * controllers.
48 */ 70 */
49extern unsigned int virt_irq_to_real_map[NR_IRQS]; 71struct irq_host;
72struct radix_tree_root;
50 73
51/* The maximum virtual IRQ number that we support. This 74/* Functions below are provided by the host and called whenever a new mapping
52 * can be set by the platform and will be reduced by the 75 * is created or an old mapping is disposed. The host can then proceed to
53 * value of __irq_offset_value. It defaults to and is 76 * whatever internal data structures management is required. It also needs
54 * capped by (NR_IRQS - 1). 77 * to setup the irq_desc when returning from map().
55 */ 78 */
56extern unsigned int virt_irq_max; 79struct irq_host_ops {
80 /* Match an interrupt controller device node to a host, returns
81 * 1 on a match
82 */
83 int (*match)(struct irq_host *h, struct device_node *node);
84
85 /* Create or update a mapping between a virtual irq number and a hw
86 * irq number. This can be called several times for the same mapping
87 * but with different flags, though unmap shall always be called
88 * before the virq->hw mapping is changed.
89 */
90 int (*map)(struct irq_host *h, unsigned int virq,
91 irq_hw_number_t hw, unsigned int flags);
92
93 /* Dispose of such a mapping */
94 void (*unmap)(struct irq_host *h, unsigned int virq);
95
96 /* Translate device-tree interrupt specifier from raw format coming
97 * from the firmware to a irq_hw_number_t (interrupt line number) and
98 * trigger flags that can be passed to irq_create_mapping().
99 * If no translation is provided, raw format is assumed to be one cell
100 * for interrupt line and default sense.
101 */
102 int (*xlate)(struct irq_host *h, struct device_node *ctrler,
103 u32 *intspec, unsigned int intsize,
104 irq_hw_number_t *out_hwirq, unsigned int *out_flags);
105};
106
107struct irq_host {
108 struct list_head link;
109
110 /* type of reverse mapping technique */
111 unsigned int revmap_type;
112#define IRQ_HOST_MAP_LEGACY 0 /* legacy 8259, gets irqs 1..15 */
113#define IRQ_HOST_MAP_NOMAP 1 /* no fast reverse mapping */
114#define IRQ_HOST_MAP_LINEAR 2 /* linear map of interrupts */
115#define IRQ_HOST_MAP_TREE 3 /* radix tree */
116 union {
117 struct {
118 unsigned int size;
119 unsigned int *revmap;
120 } linear;
121 struct radix_tree_root tree;
122 } revmap_data;
123 struct irq_host_ops *ops;
124 void *host_data;
125 irq_hw_number_t inval_irq;
126};
127
128/* The main irq map itself is an array of NR_IRQ entries containing the
129 * associate host and irq number. An entry with a host of NULL is free.
130 * An entry can be allocated if it's free, the allocator always then sets
131 * hwirq first to the host's invalid irq number and then fills ops.
132 */
133struct irq_map_entry {
134 irq_hw_number_t hwirq;
135 struct irq_host *host;
136};
137
138extern struct irq_map_entry irq_map[NR_IRQS];
139
57 140
58/* Create a mapping for a real_irq if it doesn't already exist. 141/***
59 * Return the virtual irq as a convenience. 142 * irq_alloc_host - Allocate a new irq_host data structure
143 * @node: device-tree node of the interrupt controller
144 * @revmap_type: type of reverse mapping to use
145 * @revmap_arg: for IRQ_HOST_MAP_LINEAR linear only: size of the map
146 * @ops: map/unmap host callbacks
147 * @inval_irq: provide a hw number in that host space that is always invalid
148 *
149 * Allocates and initialize and irq_host structure. Note that in the case of
150 * IRQ_HOST_MAP_LEGACY, the map() callback will be called before this returns
151 * for all legacy interrupts except 0 (which is always the invalid irq for
152 * a legacy controller). For a IRQ_HOST_MAP_LINEAR, the map is allocated by
153 * this call as well. For a IRQ_HOST_MAP_TREE, the radix tree will be allocated
154 * later during boot automatically (the reverse mapping will use the slow path
155 * until that happens).
156 */
157extern struct irq_host *irq_alloc_host(unsigned int revmap_type,
158 unsigned int revmap_arg,
159 struct irq_host_ops *ops,
160 irq_hw_number_t inval_irq);
161
162
163/***
164 * irq_find_host - Locates a host for a given device node
165 * @node: device-tree node of the interrupt controller
166 */
167extern struct irq_host *irq_find_host(struct device_node *node);
168
169
170/***
171 * irq_set_default_host - Set a "default" host
172 * @host: default host pointer
173 *
174 * For convenience, it's possible to set a "default" host that will be used
175 * whenever NULL is passed to irq_create_mapping(). It makes life easier for
176 * platforms that want to manipulate a few hard coded interrupt numbers that
177 * aren't properly represented in the device-tree.
178 */
179extern void irq_set_default_host(struct irq_host *host);
180
181
182/***
183 * irq_set_virq_count - Set the maximum number of virt irqs
184 * @count: number of linux virtual irqs, capped with NR_IRQS
185 *
186 * This is mainly for use by platforms like iSeries who want to program
187 * the virtual irq number in the controller to avoid the reverse mapping
188 */
189extern void irq_set_virq_count(unsigned int count);
190
191
192/***
193 * irq_create_mapping - Map a hardware interrupt into linux virq space
194 * @host: host owning this hardware interrupt or NULL for default host
195 * @hwirq: hardware irq number in that host space
196 * @flags: flags passed to the controller. contains the trigger type among
197 * others. Use IRQ_TYPE_* defined in include/linux/irq.h
198 *
199 * Only one mapping per hardware interrupt is permitted. Returns a linux
200 * virq number. The flags can be used to provide sense information to the
201 * controller (typically extracted from the device-tree). If no information
202 * is passed, the controller defaults will apply (for example, xics can only
203 * do edge so flags are irrelevant for some pseries specific irqs).
204 *
205 * The device-tree generally contains the trigger info in an encoding that is
206 * specific to a given type of controller. In that case, you can directly use
207 * host->ops->trigger_xlate() to translate that.
208 *
209 * It is recommended that new PICs that don't have existing OF bindings chose
210 * to use a representation of triggers identical to linux.
211 */
212extern unsigned int irq_create_mapping(struct irq_host *host,
213 irq_hw_number_t hwirq,
214 unsigned int flags);
215
216
217/***
218 * irq_dispose_mapping - Unmap an interrupt
219 * @virq: linux virq number of the interrupt to unmap
220 */
221extern void irq_dispose_mapping(unsigned int virq);
222
223/***
224 * irq_find_mapping - Find a linux virq from an hw irq number.
225 * @host: host owning this hardware interrupt
226 * @hwirq: hardware irq number in that host space
227 *
228 * This is a slow path, for use by generic code. It's expected that an
229 * irq controller implementation directly calls the appropriate low level
230 * mapping function.
60 */ 231 */
61int virt_irq_create_mapping(unsigned int real_irq); 232extern unsigned int irq_find_mapping(struct irq_host *host,
62void virt_irq_init(void); 233 irq_hw_number_t hwirq);
63 234
64static inline unsigned int virt_irq_to_real(unsigned int virt_irq) 235
236/***
237 * irq_radix_revmap - Find a linux virq from a hw irq number.
238 * @host: host owning this hardware interrupt
239 * @hwirq: hardware irq number in that host space
240 *
241 * This is a fast path, for use by irq controller code that uses radix tree
242 * revmaps
243 */
244extern unsigned int irq_radix_revmap(struct irq_host *host,
245 irq_hw_number_t hwirq);
246
247/***
248 * irq_linear_revmap - Find a linux virq from a hw irq number.
249 * @host: host owning this hardware interrupt
250 * @hwirq: hardware irq number in that host space
251 *
252 * This is a fast path, for use by irq controller code that uses linear
253 * revmaps. It does fallback to the slow path if the revmap doesn't exist
254 * yet and will create the revmap entry with appropriate locking
255 */
256
257extern unsigned int irq_linear_revmap(struct irq_host *host,
258 irq_hw_number_t hwirq);
259
260
261
262/***
263 * irq_alloc_virt - Allocate virtual irq numbers
264 * @host: host owning these new virtual irqs
265 * @count: number of consecutive numbers to allocate
266 * @hint: pass a hint number, the allocator will try to use a 1:1 mapping
267 *
268 * This is a low level function that is used internally by irq_create_mapping()
269 * and that can be used by some irq controllers implementations for things
270 * like allocating ranges of numbers for MSIs. The revmaps are left untouched.
271 */
272extern unsigned int irq_alloc_virt(struct irq_host *host,
273 unsigned int count,
274 unsigned int hint);
275
276/***
277 * irq_free_virt - Free virtual irq numbers
278 * @virq: virtual irq number of the first interrupt to free
279 * @count: number of interrupts to free
280 *
281 * This function is the opposite of irq_alloc_virt. It will not clear reverse
282 * maps, this should be done previously by unmap'ing the interrupt. In fact,
283 * all interrupts covered by the range being freed should have been unmapped
284 * prior to calling this.
285 */
286extern void irq_free_virt(unsigned int virq, unsigned int count);
287
288
289/* -- OF helpers -- */
290
291/* irq_create_of_mapping - Map a hardware interrupt into linux virq space
292 * @controller: Device node of the interrupt controller
293 * @inspec: Interrupt specifier from the device-tree
294 * @intsize: Size of the interrupt specifier from the device-tree
295 *
296 * This function is identical to irq_create_mapping except that it takes
297 * as input informations straight from the device-tree (typically the results
298 * of the of_irq_map_*() functions
299 */
300extern unsigned int irq_create_of_mapping(struct device_node *controller,
301 u32 *intspec, unsigned int intsize);
302
303
304/* irq_of_parse_and_map - Parse nad Map an interrupt into linux virq space
305 * @device: Device node of the device whose interrupt is to be mapped
306 * @index: Index of the interrupt to map
307 *
308 * This function is a wrapper that chains of_irq_map_one() and
309 * irq_create_of_mapping() to make things easier to callers
310 */
311extern unsigned int irq_of_parse_and_map(struct device_node *dev, int index);
312
313/* -- End OF helpers -- */
314
315/***
316 * irq_early_init - Init irq remapping subsystem
317 */
318extern void irq_early_init(void);
319
320static __inline__ int irq_canonicalize(int irq)
65{ 321{
66 return virt_irq_to_real_map[virt_irq]; 322 return irq;
67} 323}
68 324
69extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq); 325
326#else /* CONFIG_PPC_MERGE */
327
328/* This number is used when no interrupt has been assigned */
329#define NO_IRQ (-1)
330#define NO_IRQ_IGNORE (-2)
331
70 332
71/* 333/*
72 * List of interrupt controllers. 334 * These constants are used for passing information about interrupt
335 * signal polarity and level/edge sensing to the low-level PIC chip
336 * drivers.
73 */ 337 */
74#define IC_INVALID 0 338#define IRQ_SENSE_MASK 0x1
75#define IC_OPEN_PIC 1 339#define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */
76#define IC_PPC_XIC 2 340#define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */
77#define IC_CELL_PIC 3
78#define IC_ISERIES 4
79 341
80extern u64 ppc64_interrupt_controller; 342#define IRQ_POLARITY_MASK 0x2
343#define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */
344#define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */
81 345
82#else /* 32-bit */
83 346
84#if defined(CONFIG_40x) 347#if defined(CONFIG_40x)
85#include <asm/ibm4xx.h> 348#include <asm/ibm4xx.h>
@@ -512,16 +775,11 @@ extern u64 ppc64_interrupt_controller;
512 775
513#endif /* CONFIG_8260 */ 776#endif /* CONFIG_8260 */
514 777
515#endif 778#endif /* Whatever way too big #ifdef */
516 779
517#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 780#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
518/* pedantic: these are long because they are used with set_bit --RR */ 781/* pedantic: these are long because they are used with set_bit --RR */
519extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; 782extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
520extern atomic_t ppc_n_lost_interrupts;
521
522#define virt_irq_create_mapping(x) (x)
523
524#endif
525 783
526/* 784/*
527 * Because many systems have two overlapping names spaces for 785 * Because many systems have two overlapping names spaces for
@@ -560,6 +818,7 @@ static __inline__ int irq_canonicalize(int irq)
560 irq = 9; 818 irq = 9;
561 return irq; 819 return irq;
562} 820}
821#endif /* CONFIG_PPC_MERGE */
563 822
564extern int distribute_irqs; 823extern int distribute_irqs;
565 824
@@ -579,9 +838,8 @@ extern struct thread_info *softirq_ctx[NR_CPUS];
579 838
580extern void irq_ctx_init(void); 839extern void irq_ctx_init(void);
581extern void call_do_softirq(struct thread_info *tp); 840extern void call_do_softirq(struct thread_info *tp);
582extern int call___do_IRQ(int irq, struct pt_regs *regs, 841extern int call_handle_irq(int irq, void *p1, void *p2,
583 struct thread_info *tp); 842 struct thread_info *tp, void *func);
584
585#else 843#else
586#define irq_ctx_init() 844#define irq_ctx_init()
587 845
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index eba133d149a7..c17c13742401 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -97,7 +97,7 @@ struct machdep_calls {
97 void (*show_percpuinfo)(struct seq_file *m, int i); 97 void (*show_percpuinfo)(struct seq_file *m, int i);
98 98
99 void (*init_IRQ)(void); 99 void (*init_IRQ)(void);
100 int (*get_irq)(struct pt_regs *); 100 unsigned int (*get_irq)(struct pt_regs *);
101#ifdef CONFIG_KEXEC 101#ifdef CONFIG_KEXEC
102 void (*kexec_cpu_down)(int crash_shutdown, int secondary); 102 void (*kexec_cpu_down)(int crash_shutdown, int secondary);
103#endif 103#endif
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index f0d22ac34b96..eb241c99c457 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -114,9 +114,6 @@
114#define MPIC_VEC_TIMER_1 248 114#define MPIC_VEC_TIMER_1 248
115#define MPIC_VEC_TIMER_0 247 115#define MPIC_VEC_TIMER_0 247
116 116
117/* Type definition of the cascade handler */
118typedef int (*mpic_cascade_t)(struct pt_regs *regs, void *data);
119
120#ifdef CONFIG_MPIC_BROKEN_U3 117#ifdef CONFIG_MPIC_BROKEN_U3
121/* Fixup table entry */ 118/* Fixup table entry */
122struct mpic_irq_fixup 119struct mpic_irq_fixup
@@ -132,10 +129,19 @@ struct mpic_irq_fixup
132/* The instance data of a given MPIC */ 129/* The instance data of a given MPIC */
133struct mpic 130struct mpic
134{ 131{
132 /* The device node of the interrupt controller */
133 struct device_node *of_node;
134
135 /* The remapper for this MPIC */
136 struct irq_host *irqhost;
137
135 /* The "linux" controller struct */ 138 /* The "linux" controller struct */
136 hw_irq_controller hc_irq; 139 struct irq_chip hc_irq;
140#ifdef CONFIG_MPIC_BROKEN_U3
141 struct irq_chip hc_ht_irq;
142#endif
137#ifdef CONFIG_SMP 143#ifdef CONFIG_SMP
138 hw_irq_controller hc_ipi; 144 struct irq_chip hc_ipi;
139#endif 145#endif
140 const char *name; 146 const char *name;
141 /* Flags */ 147 /* Flags */
@@ -144,20 +150,12 @@ struct mpic
144 unsigned int isu_size; 150 unsigned int isu_size;
145 unsigned int isu_shift; 151 unsigned int isu_shift;
146 unsigned int isu_mask; 152 unsigned int isu_mask;
147 /* Offset of irq vector numbers */
148 unsigned int irq_offset;
149 unsigned int irq_count; 153 unsigned int irq_count;
150 /* Offset of ipi vector numbers */
151 unsigned int ipi_offset;
152 /* Number of sources */ 154 /* Number of sources */
153 unsigned int num_sources; 155 unsigned int num_sources;
154 /* Number of CPUs */ 156 /* Number of CPUs */
155 unsigned int num_cpus; 157 unsigned int num_cpus;
156 /* cascade handler */ 158 /* default senses array */
157 mpic_cascade_t cascade;
158 void *cascade_data;
159 unsigned int cascade_vec;
160 /* senses array */
161 unsigned char *senses; 159 unsigned char *senses;
162 unsigned int senses_count; 160 unsigned int senses_count;
163 161
@@ -213,14 +211,11 @@ struct mpic
213 * The values in the array start at the first source of the MPIC, 211 * The values in the array start at the first source of the MPIC,
214 * that is senses[0] correspond to linux irq "irq_offset". 212 * that is senses[0] correspond to linux irq "irq_offset".
215 */ 213 */
216extern struct mpic *mpic_alloc(unsigned long phys_addr, 214extern struct mpic *mpic_alloc(struct device_node *node,
215 unsigned long phys_addr,
217 unsigned int flags, 216 unsigned int flags,
218 unsigned int isu_size, 217 unsigned int isu_size,
219 unsigned int irq_offset,
220 unsigned int irq_count, 218 unsigned int irq_count,
221 unsigned int ipi_offset,
222 unsigned char *senses,
223 unsigned int senses_num,
224 const char *name); 219 const char *name);
225 220
226/* Assign ISUs, to call before mpic_init() 221/* Assign ISUs, to call before mpic_init()
@@ -232,22 +227,27 @@ extern struct mpic *mpic_alloc(unsigned long phys_addr,
232extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, 227extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
233 unsigned long phys_addr); 228 unsigned long phys_addr);
234 229
230/* Set default sense codes
231 *
232 * @mpic: controller
233 * @senses: array of sense codes
234 * @count: size of above array
235 *
236 * Optionally provide an array (indexed on hardware interrupt numbers
237 * for this MPIC) of default sense codes for the chip. Those are linux
238 * sense codes IRQ_TYPE_*
239 *
240 * The driver gets ownership of the pointer, don't dispose of it or
241 * anything like that. __init only.
242 */
243extern void mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count);
244
245
235/* Initialize the controller. After this has been called, none of the above 246/* Initialize the controller. After this has been called, none of the above
236 * should be called again for this mpic 247 * should be called again for this mpic
237 */ 248 */
238extern void mpic_init(struct mpic *mpic); 249extern void mpic_init(struct mpic *mpic);
239 250
240/* Setup a cascade. Currently, only one cascade is supported this
241 * way, though you can always do a normal request_irq() and add
242 * other cascades this way. You should call this _after_ having
243 * added all the ISUs
244 *
245 * @irq_no: "linux" irq number of the cascade (that is offset'ed vector)
246 * @handler: cascade handler function
247 */
248extern void mpic_setup_cascade(unsigned int irq_no, mpic_cascade_t hanlder,
249 void *data);
250
251/* 251/*
252 * All of the following functions must only be used after the 252 * All of the following functions must only be used after the
253 * ISUs have been assigned and the controller fully initialized 253 * ISUs have been assigned and the controller fully initialized
@@ -284,9 +284,9 @@ extern void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask);
284void smp_mpic_message_pass(int target, int msg); 284void smp_mpic_message_pass(int target, int msg);
285 285
286/* Fetch interrupt from a given mpic */ 286/* Fetch interrupt from a given mpic */
287extern int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs); 287extern unsigned int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs);
288/* This one gets to the primary mpic */ 288/* This one gets to the primary mpic */
289extern int mpic_get_irq(struct pt_regs *regs); 289extern unsigned int mpic_get_irq(struct pt_regs *regs);
290 290
291/* Set the EPIC clock ratio */ 291/* Set the EPIC clock ratio */
292void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio); 292void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio);
@@ -294,8 +294,5 @@ void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio);
294/* Enable/Disable EPIC serial interrupt mode */ 294/* Enable/Disable EPIC serial interrupt mode */
295void mpic_set_serial_int(struct mpic *mpic, int enable); 295void mpic_set_serial_int(struct mpic *mpic, int enable);
296 296
297/* global mpic for pSeries */
298extern struct mpic *pSeries_mpic;
299
300#endif /* __KERNEL__ */ 297#endif /* __KERNEL__ */
301#endif /* _ASM_POWERPC_MPIC_H */ 298#endif /* _ASM_POWERPC_MPIC_H */
diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h
index 010d186d095b..b095a285c84b 100644
--- a/include/asm-powerpc/prom.h
+++ b/include/asm-powerpc/prom.h
@@ -64,11 +64,6 @@ struct boot_param_header
64typedef u32 phandle; 64typedef u32 phandle;
65typedef u32 ihandle; 65typedef u32 ihandle;
66 66
67struct interrupt_info {
68 int line;
69 int sense; /* +ve/-ve logic, edge or level, etc. */
70};
71
72struct property { 67struct property {
73 char *name; 68 char *name;
74 int length; 69 int length;
@@ -81,8 +76,6 @@ struct device_node {
81 char *type; 76 char *type;
82 phandle node; 77 phandle node;
83 phandle linux_phandle; 78 phandle linux_phandle;
84 int n_intrs;
85 struct interrupt_info *intrs;
86 char *full_name; 79 char *full_name;
87 80
88 struct property *properties; 81 struct property *properties;
@@ -167,8 +160,8 @@ extern void unflatten_device_tree(void);
167extern void early_init_devtree(void *); 160extern void early_init_devtree(void *);
168extern int device_is_compatible(struct device_node *device, const char *); 161extern int device_is_compatible(struct device_node *device, const char *);
169extern int machine_is_compatible(const char *compat); 162extern int machine_is_compatible(const char *compat);
170extern unsigned char *get_property(struct device_node *node, const char *name, 163extern void *get_property(struct device_node *node, const char *name,
171 int *lenp); 164 int *lenp);
172extern void print_properties(struct device_node *node); 165extern void print_properties(struct device_node *node);
173extern int prom_n_addr_cells(struct device_node* np); 166extern int prom_n_addr_cells(struct device_node* np);
174extern int prom_n_size_cells(struct device_node* np); 167extern int prom_n_size_cells(struct device_node* np);
@@ -204,6 +197,15 @@ extern int release_OF_resource(struct device_node* node, int index);
204 */ 197 */
205 198
206 199
200/* Helper to read a big number */
201static inline u64 of_read_number(u32 *cell, int size)
202{
203 u64 r = 0;
204 while (size--)
205 r = (r << 32) | *(cell++);
206 return r;
207}
208
207/* Translate an OF address block into a CPU physical address 209/* Translate an OF address block into a CPU physical address
208 */ 210 */
209#define OF_BAD_ADDR ((u64)-1) 211#define OF_BAD_ADDR ((u64)-1)
@@ -240,5 +242,83 @@ extern void kdump_move_device_tree(void);
240/* CPU OF node matching */ 242/* CPU OF node matching */
241struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); 243struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
242 244
245
246/*
247 * OF interrupt mapping
248 */
249
250/* This structure is returned when an interrupt is mapped. The controller
251 * field needs to be put() after use
252 */
253
254#define OF_MAX_IRQ_SPEC 4 /* We handle specifiers of at most 4 cells */
255
256struct of_irq {
257 struct device_node *controller; /* Interrupt controller node */
258 u32 size; /* Specifier size */
259 u32 specifier[OF_MAX_IRQ_SPEC]; /* Specifier copy */
260};
261
262/***
263 * of_irq_map_init - Initialize the irq remapper
264 * @flags: flags defining workarounds to enable
265 *
266 * Some machines have bugs in the device-tree which require certain workarounds
267 * to be applied. Call this before any interrupt mapping attempts to enable
268 * those workarounds.
269 */
270#define OF_IMAP_OLDWORLD_MAC 0x00000001
271#define OF_IMAP_NO_PHANDLE 0x00000002
272
273extern void of_irq_map_init(unsigned int flags);
274
275/***
276 * of_irq_map_raw - Low level interrupt tree parsing
277 * @parent: the device interrupt parent
278 * @intspec: interrupt specifier ("interrupts" property of the device)
279 * @addr: address specifier (start of "reg" property of the device)
280 * @out_irq: structure of_irq filled by this function
281 *
282 * Returns 0 on success and a negative number on error
283 *
284 * This function is a low-level interrupt tree walking function. It
285 * can be used to do a partial walk with synthetized reg and interrupts
286 * properties, for example when resolving PCI interrupts when no device
287 * node exist for the parent.
288 *
289 */
290
291extern int of_irq_map_raw(struct device_node *parent, u32 *intspec, u32 *addr,
292 struct of_irq *out_irq);
293
294
295/***
296 * of_irq_map_one - Resolve an interrupt for a device
297 * @device: the device whose interrupt is to be resolved
298 * @index: index of the interrupt to resolve
299 * @out_irq: structure of_irq filled by this function
300 *
301 * This function resolves an interrupt, walking the tree, for a given
302 * device-tree node. It's the high level pendant to of_irq_map_raw().
303 * It also implements the workarounds for OldWolrd Macs.
304 */
305extern int of_irq_map_one(struct device_node *device, int index,
306 struct of_irq *out_irq);
307
308/***
309 * of_irq_map_pci - Resolve the interrupt for a PCI device
310 * @pdev: the device whose interrupt is to be resolved
311 * @out_irq: structure of_irq filled by this function
312 *
313 * This function resolves the PCI interrupt for a given PCI device. If a
314 * device-node exists for a given pci_dev, it will use normal OF tree
315 * walking. If not, it will implement standard swizzling and walk up the
316 * PCI tree until an device-node is found, at which point it will finish
317 * resolving using the OF tree walking.
318 */
319struct pci_dev;
320extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
321
322
243#endif /* __KERNEL__ */ 323#endif /* __KERNEL__ */
244#endif /* _POWERPC_PROM_H */ 324#endif /* _POWERPC_PROM_H */
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 9609d3ee8798..c02d105d8294 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -117,6 +117,7 @@ struct spu {
117 struct list_head sched_list; 117 struct list_head sched_list;
118 int number; 118 int number;
119 int nid; 119 int nid;
120 unsigned int irqs[3];
120 u32 isrc; 121 u32 isrc;
121 u32 node; 122 u32 node;
122 u64 flags; 123 u64 flags;