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authorStephen Rothwell <sfr@canb.auug.org.au>2006-01-11 21:50:18 -0500
committerPaul Mackerras <paulus@samba.org>2006-01-12 04:09:30 -0500
commitf9cb83ac1f6c3b794c2706e06546d8fecae60ba5 (patch)
tree144ffdbdec2da220dfa161ac38f4d006d1033aeb /include/asm-powerpc
parent677f8c0d0455a35aaff08a0292ba9c6232ef4eb1 (diff)
[PATCH] powerpc: eliminate bitfields from ItLpNaca
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/iseries/it_lp_naca.h21
1 files changed, 11 insertions, 10 deletions
diff --git a/include/asm-powerpc/iseries/it_lp_naca.h b/include/asm-powerpc/iseries/it_lp_naca.h
index c3ef1de45d82..cc2989950419 100644
--- a/include/asm-powerpc/iseries/it_lp_naca.h
+++ b/include/asm-powerpc/iseries/it_lp_naca.h
@@ -37,17 +37,13 @@ struct ItLpNaca {
37 u8 xLpIndex; // LP Index x0B-x0B 37 u8 xLpIndex; // LP Index x0B-x0B
38 u16 xMaxLpQueues; // Number of allocated queues x0C-x0D 38 u16 xMaxLpQueues; // Number of allocated queues x0C-x0D
39 u16 xLpQueueOffset; // Offset to start of LP queues x0E-x0F 39 u16 xLpQueueOffset; // Offset to start of LP queues x0E-x0F
40 u8 xPirEnvironMode:8; // Piranha or hardware x10-x10 40 u8 xPirEnvironMode; // Piranha or hardware x10-x10
41 u8 xPirConsoleMode:8; // Piranha console indicator x11-x11 41 u8 xPirConsoleMode; // Piranha console indicator x11-x11
42 u8 xPirDasdMode:8; // Piranha dasd indicator x12-x12 42 u8 xPirDasdMode; // Piranha dasd indicator x12-x12
43 u8 xRsvd1_0[5]; // Reserved for Piranha related x13-x17 43 u8 xRsvd1_0[5]; // Reserved for Piranha related x13-x17
44 u8 xLparInstalled:1; // Is LPAR installed on system x18-x1F 44 u8 flags; // flags, see below x18-x1F
45 u8 xSysPartitioned:1; // Is the system partitioned ... 45 u8 xSpVpdFormat; // VPD areas are in CSP format ...
46 u8 xHwSyncedTBs:1; // Hardware synced TBs ... 46 u8 xIntProcRatio; // Ratio of int procs to procs ...
47 u8 xIntProcUtilHmt:1; // Utilize HMT for interrupts ...
48 u8 xRsvd1_1:4; // Reserved ...
49 u8 xSpVpdFormat:8; // VPD areas are in CSP format ...
50 u8 xIntProcRatio:8; // Ratio of int procs to procs ...
51 u8 xRsvd1_2[5]; // Reserved ... 47 u8 xRsvd1_2[5]; // Reserved ...
52 u16 xRsvd1_3; // Reserved x20-x21 48 u16 xRsvd1_3; // Reserved x20-x21
53 u16 xPlicVrmIndex; // VRM index of PLIC x22-x23 49 u16 xPlicVrmIndex; // VRM index of PLIC x22-x23
@@ -77,4 +73,9 @@ struct ItLpNaca {
77 73
78extern struct ItLpNaca itLpNaca; 74extern struct ItLpNaca itLpNaca;
79 75
76#define ITLPNACA_LPAR 0x80 /* Is LPAR installed on the system */
77#define ITLPNACA_PARTITIONED 0x40 /* Is the system partitioned */
78#define ITLPNACA_HWSYNCEDTBS 0x20 /* Hardware synced TBs */
79#define ITLPNACA_HMTINT 0x10 /* Utilize MHT for interrupts */
80
80#endif /* _ASM_POWERPC_ISERIES_IT_LP_NACA_H */ 81#endif /* _ASM_POWERPC_ISERIES_IT_LP_NACA_H */