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authorAnton Blanchard <anton@samba.org>2006-04-28 19:51:06 -0400
committerPaul Mackerras <paulus@samba.org>2006-04-28 20:56:58 -0400
commit03054d51a70e8c273df5d9bc31fea6c843eaa1c3 (patch)
tree44b1b9e52979a0b083edb5169c1ac328abd4c715 /include/asm-powerpc
parent09b03b6c29638eb5c79b02e585cb1b20d91a8ea0 (diff)
[PATCH] powerpc: Add cputable entry for POWER6
Add a cputable entry for the POWER6 processor. The SIHV and SIPR bits in the mmcra have moved in POWER6, so disable support for that until oprofile is fixed. Also tell firmware that we know about POWER6. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/cputable.h14
1 files changed, 10 insertions, 4 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 4321483cce51..9fcf0162d859 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -22,6 +22,7 @@
22#define PPC_FEATURE_BOOKE 0x00008000 22#define PPC_FEATURE_BOOKE 0x00008000
23#define PPC_FEATURE_SMT 0x00004000 23#define PPC_FEATURE_SMT 0x00004000
24#define PPC_FEATURE_ICACHE_SNOOP 0x00002000 24#define PPC_FEATURE_ICACHE_SNOOP 0x00002000
25#define PPC_FEATURE_ARCH_2_05 0x00001000
25 26
26#ifdef __KERNEL__ 27#ifdef __KERNEL__
27#ifndef __ASSEMBLY__ 28#ifndef __ASSEMBLY__
@@ -320,6 +321,11 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
320 CPU_FTR_MMCRA | CPU_FTR_SMT | \ 321 CPU_FTR_MMCRA | CPU_FTR_SMT | \
321 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ 322 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
322 CPU_FTR_MMCRA_SIHV | CPU_FTR_PURR) 323 CPU_FTR_MMCRA_SIHV | CPU_FTR_PURR)
324#define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
325 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
326 CPU_FTR_MMCRA | CPU_FTR_SMT | \
327 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
328 CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE)
323#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ 329#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
324 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ 330 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
325 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ 331 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -331,8 +337,8 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
331#ifdef __powerpc64__ 337#ifdef __powerpc64__
332#define CPU_FTRS_POSSIBLE \ 338#define CPU_FTRS_POSSIBLE \
333 (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ 339 (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
334 CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL | \ 340 CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
335 CPU_FTR_CI_LARGE_PAGE) 341 CPU_FTRS_CELL | CPU_FTR_CI_LARGE_PAGE)
336#else 342#else
337enum { 343enum {
338 CPU_FTRS_POSSIBLE = 344 CPU_FTRS_POSSIBLE =
@@ -376,8 +382,8 @@ enum {
376#ifdef __powerpc64__ 382#ifdef __powerpc64__
377#define CPU_FTRS_ALWAYS \ 383#define CPU_FTRS_ALWAYS \
378 (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ 384 (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
379 CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL & \ 385 CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \
380 CPU_FTRS_POSSIBLE) 386 CPU_FTRS_CELL & CPU_FTRS_POSSIBLE)
381#else 387#else
382enum { 388enum {
383 CPU_FTRS_ALWAYS = 389 CPU_FTRS_ALWAYS =