diff options
author | Kevin Corry <kevcorry@us.ibm.com> | 2006-11-20 12:45:14 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-12-04 04:40:11 -0500 |
commit | e4f6948cfc8b9626022db0f93e7cf2ce5c0998cd (patch) | |
tree | ffc39ea93cbae7bb391678b42958e19252867c44 /include/asm-powerpc | |
parent | c93dfa0766bae3c92ec8311bddbbf16b8e661f59 (diff) |
[POWERPC] cell: Move PMU-related stuff to include/asm-powerpc/cell-pmu.h
Move some PMU-related macros and function prototypes from cbe_regs.h
and pmu.h in arch/powerpc/platforms/cell/ to a new header at
include/asm-powerpc/cell-pmu.h
This is cleaner to use from the oprofile code, since that sits in
arch/powerpc/oprofile, not in the cell platform directory.
Signed-off-by: Kevin Corry <kevcorry@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r-- | include/asm-powerpc/cell-pmu.h | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/include/asm-powerpc/cell-pmu.h b/include/asm-powerpc/cell-pmu.h new file mode 100644 index 000000000000..c416fe30dee2 --- /dev/null +++ b/include/asm-powerpc/cell-pmu.h | |||
@@ -0,0 +1,90 @@ | |||
1 | /* | ||
2 | * Cell Broadband Engine Performance Monitor | ||
3 | * | ||
4 | * (C) Copyright IBM Corporation 2006 | ||
5 | * | ||
6 | * Author: | ||
7 | * David Erb (djerb@us.ibm.com) | ||
8 | * Kevin Corry (kevcorry@us.ibm.com) | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2, or (at your option) | ||
13 | * any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
23 | */ | ||
24 | |||
25 | #ifndef __ASM_CELL_PMU_H__ | ||
26 | #define __ASM_CELL_PMU_H__ | ||
27 | |||
28 | /* The Cell PMU has four hardware performance counters, which can be | ||
29 | * configured as four 32-bit counters or eight 16-bit counters. | ||
30 | */ | ||
31 | #define NR_PHYS_CTRS 4 | ||
32 | #define NR_CTRS (NR_PHYS_CTRS * 2) | ||
33 | |||
34 | /* Macros for the pm_control register. */ | ||
35 | #define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1)))) | ||
36 | #define CBE_PM_ENABLE_PERF_MON 0x80000000 | ||
37 | #define CBE_PM_STOP_AT_MAX 0x40000000 | ||
38 | #define CBE_PM_TRACE_MODE_GET(pm_control) (((pm_control) >> 28) & 0x3) | ||
39 | #define CBE_PM_TRACE_MODE_SET(mode) (((mode) & 0x3) << 28) | ||
40 | #define CBE_PM_COUNT_MODE_SET(count) (((count) & 0x3) << 18) | ||
41 | #define CBE_PM_FREEZE_ALL_CTRS 0x00100000 | ||
42 | #define CBE_PM_ENABLE_EXT_TRACE 0x00008000 | ||
43 | |||
44 | /* Macros for the trace_address register. */ | ||
45 | #define CBE_PM_TRACE_BUF_FULL 0x00000800 | ||
46 | #define CBE_PM_TRACE_BUF_EMPTY 0x00000400 | ||
47 | #define CBE_PM_TRACE_BUF_DATA_COUNT(ta) ((ta) & 0x3ff) | ||
48 | #define CBE_PM_TRACE_BUF_MAX_COUNT 0x400 | ||
49 | |||
50 | /* Macros for the pm07_control registers. */ | ||
51 | #define CBE_PM_CTR_INPUT_MUX(pm07_control) (((pm07_control) >> 26) & 0x3f) | ||
52 | #define CBE_PM_CTR_INPUT_CONTROL 0x02000000 | ||
53 | #define CBE_PM_CTR_POLARITY 0x01000000 | ||
54 | #define CBE_PM_CTR_COUNT_CYCLES 0x00800000 | ||
55 | #define CBE_PM_CTR_ENABLE 0x00400000 | ||
56 | |||
57 | /* Macros for the pm_status register. */ | ||
58 | #define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) | ||
59 | |||
60 | enum pm_reg_name { | ||
61 | group_control, | ||
62 | debug_bus_control, | ||
63 | trace_address, | ||
64 | ext_tr_timer, | ||
65 | pm_status, | ||
66 | pm_control, | ||
67 | pm_interval, | ||
68 | pm_start_stop, | ||
69 | }; | ||
70 | |||
71 | /* Routines for reading/writing the PMU registers. */ | ||
72 | extern u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr); | ||
73 | extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val); | ||
74 | extern u32 cbe_read_ctr(u32 cpu, u32 ctr); | ||
75 | extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val); | ||
76 | |||
77 | extern u32 cbe_read_pm07_control(u32 cpu, u32 ctr); | ||
78 | extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val); | ||
79 | extern u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg); | ||
80 | extern void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val); | ||
81 | |||
82 | extern u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr); | ||
83 | extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size); | ||
84 | |||
85 | extern void cbe_enable_pm(u32 cpu); | ||
86 | extern void cbe_disable_pm(u32 cpu); | ||
87 | |||
88 | extern void cbe_read_trace_buffer(u32 cpu, u64 *buf); | ||
89 | |||
90 | #endif /* __ASM_CELL_PMU_H__ */ | ||