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authorOlof Johansson <olof@lixom.net>2007-12-20 14:11:18 -0500
committerOlof Johansson <olof@lixom.net>2007-12-28 10:22:24 -0500
commitf365355e65ee619e3b7baeca69b46fd2c4a5ec68 (patch)
tree24133f987dc9ffe8f3a9b02355193e3d5113f8f2 /include/asm-powerpc
parentc2a7dcad9f0d92d7a96e735abb8bec7b9c621536 (diff)
[POWERPC] pasemi: Implement NMI support
Some PWRficient-based boards have a NMI button that's wired up to a GPIO as interrupt source. By configuring the openpic accordingly, these get delivered as a machine check with high priority, instead of as an external interrupt. The device tree contains a property "nmi-source" in the openpic node for these systems, and it's the (hwirq) source for the input. Also, for these interrupts, the IACK is read from another register than the regular (MCACK instead), but they are EOI'd as usual. So implement said function for the mpic driver. Finally, move a couple of external function defines to include/ instead of local under sysdev. Being able to mask/unmask and eoi directly saves us from setting up a dummy irq handler that will never be called. Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/mpic.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index ae84dde3bc7f..e7ac8109b6e7 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -23,6 +23,7 @@
23#define MPIC_GREG_GCONF_RESET 0x80000000 23#define MPIC_GREG_GCONF_RESET 0x80000000
24#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 24#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000
25#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff 25#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff
26#define MPIC_GREG_GCONF_MCK 0x08000000
26#define MPIC_GREG_GLOBAL_CONF_1 0x00030 27#define MPIC_GREG_GLOBAL_CONF_1 0x00030
27#define MPIC_GREG_GLOBAL_CONF_1_SIE 0x08000000 28#define MPIC_GREG_GLOBAL_CONF_1_SIE 0x08000000
28#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK 0x70000000 29#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK 0x70000000
@@ -78,6 +79,7 @@
78#define MPIC_CPU_WHOAMI_MASK 0x0000001f 79#define MPIC_CPU_WHOAMI_MASK 0x0000001f
79#define MPIC_CPU_INTACK 0x000a0 80#define MPIC_CPU_INTACK 0x000a0
80#define MPIC_CPU_EOI 0x000b0 81#define MPIC_CPU_EOI 0x000b0
82#define MPIC_CPU_MCACK 0x000c0
81 83
82/* 84/*
83 * Per-source registers 85 * Per-source registers
@@ -141,6 +143,7 @@
141#define TSI108_CPU_WHOAMI 0xffffffff 143#define TSI108_CPU_WHOAMI 0xffffffff
142#define TSI108_CPU_INTACK 0x00004 144#define TSI108_CPU_INTACK 0x00004
143#define TSI108_CPU_EOI 0x00008 145#define TSI108_CPU_EOI 0x00008
146#define TSI108_CPU_MCACK 0x00004 /* Doesn't really exist here */
144 147
145/* 148/*
146 * Per-source registers 149 * Per-source registers
@@ -183,6 +186,7 @@ enum {
183 MPIC_IDX_CPU_WHOAMI, 186 MPIC_IDX_CPU_WHOAMI,
184 MPIC_IDX_CPU_INTACK, 187 MPIC_IDX_CPU_INTACK,
185 MPIC_IDX_CPU_EOI, 188 MPIC_IDX_CPU_EOI,
189 MPIC_IDX_CPU_MCACK,
186 190
187 MPIC_IDX_IRQ_BASE, 191 MPIC_IDX_IRQ_BASE,
188 MPIC_IDX_IRQ_STRIDE, 192 MPIC_IDX_IRQ_STRIDE,
@@ -344,6 +348,8 @@ struct mpic
344#define MPIC_USES_DCR 0x00000080 348#define MPIC_USES_DCR 0x00000080
345/* MPIC has 11-bit vector fields (or larger) */ 349/* MPIC has 11-bit vector fields (or larger) */
346#define MPIC_LARGE_VECTORS 0x00000100 350#define MPIC_LARGE_VECTORS 0x00000100
351/* Enable delivery of prio 15 interrupts as MCK instead of EE */
352#define MPIC_ENABLE_MCK 0x00000200
347 353
348/* MPIC HW modification ID */ 354/* MPIC HW modification ID */
349#define MPIC_REGSET_MASK 0xf0000000 355#define MPIC_REGSET_MASK 0xf0000000
@@ -447,10 +453,19 @@ extern void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask);
447/* Send a message (IPI) to a given target (cpu number or MSG_*) */ 453/* Send a message (IPI) to a given target (cpu number or MSG_*) */
448void smp_mpic_message_pass(int target, int msg); 454void smp_mpic_message_pass(int target, int msg);
449 455
456/* Unmask a specific virq */
457extern void mpic_unmask_irq(unsigned int irq);
458/* Mask a specific virq */
459extern void mpic_mask_irq(unsigned int irq);
460/* EOI a specific virq */
461extern void mpic_end_irq(unsigned int irq);
462
450/* Fetch interrupt from a given mpic */ 463/* Fetch interrupt from a given mpic */
451extern unsigned int mpic_get_one_irq(struct mpic *mpic); 464extern unsigned int mpic_get_one_irq(struct mpic *mpic);
452/* This one gets to the primary mpic */ 465/* This one gets from the primary mpic */
453extern unsigned int mpic_get_irq(void); 466extern unsigned int mpic_get_irq(void);
467/* Fetch Machine Check interrupt from primary mpic */
468extern unsigned int mpic_get_mcirq(void);
454 469
455/* Set the EPIC clock ratio */ 470/* Set the EPIC clock ratio */
456void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio); 471void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio);