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authorPaul Mackerras <paulus@samba.org>2008-01-23 23:29:14 -0500
committerPaul Mackerras <paulus@samba.org>2008-01-23 23:29:14 -0500
commitdcb571be2019ae677bc5ed64437dbc87ae1eb67f (patch)
tree1b93f9ea3568be4dcc49ffb2adc0d3ab0a02b47f /include/asm-powerpc
parent9156ad48338e0306e508ead5c0d9986050744475 (diff)
parent96f39c1718091d63dc1c5012d566737ea0d2a20c (diff)
Merge branch 'for-2.6.25' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into for-2.6.25
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/immap_qe.h34
-rw-r--r--include/asm-powerpc/lmb.h1
-rw-r--r--include/asm-powerpc/mpc8260.h1
-rw-r--r--include/asm-powerpc/pci-bridge.h3
-rw-r--r--include/asm-powerpc/qe.h61
-rw-r--r--include/asm-powerpc/system.h2
6 files changed, 97 insertions, 5 deletions
diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h
index aba9806b31c9..82a452615097 100644
--- a/include/asm-powerpc/immap_qe.h
+++ b/include/asm-powerpc/immap_qe.h
@@ -393,9 +393,39 @@ struct dbg {
393 u8 res2[0x48]; 393 u8 res2[0x48];
394} __attribute__ ((packed)); 394} __attribute__ ((packed));
395 395
396/* RISC Special Registers (Trap and Breakpoint) */ 396/*
397 * RISC Special Registers (Trap and Breakpoint). These are described in
398 * the QE Developer's Handbook.
399 */
397struct rsp { 400struct rsp {
398 u32 reg[0x40]; /* 64 32-bit registers */ 401 __be32 tibcr[16]; /* Trap/instruction breakpoint control regs */
402 u8 res0[64];
403 __be32 ibcr0;
404 __be32 ibs0;
405 __be32 ibcnr0;
406 u8 res1[4];
407 __be32 ibcr1;
408 __be32 ibs1;
409 __be32 ibcnr1;
410 __be32 npcr;
411 __be32 dbcr;
412 __be32 dbar;
413 __be32 dbamr;
414 __be32 dbsr;
415 __be32 dbcnr;
416 u8 res2[12];
417 __be32 dbdr_h;
418 __be32 dbdr_l;
419 __be32 dbdmr_h;
420 __be32 dbdmr_l;
421 __be32 bsr;
422 __be32 bor;
423 __be32 bior;
424 u8 res3[4];
425 __be32 iatr[4];
426 __be32 eccr; /* Exception control configuration register */
427 __be32 eicr;
428 u8 res4[0x100-0xf8];
399} __attribute__ ((packed)); 429} __attribute__ ((packed));
400 430
401struct qe_immap { 431struct qe_immap {
diff --git a/include/asm-powerpc/lmb.h b/include/asm-powerpc/lmb.h
index b5f9f4c9c294..5d1dc48a0bb8 100644
--- a/include/asm-powerpc/lmb.h
+++ b/include/asm-powerpc/lmb.h
@@ -51,6 +51,7 @@ extern unsigned long __init __lmb_alloc_base(unsigned long size,
51extern unsigned long __init lmb_phys_mem_size(void); 51extern unsigned long __init lmb_phys_mem_size(void);
52extern unsigned long __init lmb_end_of_DRAM(void); 52extern unsigned long __init lmb_end_of_DRAM(void);
53extern void __init lmb_enforce_memory_limit(unsigned long memory_limit); 53extern void __init lmb_enforce_memory_limit(unsigned long memory_limit);
54extern int __init lmb_is_reserved(unsigned long addr);
54 55
55extern void lmb_dump_all(void); 56extern void lmb_dump_all(void);
56 57
diff --git a/include/asm-powerpc/mpc8260.h b/include/asm-powerpc/mpc8260.h
index e0d480790e12..03317e1e6185 100644
--- a/include/asm-powerpc/mpc8260.h
+++ b/include/asm-powerpc/mpc8260.h
@@ -8,6 +8,7 @@
8#ifndef __ASM_POWERPC_MPC8260_H__ 8#ifndef __ASM_POWERPC_MPC8260_H__
9#define __ASM_POWERPC_MPC8260_H__ 9#define __ASM_POWERPC_MPC8260_H__
10 10
11#define MPC82XX_BCR_PLDP 0x00800000 /* Pipeline Maximum Depth */
11 12
12#ifdef CONFIG_8260 13#ifdef CONFIG_8260
13 14
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index a6ea49eb680b..e5802c62f428 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -152,9 +152,6 @@ extern void setup_indirect_pci(struct pci_controller* hose,
152 resource_size_t cfg_addr, 152 resource_size_t cfg_addr,
153 resource_size_t cfg_data, u32 flags); 153 resource_size_t cfg_data, u32 flags);
154extern void setup_grackle(struct pci_controller *hose); 154extern void setup_grackle(struct pci_controller *hose);
155extern void __init update_bridge_resource(struct pci_dev *dev,
156 struct resource *res);
157
158#else /* CONFIG_PPC64 */ 155#else /* CONFIG_PPC64 */
159 156
160/* 157/*
diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h
index a24b7b14958f..430dc77b35fc 100644
--- a/include/asm-powerpc/qe.h
+++ b/include/asm-powerpc/qe.h
@@ -94,6 +94,58 @@ unsigned long qe_muram_alloc_fixed(unsigned long offset, int size);
94void qe_muram_dump(void); 94void qe_muram_dump(void);
95void *qe_muram_addr(unsigned long offset); 95void *qe_muram_addr(unsigned long offset);
96 96
97/* Structure that defines QE firmware binary files.
98 *
99 * See Documentation/powerpc/qe-firmware.txt for a description of these
100 * fields.
101 */
102struct qe_firmware {
103 struct qe_header {
104 __be32 length; /* Length of the entire structure, in bytes */
105 u8 magic[3]; /* Set to { 'Q', 'E', 'F' } */
106 u8 version; /* Version of this layout. First ver is '1' */
107 } header;
108 u8 id[62]; /* Null-terminated identifier string */
109 u8 split; /* 0 = shared I-RAM, 1 = split I-RAM */
110 u8 count; /* Number of microcode[] structures */
111 struct {
112 __be16 model; /* The SOC model */
113 u8 major; /* The SOC revision major */
114 u8 minor; /* The SOC revision minor */
115 } __attribute__ ((packed)) soc;
116 u8 padding[4]; /* Reserved, for alignment */
117 __be64 extended_modes; /* Extended modes */
118 __be32 vtraps[8]; /* Virtual trap addresses */
119 u8 reserved[4]; /* Reserved, for future expansion */
120 struct qe_microcode {
121 u8 id[32]; /* Null-terminated identifier */
122 __be32 traps[16]; /* Trap addresses, 0 == ignore */
123 __be32 eccr; /* The value for the ECCR register */
124 __be32 iram_offset; /* Offset into I-RAM for the code */
125 __be32 count; /* Number of 32-bit words of the code */
126 __be32 code_offset; /* Offset of the actual microcode */
127 u8 major; /* The microcode version major */
128 u8 minor; /* The microcode version minor */
129 u8 revision; /* The microcode version revision */
130 u8 padding; /* Reserved, for alignment */
131 u8 reserved[4]; /* Reserved, for future expansion */
132 } __attribute__ ((packed)) microcode[1];
133 /* All microcode binaries should be located here */
134 /* CRC32 should be located here, after the microcode binaries */
135} __attribute__ ((packed));
136
137struct qe_firmware_info {
138 char id[64]; /* Firmware name */
139 u32 vtraps[8]; /* Virtual trap addresses */
140 u64 extended_modes; /* Extended modes */
141};
142
143/* Upload a firmware to the QE */
144int qe_upload_firmware(const struct qe_firmware *firmware);
145
146/* Obtain information on the uploaded firmware */
147struct qe_firmware_info *qe_get_firmware_info(void);
148
97/* Buffer descriptors */ 149/* Buffer descriptors */
98struct qe_bd { 150struct qe_bd {
99 __be16 status; 151 __be16 status;
@@ -329,6 +381,15 @@ enum comm_dir {
329 381
330#define QE_SDEBCR_BA_MASK 0x01FFFFFF 382#define QE_SDEBCR_BA_MASK 0x01FFFFFF
331 383
384/* Communication Processor */
385#define QE_CP_CERCR_MEE 0x8000 /* Multi-user RAM ECC enable */
386#define QE_CP_CERCR_IEE 0x4000 /* Instruction RAM ECC enable */
387#define QE_CP_CERCR_CIR 0x0800 /* Common instruction RAM */
388
389/* I-RAM */
390#define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */
391#define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */
392
332/* UPC */ 393/* UPC */
333#define UPGCR_PROTOCOL 0x80000000 /* protocol ul2 or pl2 */ 394#define UPGCR_PROTOCOL 0x80000000 /* protocol ul2 or pl2 */
334#define UPGCR_TMS 0x40000000 /* Transmit master/slave mode */ 395#define UPGCR_TMS 0x40000000 /* Transmit master/slave mode */
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 87be8c3bc9cb..bc9739dff5e7 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -169,6 +169,8 @@ extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
169extern void bad_page_fault(struct pt_regs *, unsigned long, int); 169extern void bad_page_fault(struct pt_regs *, unsigned long, int);
170extern int die(const char *, struct pt_regs *, long); 170extern int die(const char *, struct pt_regs *, long);
171extern void _exception(int, struct pt_regs *, int, unsigned long); 171extern void _exception(int, struct pt_regs *, int, unsigned long);
172extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
173
172#ifdef CONFIG_BOOKE_WDT 174#ifdef CONFIG_BOOKE_WDT
173extern u32 booke_wdt_enabled; 175extern u32 booke_wdt_enabled;
174extern u32 booke_wdt_period; 176extern u32 booke_wdt_period;