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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2007-12-20 23:39:21 -0500
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-12-23 14:11:59 -0500
commit47c0bd1ae24c34e851cf0f2b02ef2a6847d7ae15 (patch)
tree86fab68618a4afa03660cc576c9e7da3e5a0b520 /include/asm-powerpc
parentc2a7dcad9f0d92d7a96e735abb8bec7b9c621536 (diff)
[POWERPC] Reworking machine check handling and Fix 440/440A
This adds a cputable function pointer for the CPU-side machine check handling. The semantic is still the same as the old one, the one in ppc_md. overrides the one in cputable, though ultimately we'll want to change that so the CPU gets first. This removes CONFIG_440A which was a problem for multiplatform kernels and instead fixes up the IVOR at runtime from a setup_cpu function. The "A" version of the machine check also tweaks the regs->trap value to differenciate the 2 versions at the C level. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/cputable.h13
-rw-r--r--include/asm-powerpc/ptrace.h3
-rw-r--r--include/asm-powerpc/reg_booke.h3
3 files changed, 16 insertions, 3 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 4525c784dfd0..528ef183c221 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -57,6 +57,14 @@ enum powerpc_pmc_type {
57 PPC_PMC_PA6T = 2, 57 PPC_PMC_PA6T = 2,
58}; 58};
59 59
60struct pt_regs;
61
62extern int machine_check_generic(struct pt_regs *regs);
63extern int machine_check_4xx(struct pt_regs *regs);
64extern int machine_check_440A(struct pt_regs *regs);
65extern int machine_check_e500(struct pt_regs *regs);
66extern int machine_check_e200(struct pt_regs *regs);
67
60/* NOTE WELL: Update identify_cpu() if fields are added or removed! */ 68/* NOTE WELL: Update identify_cpu() if fields are added or removed! */
61struct cpu_spec { 69struct cpu_spec {
62 /* CPU is matched via (PVR & pvr_mask) == pvr_value */ 70 /* CPU is matched via (PVR & pvr_mask) == pvr_value */
@@ -97,6 +105,11 @@ struct cpu_spec {
97 105
98 /* Name of processor class, for the ELF AT_PLATFORM entry */ 106 /* Name of processor class, for the ELF AT_PLATFORM entry */
99 char *platform; 107 char *platform;
108
109 /* Processor specific machine check handling. Return negative
110 * if the error is fatal, 1 if it was fully recovered and 0 to
111 * pass up (not CPU originated) */
112 int (*machine_check)(struct pt_regs *regs);
100}; 113};
101 114
102extern struct cpu_spec *cur_cpu_spec; 115extern struct cpu_spec *cur_cpu_spec;
diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h
index 13fccc5a4119..c662287efd8f 100644
--- a/include/asm-powerpc/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -106,7 +106,8 @@ extern int ptrace_put_reg(struct task_struct *task, int regno,
106 */ 106 */
107#define FULL_REGS(regs) (((regs)->trap & 1) == 0) 107#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
108#ifndef __powerpc64__ 108#ifndef __powerpc64__
109#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0) 109#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
110#define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0)
110#endif /* ! __powerpc64__ */ 111#endif /* ! __powerpc64__ */
111#define TRAP(regs) ((regs)->trap & ~0xF) 112#define TRAP(regs) ((regs)->trap & ~0xF)
112#ifdef __powerpc64__ 113#ifdef __powerpc64__
diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h
index d3e8dd0fc738..0405ef479814 100644
--- a/include/asm-powerpc/reg_booke.h
+++ b/include/asm-powerpc/reg_booke.h
@@ -218,7 +218,6 @@
218#define CCR1_TCS 0x00000080 /* Timer Clock Select */ 218#define CCR1_TCS 0x00000080 /* Timer Clock Select */
219 219
220/* Bit definitions for the MCSR. */ 220/* Bit definitions for the MCSR. */
221#ifdef CONFIG_440A
222#define MCSR_MCS 0x80000000 /* Machine Check Summary */ 221#define MCSR_MCS 0x80000000 /* Machine Check Summary */
223#define MCSR_IB 0x40000000 /* Instruction PLB Error */ 222#define MCSR_IB 0x40000000 /* Instruction PLB Error */
224#define MCSR_DRB 0x20000000 /* Data Read PLB Error */ 223#define MCSR_DRB 0x20000000 /* Data Read PLB Error */
@@ -228,7 +227,7 @@
228#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */ 227#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */
229#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */ 228#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */
230#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */ 229#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */
231#endif 230
232#ifdef CONFIG_E500 231#ifdef CONFIG_E500
233#define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */ 232#define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */
234#define MCSR_ICPERR 0x40000000UL /* I-Cache Parity Error */ 233#define MCSR_ICPERR 0x40000000UL /* I-Cache Parity Error */