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authorTimur Tabi <timur@freescale.com>2007-10-03 12:34:59 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-10-08 09:38:15 -0400
commit6b0b594bb81f86dbc7b0829ee5102abaab242913 (patch)
tree707463987ab05d04596763afa9db1c63cbde4c4a /include/asm-powerpc/ucc.h
parent6039680705906f270411435c05c869ac4f59ef10 (diff)
[POWERPC] qe: miscellaneous code improvements and fixes to the QE library
This patch makes numerous miscellaneous code improvements to the QE library. 1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type() (every caller of ucc_init_guemr() also calls ucc_set_type()). Modify all callers of ucc_set_type() accordingly. 2. Remove the unused enum ucc_pram_initial_offset. 3. Refactor qe_setbrg(), also implement work-around for errata QE_General4. 4. Several printk() calls were missing the terminating \n. 5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where appropriate. 6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed with the wrong value. 7. Add the protocol type to struct us_info and updated ucc_slow_init() to use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED. 8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx() 9. Add several macros in qe.h (mostly for slow UCC support, but also to standardize some naming convention) and remove several unused macros. 10. Update ucc_geth.c to use the new macros. 11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol to use when initializing the UCC in ucc_slow_init(). 12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since these are the real names of the registers. 13. Use the setbits, clrbits, and clrsetbits where appropriate. 14. Refactor ucc_set_qe_mux_rxtx(). 15. Remove all instances of 'volatile'. 16. Simplify get_cmxucr_reg(); 17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[]. 18. Updated struct ucc_geth because struct ucc_fast is not padded any more. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-powerpc/ucc.h')
-rw-r--r--include/asm-powerpc/ucc.h40
1 files changed, 10 insertions, 30 deletions
diff --git a/include/asm-powerpc/ucc.h b/include/asm-powerpc/ucc.h
index afe3076bdc03..46b09ba6bead 100644
--- a/include/asm-powerpc/ucc.h
+++ b/include/asm-powerpc/ucc.h
@@ -25,58 +25,38 @@
25/* Slow or fast type for UCCs. 25/* Slow or fast type for UCCs.
26*/ 26*/
27enum ucc_speed_type { 27enum ucc_speed_type {
28 UCC_SPEED_TYPE_FAST, UCC_SPEED_TYPE_SLOW 28 UCC_SPEED_TYPE_FAST = UCC_GUEMR_MODE_FAST_RX | UCC_GUEMR_MODE_FAST_TX,
29}; 29 UCC_SPEED_TYPE_SLOW = UCC_GUEMR_MODE_SLOW_RX | UCC_GUEMR_MODE_SLOW_TX
30
31/* Initial UCCs Parameter RAM address relative to: MEM_MAP_BASE (IMMR).
32*/
33enum ucc_pram_initial_offset {
34 UCC_PRAM_OFFSET_UCC1 = 0x8400,
35 UCC_PRAM_OFFSET_UCC2 = 0x8500,
36 UCC_PRAM_OFFSET_UCC3 = 0x8600,
37 UCC_PRAM_OFFSET_UCC4 = 0x9000,
38 UCC_PRAM_OFFSET_UCC5 = 0x8000,
39 UCC_PRAM_OFFSET_UCC6 = 0x8100,
40 UCC_PRAM_OFFSET_UCC7 = 0x8200,
41 UCC_PRAM_OFFSET_UCC8 = 0x8300
42}; 30};
43 31
44/* ucc_set_type 32/* ucc_set_type
45 * Sets UCC to slow or fast mode. 33 * Sets UCC to slow or fast mode.
46 * 34 *
47 * ucc_num - (In) number of UCC (0-7). 35 * ucc_num - (In) number of UCC (0-7).
48 * regs - (In) pointer to registers base for the UCC.
49 * speed - (In) slow or fast mode for UCC. 36 * speed - (In) slow or fast mode for UCC.
50 */ 37 */
51int ucc_set_type(int ucc_num, struct ucc_common *regs, 38int ucc_set_type(unsigned int ucc_num, enum ucc_speed_type speed);
52 enum ucc_speed_type speed);
53
54/* ucc_init_guemr
55 * Init the Guemr register.
56 *
57 * regs - (In) pointer to registers base for the UCC.
58 */
59int ucc_init_guemr(struct ucc_common *regs);
60 39
61int ucc_set_qe_mux_mii_mng(int ucc_num); 40int ucc_set_qe_mux_mii_mng(unsigned int ucc_num);
62 41
63int ucc_set_qe_mux_rxtx(int ucc_num, enum qe_clock clock, enum comm_dir mode); 42int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock,
43 enum comm_dir mode);
64 44
65int ucc_mux_set_grant_tsa_bkpt(int ucc_num, int set, u32 mask); 45int ucc_mux_set_grant_tsa_bkpt(unsigned int ucc_num, int set, u32 mask);
66 46
67/* QE MUX clock routing for UCC 47/* QE MUX clock routing for UCC
68*/ 48*/
69static inline int ucc_set_qe_mux_grant(int ucc_num, int set) 49static inline int ucc_set_qe_mux_grant(unsigned int ucc_num, int set)
70{ 50{
71 return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_GRANT); 51 return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_GRANT);
72} 52}
73 53
74static inline int ucc_set_qe_mux_tsa(int ucc_num, int set) 54static inline int ucc_set_qe_mux_tsa(unsigned int ucc_num, int set)
75{ 55{
76 return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_TSA); 56 return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_TSA);
77} 57}
78 58
79static inline int ucc_set_qe_mux_bkpt(int ucc_num, int set) 59static inline int ucc_set_qe_mux_bkpt(unsigned int ucc_num, int set)
80{ 60{
81 return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_BKPT); 61 return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_BKPT);
82} 62}