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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2007-10-29 18:46:06 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-11-01 08:15:09 -0400
commite701d269aa28996f3502780951fe1b12d5d66b49 (patch)
treea55db7df5755bf9c69f466432786de7e7e445ba8 /include/asm-powerpc/tlbflush.h
parent57d75561be5496289601b2c94787ec38c718fcae (diff)
[POWERPC] 4xx: Fix 4xx flush_tlb_page()
On 4xx CPUs, the current implementation of flush_tlb_page() uses a low level _tlbie() assembly function that only works for the current PID. Thus, invalidations caused by, for example, a COW fault triggered by get_user_pages() from a different context will not work properly, causing among other things, gdb breakpoints to fail. This patch adds a "pid" argument to _tlbie() on 4xx processors, and uses it to flush entries in the right context. FSL BookE also gets the argument but it seems they don't need it (their tlbivax form ignores the PID when invalidating according to the document I have). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'include/asm-powerpc/tlbflush.h')
-rw-r--r--include/asm-powerpc/tlbflush.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h
index b6b036ccee34..e7b4c0d298ae 100644
--- a/include/asm-powerpc/tlbflush.h
+++ b/include/asm-powerpc/tlbflush.h
@@ -1,5 +1,6 @@
1#ifndef _ASM_POWERPC_TLBFLUSH_H 1#ifndef _ASM_POWERPC_TLBFLUSH_H
2#define _ASM_POWERPC_TLBFLUSH_H 2#define _ASM_POWERPC_TLBFLUSH_H
3
3/* 4/*
4 * TLB flushing: 5 * TLB flushing:
5 * 6 *
@@ -16,9 +17,6 @@
16 */ 17 */
17#ifdef __KERNEL__ 18#ifdef __KERNEL__
18 19
19struct mm_struct;
20struct vm_area_struct;
21
22#if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE) 20#if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE)
23/* 21/*
24 * TLB flushing for software loaded TLB chips 22 * TLB flushing for software loaded TLB chips
@@ -28,7 +26,9 @@ struct vm_area_struct;
28 * specific tlbie's 26 * specific tlbie's
29 */ 27 */
30 28
31extern void _tlbie(unsigned long address); 29#include <linux/mm.h>
30
31extern void _tlbie(unsigned long address, unsigned int pid);
32 32
33#if defined(CONFIG_40x) || defined(CONFIG_8xx) 33#if defined(CONFIG_40x) || defined(CONFIG_8xx)
34#define _tlbia() asm volatile ("tlbia; sync" : : : "memory") 34#define _tlbia() asm volatile ("tlbia; sync" : : : "memory")
@@ -44,13 +44,13 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
44static inline void flush_tlb_page(struct vm_area_struct *vma, 44static inline void flush_tlb_page(struct vm_area_struct *vma,
45 unsigned long vmaddr) 45 unsigned long vmaddr)
46{ 46{
47 _tlbie(vmaddr); 47 _tlbie(vmaddr, vma->vm_mm->context.id);
48} 48}
49 49
50static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, 50static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
51 unsigned long vmaddr) 51 unsigned long vmaddr)
52{ 52{
53 _tlbie(vmaddr); 53 _tlbie(vmaddr, vma->vm_mm->context.id);
54} 54}
55 55
56static inline void flush_tlb_range(struct vm_area_struct *vma, 56static inline void flush_tlb_range(struct vm_area_struct *vma,