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authorJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-08-27 22:59:59 -0400
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-08-27 22:59:59 -0400
commit8ce7a9c159c8c4eb480f0a65c6af753dbf9a1a70 (patch)
treebe59573c0af3617d0cd8a7d61f0ed119e58b1156 /include/asm-powerpc/system.h
parentd2afb3ae04e36dbc6e9eb2d8bd54406ff7b6b3bd (diff)
parent01da5fd83d6b2c5e36b77539f6cbdd8f49849225 (diff)
Merge ../linux-2.6
Diffstat (limited to 'include/asm-powerpc/system.h')
-rw-r--r--include/asm-powerpc/system.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 7307aa775671..4c9f5229e833 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -53,6 +53,15 @@
53#define smp_read_barrier_depends() do { } while(0) 53#define smp_read_barrier_depends() do { } while(0)
54#endif /* CONFIG_SMP */ 54#endif /* CONFIG_SMP */
55 55
56/*
57 * This is a barrier which prevents following instructions from being
58 * started until the value of the argument x is known. For example, if
59 * x is a variable loaded from memory, this prevents following
60 * instructions from being executed until the load has been performed.
61 */
62#define data_barrier(x) \
63 asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory");
64
56struct task_struct; 65struct task_struct;
57struct pt_regs; 66struct pt_regs;
58 67