diff options
author | Olof Johansson <olof@lixom.net> | 2007-09-04 22:09:06 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-09-13 11:33:21 -0400 |
commit | 2e1957fd47b9d4b7bf35be2ec3d4b5e3eefe5cc0 (patch) | |
tree | 7ed199444a5e6dec86afbb91a8f2031c272221d8 /include/asm-powerpc/reg.h | |
parent | 4d442331e57b7bbc28b5a20f7d069bc12e9c503e (diff) |
[POWERPC] pasemi: Export more SPRs to sysfs when CONFIG_DEBUG_KERNEL=y
Export some of the implementation-specific registers via sysfs.
Useful when debugging, etc.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/reg.h')
-rw-r--r-- | include/asm-powerpc/reg.h | 48 |
1 files changed, 37 insertions, 11 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index 281011e953ec..347de53e49af 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h | |||
@@ -518,21 +518,47 @@ | |||
518 | #define PA6T_MMCR1_ES4 0x0000000000ff0000UL | 518 | #define PA6T_MMCR1_ES4 0x0000000000ff0000UL |
519 | #define PA6T_MMCR1_ES5 0x00000000ff000000UL | 519 | #define PA6T_MMCR1_ES5 0x00000000ff000000UL |
520 | 520 | ||
521 | #define SPRN_PA6T_SIAR 780 | 521 | #define SPRN_PA6T_UPMC0 771 /* User PerfMon Counter 0 */ |
522 | #define SPRN_PA6T_UPMC0 771 | 522 | #define SPRN_PA6T_UPMC1 772 /* ... */ |
523 | #define SPRN_PA6T_UPMC1 772 | ||
524 | #define SPRN_PA6T_UPMC2 773 | 523 | #define SPRN_PA6T_UPMC2 773 |
525 | #define SPRN_PA6T_UPMC3 774 | 524 | #define SPRN_PA6T_UPMC3 774 |
526 | #define SPRN_PA6T_UPMC4 775 | 525 | #define SPRN_PA6T_UPMC4 775 |
527 | #define SPRN_PA6T_UPMC5 776 | 526 | #define SPRN_PA6T_UPMC5 776 |
528 | #define SPRN_PA6T_UMMCR0 779 | 527 | #define SPRN_PA6T_UMMCR0 779 /* User Monitor Mode Control Register 0 */ |
529 | #define SPRN_PA6T_UMMCR1 782 | 528 | #define SPRN_PA6T_SIAR 780 /* Sampled Instruction Address */ |
530 | #define SPRN_PA6T_PMC0 787 | 529 | #define SPRN_PA6T_UMMCR1 782 /* User Monitor Mode Control Register 1 */ |
531 | #define SPRN_PA6T_PMC1 788 | 530 | #define SPRN_PA6T_SIER 785 /* Sampled Instruction Event Register */ |
532 | #define SPRN_PA6T_PMC2 789 | 531 | #define SPRN_PA6T_PMC0 787 |
533 | #define SPRN_PA6T_PMC3 790 | 532 | #define SPRN_PA6T_PMC1 788 |
534 | #define SPRN_PA6T_PMC4 791 | 533 | #define SPRN_PA6T_PMC2 789 |
535 | #define SPRN_PA6T_PMC5 792 | 534 | #define SPRN_PA6T_PMC3 790 |
535 | #define SPRN_PA6T_PMC4 791 | ||
536 | #define SPRN_PA6T_PMC5 792 | ||
537 | #define SPRN_PA6T_TSR0 793 /* Timestamp Register 0 */ | ||
538 | #define SPRN_PA6T_TSR1 794 /* Timestamp Register 1 */ | ||
539 | #define SPRN_PA6T_TSR2 799 /* Timestamp Register 2 */ | ||
540 | #define SPRN_PA6T_TSR3 784 /* Timestamp Register 3 */ | ||
541 | |||
542 | #define SPRN_PA6T_IER 981 /* Icache Error Register */ | ||
543 | #define SPRN_PA6T_DER 982 /* Dcache Error Register */ | ||
544 | #define SPRN_PA6T_BER 862 /* BIU Error Address Register */ | ||
545 | #define SPRN_PA6T_MER 849 /* MMU Error Register */ | ||
546 | |||
547 | #define SPRN_PA6T_IMA0 880 /* Instruction Match Array 0 */ | ||
548 | #define SPRN_PA6T_IMA1 881 /* ... */ | ||
549 | #define SPRN_PA6T_IMA2 882 | ||
550 | #define SPRN_PA6T_IMA3 883 | ||
551 | #define SPRN_PA6T_IMA4 884 | ||
552 | #define SPRN_PA6T_IMA5 885 | ||
553 | #define SPRN_PA6T_IMA6 886 | ||
554 | #define SPRN_PA6T_IMA7 887 | ||
555 | #define SPRN_PA6T_IMA8 888 | ||
556 | #define SPRN_PA6T_IMA9 889 | ||
557 | #define SPRN_PA6T_BTCR 978 /* Breakpoint and Tagging Control Register */ | ||
558 | #define SPRN_PA6T_IMAAT 979 /* Instruction Match Array Action Table */ | ||
559 | #define SPRN_PA6T_PCCR 1019 /* Power Counter Control Register */ | ||
560 | #define SPRN_PA6T_RPCCR 1021 /* Retire PC Trace Control Register */ | ||
561 | |||
536 | 562 | ||
537 | #else /* 32-bit */ | 563 | #else /* 32-bit */ |
538 | #define SPRN_MMCR0 952 /* Monitor Mode Control Register 0 */ | 564 | #define SPRN_MMCR0 952 /* Monitor Mode Control Register 0 */ |