diff options
author | Scott Wood <scottwood@freescale.com> | 2007-10-09 13:37:13 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-07-16 18:57:30 -0400 |
commit | d49747bdfb2ddebea24d1580da55b79d093d48a9 (patch) | |
tree | cb2ae6ea03bab0ff7901c9997ef50131bba6b511 /include/asm-powerpc/reg.h | |
parent | 7e72063c9aaeb618815589cd4d57f26186e6fcad (diff) |
powerpc/mpc83xx: Power Management support
Basic PM support for 83xx. Standby is implemented as sleep.
Suspend-to-RAM is implemented as "deep sleep" (with the processor
turned off) on 831x.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-powerpc/reg.h')
-rw-r--r-- | include/asm-powerpc/reg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index bbccadfee0d6..c6d1ab650778 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h | |||
@@ -155,10 +155,12 @@ | |||
155 | #define CTRL_RUNLATCH 0x1 | 155 | #define CTRL_RUNLATCH 0x1 |
156 | #define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ | 156 | #define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ |
157 | #define DABR_TRANSLATION (1UL << 2) | 157 | #define DABR_TRANSLATION (1UL << 2) |
158 | #define SPRN_DABR2 0x13D /* e300 */ | ||
158 | #define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ | 159 | #define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ |
159 | #define DABRX_USER (1UL << 0) | 160 | #define DABRX_USER (1UL << 0) |
160 | #define DABRX_KERNEL (1UL << 1) | 161 | #define DABRX_KERNEL (1UL << 1) |
161 | #define SPRN_DAR 0x013 /* Data Address Register */ | 162 | #define SPRN_DAR 0x013 /* Data Address Register */ |
163 | #define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */ | ||
162 | #define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ | 164 | #define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ |
163 | #define DSISR_NOHPTE 0x40000000 /* no translation found */ | 165 | #define DSISR_NOHPTE 0x40000000 /* no translation found */ |
164 | #define DSISR_PROTFAULT 0x08000000 /* protection fault */ | 166 | #define DSISR_PROTFAULT 0x08000000 /* protection fault */ |
@@ -264,6 +266,8 @@ | |||
264 | #define HID1_PS (1<<16) /* 750FX PLL selection */ | 266 | #define HID1_PS (1<<16) /* 750FX PLL selection */ |
265 | #define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ | 267 | #define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ |
266 | #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ | 268 | #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ |
269 | #define SPRN_IABR2 0x3FA /* 83xx */ | ||
270 | #define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */ | ||
267 | #define SPRN_HID4 0x3F4 /* 970 HID4 */ | 271 | #define SPRN_HID4 0x3F4 /* 970 HID4 */ |
268 | #define SPRN_HID5 0x3F6 /* 970 HID5 */ | 272 | #define SPRN_HID5 0x3F6 /* 970 HID5 */ |
269 | #define SPRN_HID6 0x3F9 /* BE HID 6 */ | 273 | #define SPRN_HID6 0x3F9 /* BE HID 6 */ |