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authorPaul Mackerras <paulus@samba.org>2006-06-14 20:45:18 -0400
committerPaul Mackerras <paulus@samba.org>2006-06-14 20:45:18 -0400
commitbf72aeba2ffef599d1d386425c9e46b82be657cd (patch)
treeead8e5111dbcfa22e156999d1bb8a96e50f06fef /include/asm-powerpc/pgtable.h
parent31925323b1b51bb65db729e029472a8b1f635b7d (diff)
powerpc: Use 64k pages without needing cache-inhibited large pages
Some POWER5+ machines can do 64k hardware pages for normal memory but not for cache-inhibited pages. This patch lets us use 64k hardware pages for most user processes on such machines (assuming the kernel has been configured with CONFIG_PPC_64K_PAGES=y). User processes start out using 64k pages and get switched to 4k pages if they use any non-cacheable mappings. With this, we use 64k pages for the vmalloc region and 4k pages for the imalloc region. If anything creates a non-cacheable mapping in the vmalloc region, the vmalloc region will get switched to 4k pages. I don't know of any driver other than the DRM that would do this, though, and these machines don't have AGP. When a region gets switched from 64k pages to 4k pages, we do not have to clear out all the 64k HPTEs from the hash table immediately. We use the _PAGE_COMBO bit in the Linux PTE to indicate whether the page was hashed in as a 64k page or a set of 4k pages. If hash_page is trying to insert a 4k page for a Linux PTE and it sees that it has already been inserted as a 64k page, it first invalidates the 64k HPTE before inserting the 4k HPTE. The hash invalidation routines also use the _PAGE_COMBO bit, to determine whether to look for a 64k HPTE or a set of 4k HPTEs to remove. With those two changes, we can tolerate a mix of 4k and 64k HPTEs in the hash table, and they will all get removed when the address space is torn down. Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/pgtable.h')
-rw-r--r--include/asm-powerpc/pgtable.h10
1 files changed, 2 insertions, 8 deletions
diff --git a/include/asm-powerpc/pgtable.h b/include/asm-powerpc/pgtable.h
index e9f1f4627e6b..260a0fabe97e 100644
--- a/include/asm-powerpc/pgtable.h
+++ b/include/asm-powerpc/pgtable.h
@@ -47,8 +47,8 @@ struct mm_struct;
47/* 47/*
48 * Define the address range of the vmalloc VM area. 48 * Define the address range of the vmalloc VM area.
49 */ 49 */
50#define VMALLOC_START (0xD000000000000000ul) 50#define VMALLOC_START ASM_CONST(0xD000000000000000)
51#define VMALLOC_SIZE (0x80000000000UL) 51#define VMALLOC_SIZE ASM_CONST(0x80000000000)
52#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) 52#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
53 53
54/* 54/*
@@ -413,12 +413,6 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
413 flush_tlb_pending(); 413 flush_tlb_pending();
414 } 414 }
415 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); 415 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
416
417#ifdef CONFIG_PPC_64K_PAGES
418 if (mmu_virtual_psize != MMU_PAGE_64K)
419 pte = __pte(pte_val(pte) | _PAGE_COMBO);
420#endif /* CONFIG_PPC_64K_PAGES */
421
422 *ptep = pte; 416 *ptep = pte;
423} 417}
424 418