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authorDavid Gibson <david@gibson.dropbear.id.au>2007-04-30 02:30:56 -0400
committerPaul Mackerras <paulus@samba.org>2007-05-02 06:04:30 -0400
commitf88df14b1f15cdeffa060580a40c1ce3e13bb79e (patch)
tree0619f32c2be79a85792537ad4410cc8d729f4f75 /include/asm-powerpc/pgtable.h
parent69d48b409cac747cc0707b05b769e38488a6ad35 (diff)
[POWERPC] Remove arch/powerpc's dependence on asm-ppc/pg{alloc,table}.h
Currently, all 32-bit powerpc platforms use asm-ppc/pgtable.h and asm-ppc/pgalloc.h, even when otherwise compiled with ARCH=powerpc. Those asm-ppc files are a fairly nasty tangle of #ifdefs including a bunch of things which shouldn't be necessary any more in arch/powerpc. Cleaning up that mess is going to take a while, but this patch is a first step. It separates the asm-powerpc/pg{alloc,table}.h into 64 bit and 32 bit versions in asm-powerpc, which the basic .h files in asm-powerpc select based on config. We make a few tiny tweaks to the innards of the files along the way, making the outermost ifdefs (double-inclusion protection and __KERNEL__) a little cleaner, and #including asm-generic/pgtable.h from the top-level asm-powerpc/pgtable.h (since both the old 32-bit and 64-bit versions ended with such an #include). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/pgtable.h')
-rw-r--r--include/asm-powerpc/pgtable.h493
1 files changed, 3 insertions, 490 deletions
diff --git a/include/asm-powerpc/pgtable.h b/include/asm-powerpc/pgtable.h
index 19edb6982b81..78bf4ae712a6 100644
--- a/include/asm-powerpc/pgtable.h
+++ b/include/asm-powerpc/pgtable.h
@@ -2,502 +2,15 @@
2#define _ASM_POWERPC_PGTABLE_H 2#define _ASM_POWERPC_PGTABLE_H
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5#ifndef CONFIG_PPC64 5#if defined(CONFIG_PPC64)
6#include <asm-ppc/pgtable.h> 6# include <asm/pgtable-ppc64.h>
7#else 7#else
8 8# include <asm/pgtable-ppc32.h>
9/*
10 * This file contains the functions and defines necessary to modify and use
11 * the ppc64 hashed page table.
12 */
13
14#ifndef __ASSEMBLY__
15#include <linux/stddef.h>
16#include <asm/processor.h> /* For TASK_SIZE */
17#include <asm/mmu.h>
18#include <asm/page.h>
19#include <asm/tlbflush.h>
20struct mm_struct;
21#endif /* __ASSEMBLY__ */
22
23#ifdef CONFIG_PPC_64K_PAGES
24#include <asm/pgtable-64k.h>
25#else
26#include <asm/pgtable-4k.h>
27#endif
28
29#define FIRST_USER_ADDRESS 0
30
31/*
32 * Size of EA range mapped by our pagetables.
33 */
34#define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
35 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
36#define PGTABLE_RANGE (1UL << PGTABLE_EADDR_SIZE)
37
38#if TASK_SIZE_USER64 > PGTABLE_RANGE
39#error TASK_SIZE_USER64 exceeds pagetable range
40#endif
41
42#if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
43#error TASK_SIZE_USER64 exceeds user VSID range
44#endif 9#endif
45 10
46/*
47 * Define the address range of the vmalloc VM area.
48 */
49#define VMALLOC_START ASM_CONST(0xD000000000000000)
50#define VMALLOC_SIZE ASM_CONST(0x80000000000)
51#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
52
53/*
54 * Define the address range of the imalloc VM area.
55 */
56#define PHBS_IO_BASE VMALLOC_END
57#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
58#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
59
60/*
61 * Region IDs
62 */
63#define REGION_SHIFT 60UL
64#define REGION_MASK (0xfUL << REGION_SHIFT)
65#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
66
67#define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
68#define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
69#define USER_REGION_ID (0UL)
70
71/*
72 * Common bits in a linux-style PTE. These match the bits in the
73 * (hardware-defined) PowerPC PTE as closely as possible. Additional
74 * bits may be defined in pgtable-*.h
75 */
76#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
77#define _PAGE_USER 0x0002 /* matches one of the PP bits */
78#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
79#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
80#define _PAGE_GUARDED 0x0008
81#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
82#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
83#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
84#define _PAGE_DIRTY 0x0080 /* C: page changed */
85#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
86#define _PAGE_RW 0x0200 /* software: user write access allowed */
87#define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
88#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
89
90#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
91
92#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
93
94/* __pgprot defined in asm-powerpc/page.h */
95#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
96
97#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
98#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
99#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
100#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
101#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
102#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
103#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
104#define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
105 _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
106#define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC)
107
108#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
109#define HAVE_PAGE_AGP
110
111/* PTEIDX nibble */
112#define _PTEIDX_SECONDARY 0x8
113#define _PTEIDX_GROUP_IX 0x7
114
115
116/*
117 * POWER4 and newer have per page execute protection, older chips can only
118 * do this on a segment (256MB) basis.
119 *
120 * Also, write permissions imply read permissions.
121 * This is the closest we can get..
122 *
123 * Note due to the way vm flags are laid out, the bits are XWR
124 */
125#define __P000 PAGE_NONE
126#define __P001 PAGE_READONLY
127#define __P010 PAGE_COPY
128#define __P011 PAGE_COPY
129#define __P100 PAGE_READONLY_X
130#define __P101 PAGE_READONLY_X
131#define __P110 PAGE_COPY_X
132#define __P111 PAGE_COPY_X
133
134#define __S000 PAGE_NONE
135#define __S001 PAGE_READONLY
136#define __S010 PAGE_SHARED
137#define __S011 PAGE_SHARED
138#define __S100 PAGE_READONLY_X
139#define __S101 PAGE_READONLY_X
140#define __S110 PAGE_SHARED_X
141#define __S111 PAGE_SHARED_X
142
143#ifndef __ASSEMBLY__ 11#ifndef __ASSEMBLY__
144
145/*
146 * ZERO_PAGE is a global shared page that is always zero: used
147 * for zero-mapped memory areas etc..
148 */
149extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
150#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
151#endif /* __ASSEMBLY__ */
152
153#ifdef CONFIG_HUGETLB_PAGE
154
155#define HAVE_ARCH_UNMAPPED_AREA
156#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
157
158#endif
159
160#ifndef __ASSEMBLY__
161
162/*
163 * Conversion functions: convert a page and protection to a page entry,
164 * and a page entry and page directory to the page they refer to.
165 *
166 * mk_pte takes a (struct page *) as input
167 */
168#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
169
170static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
171{
172 pte_t pte;
173
174
175 pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot);
176 return pte;
177}
178
179#define pte_modify(_pte, newprot) \
180 (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
181
182#define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
183#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
184
185/* pte_clear moved to later in this file */
186
187#define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
188#define pte_page(x) pfn_to_page(pte_pfn(x))
189
190#define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
191#define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
192
193#define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval))
194#define pmd_none(pmd) (!pmd_val(pmd))
195#define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
196 || (pmd_val(pmd) & PMD_BAD_BITS))
197#define pmd_present(pmd) (pmd_val(pmd) != 0)
198#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
199#define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
200#define pmd_page(pmd) virt_to_page(pmd_page_vaddr(pmd))
201
202#define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval))
203#define pud_none(pud) (!pud_val(pud))
204#define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \
205 || (pud_val(pud) & PUD_BAD_BITS))
206#define pud_present(pud) (pud_val(pud) != 0)
207#define pud_clear(pudp) (pud_val(*(pudp)) = 0)
208#define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
209#define pud_page(pud) virt_to_page(pud_page_vaddr(pud))
210
211#define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
212
213/*
214 * Find an entry in a page-table-directory. We combine the address region
215 * (the high order N bits) and the pgd portion of the address.
216 */
217/* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
218#define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x1ff)
219
220#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
221
222#define pmd_offset(pudp,addr) \
223 (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
224
225#define pte_offset_kernel(dir,addr) \
226 (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
227
228#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
229#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
230#define pte_unmap(pte) do { } while(0)
231#define pte_unmap_nested(pte) do { } while(0)
232
233/* to find an entry in a kernel page-table-directory */
234/* This now only contains the vmalloc pages */
235#define pgd_offset_k(address) pgd_offset(&init_mm, address)
236
237/*
238 * The following only work if pte_present() is true.
239 * Undefined behaviour if not..
240 */
241static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER;}
242static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
243static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC;}
244static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
245static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
246static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
247
248static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
249static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
250
251static inline pte_t pte_rdprotect(pte_t pte) {
252 pte_val(pte) &= ~_PAGE_USER; return pte; }
253static inline pte_t pte_exprotect(pte_t pte) {
254 pte_val(pte) &= ~_PAGE_EXEC; return pte; }
255static inline pte_t pte_wrprotect(pte_t pte) {
256 pte_val(pte) &= ~(_PAGE_RW); return pte; }
257static inline pte_t pte_mkclean(pte_t pte) {
258 pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
259static inline pte_t pte_mkold(pte_t pte) {
260 pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
261static inline pte_t pte_mkread(pte_t pte) {
262 pte_val(pte) |= _PAGE_USER; return pte; }
263static inline pte_t pte_mkexec(pte_t pte) {
264 pte_val(pte) |= _PAGE_USER | _PAGE_EXEC; return pte; }
265static inline pte_t pte_mkwrite(pte_t pte) {
266 pte_val(pte) |= _PAGE_RW; return pte; }
267static inline pte_t pte_mkdirty(pte_t pte) {
268 pte_val(pte) |= _PAGE_DIRTY; return pte; }
269static inline pte_t pte_mkyoung(pte_t pte) {
270 pte_val(pte) |= _PAGE_ACCESSED; return pte; }
271static inline pte_t pte_mkhuge(pte_t pte) {
272 return pte; }
273
274/* Atomic PTE updates */
275static inline unsigned long pte_update(struct mm_struct *mm,
276 unsigned long addr,
277 pte_t *ptep, unsigned long clr,
278 int huge)
279{
280 unsigned long old, tmp;
281
282 __asm__ __volatile__(
283 "1: ldarx %0,0,%3 # pte_update\n\
284 andi. %1,%0,%6\n\
285 bne- 1b \n\
286 andc %1,%0,%4 \n\
287 stdcx. %1,0,%3 \n\
288 bne- 1b"
289 : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
290 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY)
291 : "cc" );
292
293 if (old & _PAGE_HASHPTE)
294 hpte_need_flush(mm, addr, ptep, old, huge);
295 return old;
296}
297
298static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
299 unsigned long addr, pte_t *ptep)
300{
301 unsigned long old;
302
303 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
304 return 0;
305 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0);
306 return (old & _PAGE_ACCESSED) != 0;
307}
308#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
309#define ptep_test_and_clear_young(__vma, __addr, __ptep) \
310({ \
311 int __r; \
312 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
313 __r; \
314})
315
316/*
317 * On RW/DIRTY bit transitions we can avoid flushing the hpte. For the
318 * moment we always flush but we need to fix hpte_update and test if the
319 * optimisation is worth it.
320 */
321static inline int __ptep_test_and_clear_dirty(struct mm_struct *mm,
322 unsigned long addr, pte_t *ptep)
323{
324 unsigned long old;
325
326 if ((pte_val(*ptep) & _PAGE_DIRTY) == 0)
327 return 0;
328 old = pte_update(mm, addr, ptep, _PAGE_DIRTY, 0);
329 return (old & _PAGE_DIRTY) != 0;
330}
331#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
332#define ptep_test_and_clear_dirty(__vma, __addr, __ptep) \
333({ \
334 int __r; \
335 __r = __ptep_test_and_clear_dirty((__vma)->vm_mm, __addr, __ptep); \
336 __r; \
337})
338
339#define __HAVE_ARCH_PTEP_SET_WRPROTECT
340static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
341 pte_t *ptep)
342{
343 unsigned long old;
344
345 if ((pte_val(*ptep) & _PAGE_RW) == 0)
346 return;
347 old = pte_update(mm, addr, ptep, _PAGE_RW, 0);
348}
349
350/*
351 * We currently remove entries from the hashtable regardless of whether
352 * the entry was young or dirty. The generic routines only flush if the
353 * entry was young or dirty which is not good enough.
354 *
355 * We should be more intelligent about this but for the moment we override
356 * these functions and force a tlb flush unconditionally
357 */
358#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
359#define ptep_clear_flush_young(__vma, __address, __ptep) \
360({ \
361 int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
362 __ptep); \
363 __young; \
364})
365
366#define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
367#define ptep_clear_flush_dirty(__vma, __address, __ptep) \
368({ \
369 int __dirty = __ptep_test_and_clear_dirty((__vma)->vm_mm, __address, \
370 __ptep); \
371 __dirty; \
372})
373
374#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
375static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
376 unsigned long addr, pte_t *ptep)
377{
378 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0);
379 return __pte(old);
380}
381
382static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
383 pte_t * ptep)
384{
385 pte_update(mm, addr, ptep, ~0UL, 0);
386}
387
388/*
389 * set_pte stores a linux PTE into the linux page table.
390 */
391static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
392 pte_t *ptep, pte_t pte)
393{
394 if (pte_present(*ptep))
395 pte_clear(mm, addr, ptep);
396 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
397 *ptep = pte;
398}
399
400/* Set the dirty and/or accessed bits atomically in a linux PTE, this
401 * function doesn't need to flush the hash entry
402 */
403#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
404static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
405{
406 unsigned long bits = pte_val(entry) &
407 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
408 unsigned long old, tmp;
409
410 __asm__ __volatile__(
411 "1: ldarx %0,0,%4\n\
412 andi. %1,%0,%6\n\
413 bne- 1b \n\
414 or %0,%3,%0\n\
415 stdcx. %0,0,%4\n\
416 bne- 1b"
417 :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
418 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
419 :"cc");
420}
421#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
422 do { \
423 __ptep_set_access_flags(__ptep, __entry, __dirty); \
424 flush_tlb_page_nohash(__vma, __address); \
425 } while(0)
426
427/*
428 * Macro to mark a page protection value as "uncacheable".
429 */
430#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
431
432struct file;
433extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
434 unsigned long size, pgprot_t vma_prot);
435#define __HAVE_PHYS_MEM_ACCESS_PROT
436
437#define __HAVE_ARCH_PTE_SAME
438#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
439
440#define pte_ERROR(e) \
441 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
442#define pmd_ERROR(e) \
443 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
444#define pgd_ERROR(e) \
445 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
446
447extern pgd_t swapper_pg_dir[];
448
449extern void paging_init(void);
450
451/* Encode and de-code a swap entry */
452#define __swp_type(entry) (((entry).val >> 1) & 0x3f)
453#define __swp_offset(entry) ((entry).val >> 8)
454#define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
455#define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
456#define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT })
457#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT)
458#define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
459#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
460
461/*
462 * kern_addr_valid is intended to indicate whether an address is a valid
463 * kernel address. Most 32-bit archs define it as always true (like this)
464 * but most 64-bit archs actually perform a test. What should we do here?
465 * The only use is in fs/ncpfs/dir.c
466 */
467#define kern_addr_valid(addr) (1)
468
469#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
470 remap_pfn_range(vma, vaddr, pfn, size, prot)
471
472void pgtable_cache_init(void);
473
474/*
475 * find_linux_pte returns the address of a linux pte for a given
476 * effective address and directory. If not found, it returns zero.
477 */static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
478{
479 pgd_t *pg;
480 pud_t *pu;
481 pmd_t *pm;
482 pte_t *pt = NULL;
483
484 pg = pgdir + pgd_index(ea);
485 if (!pgd_none(*pg)) {
486 pu = pud_offset(pg, ea);
487 if (!pud_none(*pu)) {
488 pm = pmd_offset(pu, ea);
489 if (pmd_present(*pm))
490 pt = pte_offset_kernel(pm, ea);
491 }
492 }
493 return pt;
494}
495
496
497#include <asm-generic/pgtable.h> 12#include <asm-generic/pgtable.h>
498
499#endif /* __ASSEMBLY__ */ 13#endif /* __ASSEMBLY__ */
500 14
501#endif /* CONFIG_PPC64 */
502#endif /* __KERNEL__ */ 15#endif /* __KERNEL__ */
503#endif /* _ASM_POWERPC_PGTABLE_H */ 16#endif /* _ASM_POWERPC_PGTABLE_H */
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