diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2008-07-24 00:27:08 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-24 13:47:15 -0400 |
commit | a1f242ff460e4b50a045fa237c3c56cce9eabf83 (patch) | |
tree | 657766b55251042b38967422dc9c3ea893b98747 /include/asm-powerpc/pgtable-ppc64.h | |
parent | 7ae8ed5053a39082d224a3f48409e016baca9c16 (diff) |
powerpc ioremap_prot
This adds ioremap_prot and pte_pgprot() so that one can extract protection
bits from a PTE and use them to ioremap_prot() (in order to support ptrace
of VM_IO | VM_PFNMAP as per Rik's patch).
This moves a couple of flag checks around in the ioremap implementations
of arch/powerpc. There's a side effect of allowing non-cacheable and
non-guarded mappings on ppc32 which before would always have _PAGE_GUARDED
set whenever _PAGE_NO_CACHE is.
(standard ioremap will still set _PAGE_GUARDED, but ioremap_prot will be
capable of setting such a non guarded mapping).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Rik van Riel <riel@redhat.com>
Cc: Dave Airlie <airlied@linux.ie>
Cc: Hugh Dickins <hugh@veritas.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-powerpc/pgtable-ppc64.h')
-rw-r--r-- | include/asm-powerpc/pgtable-ppc64.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h index ab98a9c80b28..ba8000352b9a 100644 --- a/include/asm-powerpc/pgtable-ppc64.h +++ b/include/asm-powerpc/pgtable-ppc64.h | |||
@@ -117,6 +117,10 @@ | |||
117 | #define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE) | 117 | #define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE) |
118 | #define HAVE_PAGE_AGP | 118 | #define HAVE_PAGE_AGP |
119 | 119 | ||
120 | #define PAGE_PROT_BITS __pgprot(_PAGE_GUARDED | _PAGE_COHERENT | \ | ||
121 | _PAGE_NO_CACHE | _PAGE_WRITETHRU | \ | ||
122 | _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \ | ||
123 | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC) | ||
120 | /* PTEIDX nibble */ | 124 | /* PTEIDX nibble */ |
121 | #define _PTEIDX_SECONDARY 0x8 | 125 | #define _PTEIDX_SECONDARY 0x8 |
122 | #define _PTEIDX_GROUP_IX 0x7 | 126 | #define _PTEIDX_GROUP_IX 0x7 |
@@ -262,6 +266,10 @@ static inline pte_t pte_mkhuge(pte_t pte) { | |||
262 | return pte; } | 266 | return pte; } |
263 | static inline pte_t pte_mkspecial(pte_t pte) { | 267 | static inline pte_t pte_mkspecial(pte_t pte) { |
264 | return pte; } | 268 | return pte; } |
269 | static inline unsigned long pte_pgprot(pte_t pte) | ||
270 | { | ||
271 | return __pgprot(pte_val(pte)) & PAGE_PROT_BITS; | ||
272 | } | ||
265 | 273 | ||
266 | /* Atomic PTE updates */ | 274 | /* Atomic PTE updates */ |
267 | static inline unsigned long pte_update(struct mm_struct *mm, | 275 | static inline unsigned long pte_update(struct mm_struct *mm, |