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authorDavid Gibson <david@gibson.dropbear.id.au>2007-05-07 22:46:49 -0400
committerPaul Mackerras <paulus@samba.org>2007-05-07 23:40:31 -0400
commitd1953c8888ef034b912ee33bc2ea2cce6a414402 (patch)
tree525e581603a2dd8622b821304440b6ce14b535ae /include/asm-powerpc/pgtable-ppc32.h
parent00c2ae35bd50664bcd841becc6efceef8aa5d074 (diff)
[POWERPC] Remove use of 4level-fixup.h for ppc32
For 32-bit systems, powerpc still relies on the 4level-fixup.h hack, to pretend that the generic pagetable handling stuff is 3-levels rather than 4. This patch removes this, instead using the newer pgtable-nopmd.h to handle the elision of both the pud and pmd pagetable levels (ppc32 pagetables are actually 2 levels). This removes a little extraneous code, and makes it more easily compared to the 64-bit pagetable code. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/pgtable-ppc32.h')
-rw-r--r--include/asm-powerpc/pgtable-ppc32.h30
1 files changed, 2 insertions, 28 deletions
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h
index e704640b3e48..09662a24f226 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -1,7 +1,7 @@
1#ifndef _ASM_POWERPC_PGTABLE_PPC32_H 1#ifndef _ASM_POWERPC_PGTABLE_PPC32_H
2#define _ASM_POWERPC_PGTABLE_PPC32_H 2#define _ASM_POWERPC_PGTABLE_PPC32_H
3 3
4#include <asm-generic/4level-fixup.h> 4#include <asm-generic/pgtable-nopmd.h>
5 5
6#ifndef __ASSEMBLY__ 6#ifndef __ASSEMBLY__
7#include <linux/sched.h> 7#include <linux/sched.h>
@@ -76,13 +76,8 @@ extern unsigned long ioremap_bot, ioremap_base;
76 * level has 2048 entries and the second level has 512 64-bit PTE entries. 76 * level has 2048 entries and the second level has 512 64-bit PTE entries.
77 * -Matt 77 * -Matt
78 */ 78 */
79/* PMD_SHIFT determines the size of the area mapped by the PTE pages */
80#define PMD_SHIFT (PAGE_SHIFT + PTE_SHIFT)
81#define PMD_SIZE (1UL << PMD_SHIFT)
82#define PMD_MASK (~(PMD_SIZE-1))
83
84/* PGDIR_SHIFT determines what a top-level page table entry can map */ 79/* PGDIR_SHIFT determines what a top-level page table entry can map */
85#define PGDIR_SHIFT PMD_SHIFT 80#define PGDIR_SHIFT (PAGE_SHIFT + PTE_SHIFT)
86#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 81#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
87#define PGDIR_MASK (~(PGDIR_SIZE-1)) 82#define PGDIR_MASK (~(PGDIR_SIZE-1))
88 83
@@ -103,8 +98,6 @@ extern unsigned long ioremap_bot, ioremap_base;
103#define pte_ERROR(e) \ 98#define pte_ERROR(e) \
104 printk("%s:%d: bad pte %llx.\n", __FILE__, __LINE__, \ 99 printk("%s:%d: bad pte %llx.\n", __FILE__, __LINE__, \
105 (unsigned long long)pte_val(e)) 100 (unsigned long long)pte_val(e))
106#define pmd_ERROR(e) \
107 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
108#define pgd_ERROR(e) \ 101#define pgd_ERROR(e) \
109 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 102 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
110 103
@@ -516,19 +509,6 @@ extern unsigned long empty_zero_page[1024];
516 509
517#ifndef __ASSEMBLY__ 510#ifndef __ASSEMBLY__
518/* 511/*
519 * The "pgd_xxx()" functions here are trivial for a folded two-level
520 * setup: the pgd is never bad, and a pmd always exists (as it's folded
521 * into the pgd entry)
522 */
523static inline int pgd_none(pgd_t pgd) { return 0; }
524static inline int pgd_bad(pgd_t pgd) { return 0; }
525static inline int pgd_present(pgd_t pgd) { return 1; }
526#define pgd_clear(xp) do { } while (0)
527
528#define pgd_page_vaddr(pgd) \
529 ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
530
531/*
532 * The following only work if pte_present() is true. 512 * The following only work if pte_present() is true.
533 * Undefined behaviour if not.. 513 * Undefined behaviour if not..
534 */ 514 */
@@ -737,12 +717,6 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
737#define pgd_index(address) ((address) >> PGDIR_SHIFT) 717#define pgd_index(address) ((address) >> PGDIR_SHIFT)
738#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 718#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
739 719
740/* Find an entry in the second-level page table.. */
741static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
742{
743 return (pmd_t *) dir;
744}
745
746/* Find an entry in the third-level page table.. */ 720/* Find an entry in the third-level page table.. */
747#define pte_index(address) \ 721#define pte_index(address) \
748 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 722 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))