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authorKumar Gala <galak@kernel.crashing.org>2007-06-27 01:16:25 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-06-29 02:58:31 -0400
commit5531e41bf41b5bc34e3cb57af89b58a24fc0dd8d (patch)
tree230302da852ef653e6e940906d01def6fe1cf8bf /include/asm-powerpc/pci-bridge.h
parent20243c72a8564ccd22437fd1bda16ca5bccd5701 (diff)
[POWERPC] Merge asm-ppc/pci-bridge.h into asm-power/pci-bridge.h
Moved bits need for ppc32 from asm-ppc/pci-bridge.h into asm-powerpc/pci-bridge.h. Removed ARCH=powerpc specific bits (and comments related to ARCH=ppc) from asm-ppc/pci-bridge.h as its only used on ARCH=ppc. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-powerpc/pci-bridge.h')
-rw-r--r--include/asm-powerpc/pci-bridge.h138
1 files changed, 120 insertions, 18 deletions
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index 5261527ed7b1..b0325931c324 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -3,7 +3,103 @@
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5#ifndef CONFIG_PPC64 5#ifndef CONFIG_PPC64
6#include <asm-ppc/pci-bridge.h> 6#include <linux/ioport.h>
7#include <linux/pci.h>
8
9struct device_node;
10struct pci_controller;
11
12/*
13 * pci_io_base returns the memory address at which you can access
14 * the I/O space for PCI bus number `bus' (or NULL on error).
15 */
16extern void __iomem *pci_bus_io_base(unsigned int bus);
17extern unsigned long pci_bus_io_base_phys(unsigned int bus);
18extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
19
20/* Allocate a new PCI host bridge structure */
21extern struct pci_controller* pcibios_alloc_controller(void);
22
23/* Helper function for setting up resources */
24extern void pci_init_resource(struct resource *res, resource_size_t start,
25 resource_size_t end, int flags, char *name);
26
27/* Get the PCI host controller for a bus */
28extern struct pci_controller* pci_bus_to_hose(int bus);
29
30/*
31 * Structure of a PCI controller (host bridge)
32 */
33struct pci_controller {
34 struct pci_bus *bus;
35 void *arch_data;
36 int index; /* PCI domain number */
37 struct pci_controller *next;
38 struct device *parent;
39
40 int first_busno;
41 int last_busno;
42 int self_busno;
43
44 void __iomem *io_base_virt;
45 resource_size_t io_base_phys;
46
47 /* Some machines (PReP) have a non 1:1 mapping of
48 * the PCI memory space in the CPU bus space
49 */
50 resource_size_t pci_mem_offset;
51
52 struct pci_ops *ops;
53 volatile unsigned int __iomem *cfg_addr;
54 volatile void __iomem *cfg_data;
55
56 /*
57 * Used for variants of PCI indirect handling and possible quirks:
58 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
59 * EXT_REG - provides access to PCI-e extended registers
60 * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS
61 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
62 * to determine which bus number to match on when generating type0
63 * config cycles
64 */
65#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001)
66#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002)
67#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004)
68 u32 indirect_type;
69
70 /* Currently, we limit ourselves to 1 IO range and 3 mem
71 * ranges since the common pci_bus structure can't handle more
72 */
73 struct resource io_resource;
74 struct resource mem_resources[3];
75};
76
77static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
78{
79 return bus->sysdata;
80}
81
82/* These are used for config access before all the PCI probing
83 has been done. */
84int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn,
85 int where, u8 *val);
86int early_read_config_word(struct pci_controller *hose, int bus, int dev_fn,
87 int where, u16 *val);
88int early_read_config_dword(struct pci_controller *hose, int bus, int dev_fn,
89 int where, u32 *val);
90int early_write_config_byte(struct pci_controller *hose, int bus, int dev_fn,
91 int where, u8 val);
92int early_write_config_word(struct pci_controller *hose, int bus, int dev_fn,
93 int where, u16 val);
94int early_write_config_dword(struct pci_controller *hose, int bus, int dev_fn,
95 int where, u32 val);
96
97extern void setup_indirect_pci_nomap(struct pci_controller* hose,
98 void __iomem *cfg_addr, void __iomem *cfg_data);
99extern void setup_indirect_pci(struct pci_controller* hose,
100 u32 cfg_addr, u32 cfg_data);
101extern void setup_grackle(struct pci_controller *hose);
102
7#else 103#else
8 104
9#include <linux/pci.h> 105#include <linux/pci.h>
@@ -49,8 +145,8 @@ struct pci_controller {
49 */ 145 */
50 struct resource io_resource; 146 struct resource io_resource;
51 struct resource mem_resources[3]; 147 struct resource mem_resources[3];
52 int global_number; 148 int global_number;
53 int local_number; 149 int local_number;
54 unsigned long buid; 150 unsigned long buid;
55 unsigned long dma_window_base_cur; 151 unsigned long dma_window_base_cur;
56 unsigned long dma_window_size; 152 unsigned long dma_window_size;
@@ -132,9 +228,6 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
132/** Find the bus corresponding to the indicated device node */ 228/** Find the bus corresponding to the indicated device node */
133struct pci_bus * pcibios_find_pci_bus(struct device_node *dn); 229struct pci_bus * pcibios_find_pci_bus(struct device_node *dn);
134 230
135extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
136 struct device_node *dev, int primary);
137
138/** Remove all of the PCI devices under this bus */ 231/** Remove all of the PCI devices under this bus */
139void pcibios_remove_pci_devices(struct pci_bus *bus); 232void pcibios_remove_pci_devices(struct pci_bus *bus);
140 233
@@ -152,22 +245,10 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
152 return PCI_DN(busdn)->phb; 245 return PCI_DN(busdn)->phb;
153} 246}
154 247
155extern struct pci_controller*
156pci_find_hose_for_OF_device(struct device_node* node);
157
158extern struct pci_controller * 248extern struct pci_controller *
159pcibios_alloc_controller(struct device_node *dev); 249pcibios_alloc_controller(struct device_node *dev);
160extern void pcibios_free_controller(struct pci_controller *phb); 250extern void pcibios_free_controller(struct pci_controller *phb);
161 251
162#ifdef CONFIG_PCI
163extern unsigned long pci_address_to_pio(phys_addr_t address);
164#else
165static inline unsigned long pci_address_to_pio(phys_addr_t address)
166{
167 return (unsigned long)-1;
168}
169#endif
170
171extern void isa_bridge_find_early(struct pci_controller *hose); 252extern void isa_bridge_find_early(struct pci_controller *hose);
172 253
173extern int pcibios_unmap_io_space(struct pci_bus *bus); 254extern int pcibios_unmap_io_space(struct pci_bus *bus);
@@ -185,5 +266,26 @@ extern int pcibios_map_io_space(struct pci_bus *bus);
185#endif 266#endif
186 267
187#endif /* CONFIG_PPC64 */ 268#endif /* CONFIG_PPC64 */
269
270/* Get the PCI host controller for an OF device */
271extern struct pci_controller*
272pci_find_hose_for_OF_device(struct device_node* node);
273
274/* Fill up host controller resources from the OF node */
275extern void
276pci_process_bridge_OF_ranges(struct pci_controller *hose,
277 struct device_node *dev, int primary);
278
279#ifdef CONFIG_PCI
280extern unsigned long pci_address_to_pio(phys_addr_t address);
281#else
282static inline unsigned long pci_address_to_pio(phys_addr_t address)
283{
284 return (unsigned long)-1;
285}
286#endif
287
288
289
188#endif /* __KERNEL__ */ 290#endif /* __KERNEL__ */
189#endif 291#endif