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authorOlof Johansson <olof@lixom.net>2008-03-05 17:34:16 -0500
committerOlof Johansson <olof@lixom.net>2008-03-05 17:34:39 -0500
commit8d636d8bc5ffcdbf49c72aafcda9ddab7ccb2f41 (patch)
tree0f441b124752959ba723c87aa471df196f556013 /include/asm-powerpc/pasemi_dma.h
parentdda56df08a28404004bca313d2a1ba1597acd755 (diff)
pasemi_mac: jumbo frame support
First cut at jumbo frame support. To support large MTU, one or several separate channels must be allocated to calculate the TCP/UDP checksum separately, since the mac lacks enough buffers to hold a whole packet while it's being calculated. Furthermore, it seems that a single function channel is not quite enough to feed one of the 10Gig links, so allocate two channels for XAUI interfaces. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'include/asm-powerpc/pasemi_dma.h')
-rw-r--r--include/asm-powerpc/pasemi_dma.h60
1 files changed, 58 insertions, 2 deletions
diff --git a/include/asm-powerpc/pasemi_dma.h b/include/asm-powerpc/pasemi_dma.h
index facb2bdea45c..19fd7933e2d9 100644
--- a/include/asm-powerpc/pasemi_dma.h
+++ b/include/asm-powerpc/pasemi_dma.h
@@ -128,11 +128,16 @@ enum {
128#define PAS_DMA_TXCHAN_TCMDSTA_DA 0x00000100 128#define PAS_DMA_TXCHAN_TCMDSTA_DA 0x00000100
129#define PAS_DMA_TXCHAN_CFG(c) (0x304+(c)*_PAS_DMA_TXCHAN_STRIDE) 129#define PAS_DMA_TXCHAN_CFG(c) (0x304+(c)*_PAS_DMA_TXCHAN_STRIDE)
130#define PAS_DMA_TXCHAN_CFG_TY_IFACE 0x00000000 /* Type = interface */ 130#define PAS_DMA_TXCHAN_CFG_TY_IFACE 0x00000000 /* Type = interface */
131#define PAS_DMA_TXCHAN_CFG_TY_COPY 0x00000001 /* Type = copy only */
132#define PAS_DMA_TXCHAN_CFG_TY_FUNC 0x00000002 /* Type = function */
133#define PAS_DMA_TXCHAN_CFG_TY_XOR 0x00000003 /* Type = xor only */
131#define PAS_DMA_TXCHAN_CFG_TATTR_M 0x0000003c 134#define PAS_DMA_TXCHAN_CFG_TATTR_M 0x0000003c
132#define PAS_DMA_TXCHAN_CFG_TATTR_S 2 135#define PAS_DMA_TXCHAN_CFG_TATTR_S 2
133#define PAS_DMA_TXCHAN_CFG_TATTR(x) (((x) << PAS_DMA_TXCHAN_CFG_TATTR_S) & \ 136#define PAS_DMA_TXCHAN_CFG_TATTR(x) (((x) << PAS_DMA_TXCHAN_CFG_TATTR_S) & \
134 PAS_DMA_TXCHAN_CFG_TATTR_M) 137 PAS_DMA_TXCHAN_CFG_TATTR_M)
135#define PAS_DMA_TXCHAN_CFG_WT_M 0x000001c0 138#define PAS_DMA_TXCHAN_CFG_LPDQ 0x00000800
139#define PAS_DMA_TXCHAN_CFG_LPSQ 0x00000400
140#define PAS_DMA_TXCHAN_CFG_WT_M 0x000003c0
136#define PAS_DMA_TXCHAN_CFG_WT_S 6 141#define PAS_DMA_TXCHAN_CFG_WT_S 6
137#define PAS_DMA_TXCHAN_CFG_WT(x) (((x) << PAS_DMA_TXCHAN_CFG_WT_S) & \ 142#define PAS_DMA_TXCHAN_CFG_WT(x) (((x) << PAS_DMA_TXCHAN_CFG_WT_S) & \
138 PAS_DMA_TXCHAN_CFG_WT_M) 143 PAS_DMA_TXCHAN_CFG_WT_M)
@@ -399,11 +404,62 @@ enum {
399 XCT_COPY_LLEN_M) 404 XCT_COPY_LLEN_M)
400#define XCT_COPY_SE 0x0000000000000001ull 405#define XCT_COPY_SE 0x0000000000000001ull
401 406
407/* Function descriptor fields */
408#define XCT_FUN_T 0x8000000000000000ull
409#define XCT_FUN_ST 0x4000000000000000ull
410#define XCT_FUN_RR_M 0x3000000000000000ull
411#define XCT_FUN_RR_NORES 0x0000000000000000ull
412#define XCT_FUN_RR_8BRES 0x1000000000000000ull
413#define XCT_FUN_RR_24BRES 0x2000000000000000ull
414#define XCT_FUN_RR_40BRES 0x3000000000000000ull
415#define XCT_FUN_I 0x0800000000000000ull
416#define XCT_FUN_O 0x0400000000000000ull
417#define XCT_FUN_E 0x0200000000000000ull
418#define XCT_FUN_FUN_M 0x01c0000000000000ull
419#define XCT_FUN_FUN_S 54
420#define XCT_FUN_FUN(x) ((((long)(x)) << XCT_FUN_FUN_S) & XCT_FUN_FUN_M)
421#define XCT_FUN_CRM_M 0x0038000000000000ull
422#define XCT_FUN_CRM_NOP 0x0000000000000000ull
423#define XCT_FUN_CRM_SIG 0x0008000000000000ull
424#define XCT_FUN_LLEN_M 0x0007ffff00000000ull
425#define XCT_FUN_LLEN_S 32
426#define XCT_FUN_LLEN(x) ((((long)(x)) << XCT_FUN_LLEN_S) & XCT_FUN_LLEN_M)
427#define XCT_FUN_SHL_M 0x00000000f8000000ull
428#define XCT_FUN_SHL_S 27
429#define XCT_FUN_SHL(x) ((((long)(x)) << XCT_FUN_SHL_S) & XCT_FUN_SHL_M)
430#define XCT_FUN_CHL_M 0x0000000007c00000ull
431#define XCT_FUN_HSZ_M 0x00000000003c0000ull
432#define XCT_FUN_ALG_M 0x0000000000038000ull
433#define XCT_FUN_HP 0x0000000000004000ull
434#define XCT_FUN_BCM_M 0x0000000000003800ull
435#define XCT_FUN_BCP_M 0x0000000000000600ull
436#define XCT_FUN_SIG_M 0x00000000000001f0ull
437#define XCT_FUN_SIG_TCP4 0x0000000000000140ull
438#define XCT_FUN_SIG_TCP6 0x0000000000000150ull
439#define XCT_FUN_SIG_UDP4 0x0000000000000160ull
440#define XCT_FUN_SIG_UDP6 0x0000000000000170ull
441#define XCT_FUN_A 0x0000000000000008ull
442#define XCT_FUN_C 0x0000000000000004ull
443#define XCT_FUN_AL2 0x0000000000000002ull
444#define XCT_FUN_SE 0x0000000000000001ull
445
446/* Function descriptor 8byte result fields */
447#define XCT_FUNRES_8B_CS_M 0x0000ffff00000000ull
448#define XCT_FUNRES_8B_CS_S 32
449#define XCT_FUNRES_8B_CRC_M 0x00000000ffffffffull
450#define XCT_FUNRES_8B_CRC_S 0
451
402/* Control descriptor fields */ 452/* Control descriptor fields */
403#define CTRL_CMD_T 0x8000000000000000ull 453#define CTRL_CMD_T 0x8000000000000000ull
404#define CTRL_CMD_META_EVT 0x2000000000000000ull 454#define CTRL_CMD_META_EVT 0x2000000000000000ull
405#define CTRL_CMD_O 0x0400000000000000ull 455#define CTRL_CMD_O 0x0400000000000000ull
406#define CTRL_CMD_REG_M 0x000000000000000full 456#define CTRL_CMD_ETYPE_M 0x0038000000000000ull
457#define CTRL_CMD_ETYPE_EXT 0x0000000000000000ull
458#define CTRL_CMD_ETYPE_WSET 0x0020000000000000ull
459#define CTRL_CMD_ETYPE_WCLR 0x0028000000000000ull
460#define CTRL_CMD_ETYPE_SET 0x0030000000000000ull
461#define CTRL_CMD_ETYPE_CLR 0x0038000000000000ull
462#define CTRL_CMD_REG_M 0x000000000000007full
407#define CTRL_CMD_REG_S 0 463#define CTRL_CMD_REG_S 0
408#define CTRL_CMD_REG(x) ((((long)(x)) << CTRL_CMD_REG_S) & \ 464#define CTRL_CMD_REG(x) ((((long)(x)) << CTRL_CMD_REG_S) & \
409 CTRL_CMD_REG_M) 465 CTRL_CMD_REG_M)