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authorPaul Mackerras <paulus@samba.org>2005-10-20 06:53:39 -0400
committerPaul Mackerras <paulus@samba.org>2005-10-20 06:53:39 -0400
commitff065ddd96c233d27322de493fa023357939c888 (patch)
treeb60d8a362dea386d1cec91422fd18f92da244ffd /include/asm-powerpc/ohare.h
parent0dd194d02d2584c34e06ddd26c7a7896a5fa1974 (diff)
powerpc: Merge various powermac-related header files.
Except for smu.h, which moved from asm-ppc64 to asm-powerpc, all of these moved from asm-ppc to asm-powerpc. In each case the asm-ppc64 version (if there was one) was just a single line including the asm-ppc version. Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/ohare.h')
-rw-r--r--include/asm-powerpc/ohare.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/include/asm-powerpc/ohare.h b/include/asm-powerpc/ohare.h
new file mode 100644
index 000000000000..023b59772231
--- /dev/null
+++ b/include/asm-powerpc/ohare.h
@@ -0,0 +1,48 @@
1/*
2 * ohare.h: definitions for using the "O'Hare" I/O controller chip.
3 *
4 * Copyright (C) 1997 Paul Mackerras.
5 *
6 * BenH: Changed to match those of heathrow (but not all of them). Please
7 * check if I didn't break anything (especially the media bay).
8 */
9
10/* offset from ohare base for feature control register */
11#define OHARE_MBCR 0x34
12#define OHARE_FCR 0x38
13
14/*
15 * Bits in feature control register.
16 * These were mostly derived by experiment on a powerbook 3400
17 * and may differ for other machines.
18 */
19#define OH_SCC_RESET 1
20#define OH_BAY_POWER_N 2 /* a guess */
21#define OH_BAY_PCI_ENABLE 4 /* a guess */
22#define OH_BAY_IDE_ENABLE 8
23#define OH_BAY_FLOPPY_ENABLE 0x10
24#define OH_IDE0_ENABLE 0x20
25#define OH_IDE0_RESET_N 0x40 /* a guess */
26#define OH_BAY_DEV_MASK 0x1c
27#define OH_BAY_RESET_N 0x80
28#define OH_IOBUS_ENABLE 0x100 /* IOBUS seems to be IDE */
29#define OH_SCC_ENABLE 0x200
30#define OH_MESH_ENABLE 0x400
31#define OH_FLOPPY_ENABLE 0x800
32#define OH_SCCA_IO 0x4000
33#define OH_SCCB_IO 0x8000
34#define OH_VIA_ENABLE 0x10000 /* Is apparently wrong, to be verified */
35#define OH_IDE1_RESET_N 0x800000
36
37/*
38 * Bits to set in the feature control register on PowerBooks.
39 */
40#define PBOOK_FEATURES (OH_IDE_ENABLE | OH_SCC_ENABLE | \
41 OH_MESH_ENABLE | OH_SCCA_IO | OH_SCCB_IO)
42
43/*
44 * A magic value to put into the feature control register of the
45 * "ohare" I/O controller on Starmaxes to enable the IDE CD interface.
46 * Contributed by Harry Eaton.
47 */
48#define STARMAX_FEATURES 0xbeff7a