diff options
author | Mark A. Greer <mgreer@mvista.com> | 2006-06-20 17:15:36 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-06-21 01:01:32 -0400 |
commit | 868ea0c9256b658b14603e1ad7361b81b92ccacd (patch) | |
tree | 6d080ba156f8098277329f26f1d4e3a73cae2093 /include/asm-powerpc/mpic.h | |
parent | 0aa8d15b01881ccaab5f2fb31eef33ced97ccb5f (diff) |
[POWERPC] mpic: add support for serial mode interrupts
On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
> > MPC10x-style interrupt controllers have a serial mode that allows
> > several interrupts to be clocked in through one INT signal.
> >
> > This patch adds the software support for that mode.
>
> You hard code the clock ratio... why not add a separate call to be
> called after mpic_init,
> something like mpic_set_serial_int(int mpic, int enable, int
> clock_ratio) ?
How's this?
--
MPC10x-style interrupt controllers have a serial mode that allows
several interrupts to be clocked in through one INT signal.
This patch adds the software support for that mode.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--
arch/powerpc/sysdev/mpic.c | 20 ++++++++++++++++++++
include/asm-powerpc/mpic.h | 10 ++++++++++
2 files changed, 30 insertions(+)
--
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/mpic.h')
-rw-r--r-- | include/asm-powerpc/mpic.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h index 6b9e78142f4f..f0d22ac34b96 100644 --- a/include/asm-powerpc/mpic.h +++ b/include/asm-powerpc/mpic.h | |||
@@ -22,6 +22,10 @@ | |||
22 | #define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 | 22 | #define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 |
23 | #define MPIC_GREG_GCONF_BASE_MASK 0x000fffff | 23 | #define MPIC_GREG_GCONF_BASE_MASK 0x000fffff |
24 | #define MPIC_GREG_GLOBAL_CONF_1 0x00030 | 24 | #define MPIC_GREG_GLOBAL_CONF_1 0x00030 |
25 | #define MPIC_GREG_GLOBAL_CONF_1_SIE 0x08000000 | ||
26 | #define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK 0x70000000 | ||
27 | #define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(r) \ | ||
28 | (((r) << 28) & MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK) | ||
25 | #define MPIC_GREG_VENDOR_0 0x00040 | 29 | #define MPIC_GREG_VENDOR_0 0x00040 |
26 | #define MPIC_GREG_VENDOR_1 0x00050 | 30 | #define MPIC_GREG_VENDOR_1 0x00050 |
27 | #define MPIC_GREG_VENDOR_2 0x00060 | 31 | #define MPIC_GREG_VENDOR_2 0x00060 |
@@ -284,6 +288,12 @@ extern int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs); | |||
284 | /* This one gets to the primary mpic */ | 288 | /* This one gets to the primary mpic */ |
285 | extern int mpic_get_irq(struct pt_regs *regs); | 289 | extern int mpic_get_irq(struct pt_regs *regs); |
286 | 290 | ||
291 | /* Set the EPIC clock ratio */ | ||
292 | void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio); | ||
293 | |||
294 | /* Enable/Disable EPIC serial interrupt mode */ | ||
295 | void mpic_set_serial_int(struct mpic *mpic, int enable); | ||
296 | |||
287 | /* global mpic for pSeries */ | 297 | /* global mpic for pSeries */ |
288 | extern struct mpic *pSeries_mpic; | 298 | extern struct mpic *pSeries_mpic; |
289 | 299 | ||