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authorMichael Neuling <mikey@neuling.org>2007-12-06 01:24:48 -0500
committerPaul Mackerras <paulus@samba.org>2007-12-10 21:45:56 -0500
commit584f8b71a2e8abdaeb4b6f4fddaf542b61392453 (patch)
treec14f26334e3a3524046f0790f96564a4a4f22d92 /include/asm-powerpc/mmu-hash64.h
parent44ef339073f67d4abcc62ae52a5fbc069d7a4d29 (diff)
[POWERPC] Use SLB size from the device tree
Currently we hardwire the number of SLBs to 64, but PAPR says we should use the ibm,slb-size property to obtain the number of SLB entries. This uses this property instead of assuming 64. If no property is found, we assume 64 entries as before. This soft patches the SLB handler, so it shouldn't change performance at all. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/mmu-hash64.h')
-rw-r--r--include/asm-powerpc/mmu-hash64.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index 82328dec2b52..12e5e773c67e 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -180,6 +180,7 @@ extern int mmu_vmalloc_psize;
180extern int mmu_io_psize; 180extern int mmu_io_psize;
181extern int mmu_kernel_ssize; 181extern int mmu_kernel_ssize;
182extern int mmu_highuser_ssize; 182extern int mmu_highuser_ssize;
183extern u16 mmu_slb_size;
183 184
184/* 185/*
185 * If the processor supports 64k normal pages but not 64k cache 186 * If the processor supports 64k normal pages but not 64k cache