aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-powerpc/mmu-hash32.h
diff options
context:
space:
mode:
authorBecky Bruce <becky.bruce@freescale.com>2008-06-13 19:41:43 -0400
committerPaul Mackerras <paulus@samba.org>2008-06-30 08:31:05 -0400
commit316a405841cc03723d401b098d188aa4e3daa69b (patch)
tree476be4fad16c690d1650890757aacc3095e85129 /include/asm-powerpc/mmu-hash32.h
parent7c5c4325d2d911fe54db3bc14149bfa558ae0acb (diff)
powerpc: Get rid of bitfields in ppc_bat struct
While working on the 36-bit physical support, I noticed that there was exactly one line of code that actually referenced the bitfields. So I got rid of them and redefined ppc_bat as a struct of 2 u32's: batu and batl. I also got rid of the previous union that held the bitfield structs and a word representation of the batu/l values. This seems like a nicer solution than adding in a bunch of new bitfields to support extended bat addressing that would never get used, and just leaving the struct as-is would have been incomplete in the face of large physical addressing. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/mmu-hash32.h')
-rw-r--r--include/asm-powerpc/mmu-hash32.h19
1 files changed, 2 insertions, 17 deletions
diff --git a/include/asm-powerpc/mmu-hash32.h b/include/asm-powerpc/mmu-hash32.h
index f39ff983b381..16b1a1e77e64 100644
--- a/include/asm-powerpc/mmu-hash32.h
+++ b/include/asm-powerpc/mmu-hash32.h
@@ -38,23 +38,8 @@
38#endif 38#endif
39 39
40struct ppc_bat { 40struct ppc_bat {
41 struct { 41 u32 batu;
42 unsigned long bepi:15; /* Effective page index (virtual address) */ 42 u32 batl;
43 unsigned long :4; /* Unused */
44 unsigned long bl:11; /* Block size mask */
45 unsigned long vs:1; /* Supervisor valid */
46 unsigned long vp:1; /* User valid */
47 } batu; /* Upper register */
48 struct {
49 unsigned long brpn:15; /* Real page index (physical address) */
50 unsigned long :10; /* Unused */
51 unsigned long w:1; /* Write-thru cache */
52 unsigned long i:1; /* Cache inhibit */
53 unsigned long m:1; /* Memory coherence */
54 unsigned long g:1; /* Guarded (MBZ in IBAT) */
55 unsigned long :1; /* Unused */
56 unsigned long pp:2; /* Page access protections */
57 } batl; /* Lower register */
58}; 43};
59#endif /* !__ASSEMBLY__ */ 44#endif /* !__ASSEMBLY__ */
60 45