Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (114 commits)
  [POWERPC] Fix ohare IDE irq workaround on old powermacs
  [POWERPC] EEH: Power4 systems sometimes need multiple resets.
  [POWERPC] Include <asm/mmu.h> in arch/powerpc/sysdev/fsl_soc.h for phys_addr_t.
  [POWERPC] Demacrofy arch/powerpc/platforms/maple/pci.c
  [POWERPC] Maple U3 HT - reject inappropriate config space access
  [POWERPC] Fix IPIC pending register assignments
  [POWERPC] powerpc: fix building gdb against asm/ptrace.h
  [POWERPC] Remove DISCONTIGMEM cruft from page.h
  [POWERPC] Merge iSeries i/o operations with the rest
  [POWERPC] 40x: Fix debug status register defines
  [POWERPC] Fix compile error in sbc8560
  [POWERPC] EEH: support MMIO enable recovery step
  [POWERPC] EEH: enable MMIO/DMA on frozen slot
  [POWERPC] EEH: code comment cleanup
  [POWERPC] EEH: balance pcidev_get/put calls
  [POWERPC] PPC: Fix xmon stack frame address in backtrace
  [POWERPC] Add AT_PLATFORM value for Xilinx Virtex-4 FX
  [POWERPC] Start arch/powerpc/boot code reorganization
  [POWERPC] Define of_read_ulong helper
  [POWERPC] iseries: eliminate a couple of warnings
  ...

1 files changed, 21 insertions, 2 deletions

diff --git a/include/asm-powerpc/lppaca.h b/include/asm-powerpc/lppaca.h
index 4dc514aabfe7..821ea0c512b4 100644
--- a/include/asm-powerpc/lppaca.h
+++ b/include/asm-powerpc/lppaca.h
@@ -27,7 +27,9 @@
 //
 //
 //----------------------------------------------------------------------------
+#include <linux/cache.h>
 #include <asm/types.h>
+#include <asm/mmu.h>
 
 /* The Hypervisor barfs if the lppaca crosses a page boundary.  A 1k
  * alignment is sufficient to prevent this */
@@ -114,7 +116,7 @@ struct lppaca {
 
 
 //=============================================================================
-// CACHE_LINE_3 0x0100 - 0x007F: This line is shared with other processors
+// CACHE_LINE_3 0x0100 - 0x017F: This line is shared with other processors
 //=============================================================================
         // This is the yield_count.  An "odd" value (low bit on) means that
         // the processor is yielded (either because of an OS yield or a PLIC
@@ -126,12 +128,29 @@ struct lppaca {
         u8      reserved6[124];         // Reserved                     x04-x7F
 
 //=============================================================================
-// CACHE_LINE_4-5 0x0100 - 0x01FF Contains PMC interrupt data
+// CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data
 //=============================================================================
         u8      pmc_save_area[256];     // PMC interrupt Area           x00-xFF
 } __attribute__((__aligned__(0x400)));
 
 extern struct lppaca lppaca[];
 
+/*
+ * SLB shadow buffer structure as defined in the PAPR.  The save_area
+ * contains adjacent ESID and VSID pairs for each shadowed SLB.  The
+ * ESID is stored in the lower 64bits, then the VSID.
+ */
+struct slb_shadow {
+        u32     persistent;             // Number of persistent SLBs    x00-x03
+        u32     buffer_length;          // Total shadow buffer length   x04-x07
+        u64     reserved;               // Alignment                    x08-x0f
+        struct  {
+                u64     esid;
+                u64     vsid;
+        } save_area[SLB_NUM_BOLTED];    //                              x10-x40
+} ____cacheline_aligned;
+
+extern struct slb_shadow slb_shadow[];
+
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_LPPACA_H */