[POWERPC] qe: miscellaneous code improvements and fixes to the QE library

This patch makes numerous miscellaneous code improvements to the QE library.

1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type()
   (every caller of ucc_init_guemr() also calls ucc_set_type()).  Modify all
   callers of ucc_set_type() accordingly.

2. Remove the unused enum ucc_pram_initial_offset.

3. Refactor qe_setbrg(), also implement work-around for errata QE_General4.

4. Several printk() calls were missing the terminating \n.

5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where
   appropriate.

6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed
   with the wrong value.

7. Add the protocol type to struct us_info and updated ucc_slow_init() to
   use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED.

8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx()

9. Add several macros in qe.h (mostly for slow UCC support, but also to
   standardize some naming convention) and remove several unused macros.

10. Update ucc_geth.c to use the new macros.

11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol
    to use when initializing the UCC in ucc_slow_init().

12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since
    these are the real names of the registers.

13. Use the setbits, clrbits, and clrsetbits where appropriate.

14. Refactor ucc_set_qe_mux_rxtx().

15. Remove all instances of 'volatile'.

16. Simplify get_cmxucr_reg();

17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[].

18. Updated struct ucc_geth because struct ucc_fast is not padded any more.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 10 insertions, 20 deletions

diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h
index 02548f74ccb7..aba9806b31c9 100644
--- a/include/asm-powerpc/immap_qe.h
+++ b/include/asm-powerpc/immap_qe.h
@@ -97,10 +97,7 @@ struct qe_mux {
         __be32  cmxsi1cr_l;     /* CMX SI1 clock route low register */
         __be32  cmxsi1cr_h;     /* CMX SI1 clock route high register */
         __be32  cmxsi1syr;      /* CMX SI1 SYNC route register */
-        __be32  cmxucr1;        /* CMX UCC1, UCC3 clock route register */
-        __be32  cmxucr2;        /* CMX UCC5, UCC7 clock route register */
-        __be32  cmxucr3;        /* CMX UCC2, UCC4 clock route register */
-        __be32  cmxucr4;        /* CMX UCC6, UCC8 clock route register */
+        __be32  cmxucr[4];      /* CMX UCCx clock route registers */
         __be32  cmxupcr;        /* CMX UPC clock route register */
         u8      res0[0x1C];
 } __attribute__ ((packed));
@@ -261,7 +258,6 @@ struct ucc_slow {
         __be16  utpt;
         u8      res4[0x52];
         u8      guemr;          /* UCC general extended mode register */
-        u8      res5[0x200 - 0x091];
 } __attribute__ ((packed));
 
 /* QE UCC Fast */
@@ -294,21 +290,13 @@ struct ucc_fast {
         __be32  urtry;          /* UCC retry counter register */
         u8      res8[0x4C];
         u8      guemr;          /* UCC general extended mode register */
-        u8      res9[0x100 - 0x091];
-} __attribute__ ((packed));
-
-/* QE UCC */
-struct ucc_common {
-        u8      res1[0x90];
-        u8      guemr;
-        u8      res2[0x200 - 0x091];
 } __attribute__ ((packed));
 
 struct ucc {
         union {
                 struct  ucc_slow slow;
                 struct  ucc_fast fast;
-                struct  ucc_common common;
+                u8      res[0x200];     /* UCC blocks are 512 bytes each */
         };
 } __attribute__ ((packed));
 
@@ -407,7 +395,7 @@ struct dbg {
 
 /* RISC Special Registers (Trap and Breakpoint) */
 struct rsp {
-        u8      fixme[0x100];
+        u32     reg[0x40];      /* 64 32-bit registers */
 } __attribute__ ((packed));
 
 struct qe_immap {
@@ -436,11 +424,13 @@ struct qe_immap {
         u8                      res13[0x600];
         struct upc              upc2;           /* MultiPHY UTOPIA POS Ctrlr 2*/
         struct sdma             sdma;           /* SDMA */
-        struct dbg              dbg;            /* Debug Space */
-        struct rsp              rsp[0x2];       /* RISC Special Registers
+        struct dbg              dbg;            /* 0x104080 - 0x1040FF
+                                                   Debug Space */
+        struct rsp              rsp[0x2];       /* 0x104100 - 0x1042FF
+                                                   RISC Special Registers
                                                    (Trap and Breakpoint) */
-        u8                      res14[0x300];
-        u8                      res15[0x3A00];
+        u8                      res14[0x300];   /* 0x104300 - 0x1045FF */
+        u8                      res15[0x3A00];  /* 0x104600 - 0x107FFF */
         u8                      res16[0x8000];  /* 0x108000 - 0x110000 */
         u8                      muram[0xC000];  /* 0x110000 - 0x11C000
                                                    Multi-user RAM */
@@ -451,7 +441,7 @@ struct qe_immap {
 extern struct qe_immap *qe_immr;
 extern phys_addr_t get_qe_base(void);
 
-static inline unsigned long immrbar_virt_to_phys(volatile void * address)
+static inline unsigned long immrbar_virt_to_phys(void *address)
 {
         if ( ((u32)address >= (u32)qe_immr) &&
                         ((u32)address < ((u32)qe_immr + QE_IMMAP_SIZE)) )