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authorStephen Neuendorffer <stephen.neuendorffer@xilinx.com>2008-05-06 14:29:17 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2008-05-29 08:06:56 -0400
commitb786af117b360843349cf66165c4efa0217ca2a7 (patch)
tree713c515b49003fe2b593703820169ffc326ed4bb /include/asm-powerpc/dcr-native.h
parentacf464817d5e7be9fb67aec4027dbee0ac9be17a (diff)
[POWERPC] Refactor DCR code
Previously, DCR support was configured at compile time to either use MMIO or native dcr instructions. Although this works for most platforms, it fails on FPGA platforms: 1) Systems may include more than one DCR bus. 2) Systems may be native DCR capable and still use memory mapped DCR interface. This patch provides runtime support based on the device trees for the case where CONFIG_PPC_DCR_MMIO and CONFIG_PPC_DCR_NATIVE are both selected. Previously, this was a poorly defined configuration, which happened to provide NATIVE support. The runtime selection is made based on the dcr-controller having a 'dcr-access-method' attribute in the device tree. If only one of the above options is selected, then the code uses #defines to select only the used code in order to avoid introducing overhead in existing usage. Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'include/asm-powerpc/dcr-native.h')
-rw-r--r--include/asm-powerpc/dcr-native.h16
1 files changed, 10 insertions, 6 deletions
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
index f8398ce80372..72d2b72c7390 100644
--- a/include/asm-powerpc/dcr-native.h
+++ b/include/asm-powerpc/dcr-native.h
@@ -26,14 +26,18 @@
26 26
27typedef struct { 27typedef struct {
28 unsigned int base; 28 unsigned int base;
29} dcr_host_t; 29} dcr_host_native_t;
30 30
31#define DCR_MAP_OK(host) (1) 31static inline bool dcr_map_ok_native(dcr_host_native_t host)
32{
33 return 1;
34}
32 35
33#define dcr_map(dev, dcr_n, dcr_c) ((dcr_host_t){ .base = (dcr_n) }) 36#define dcr_map_native(dev, dcr_n, dcr_c) \
34#define dcr_unmap(host, dcr_c) do {} while (0) 37 ((dcr_host_native_t){ .base = (dcr_n) })
35#define dcr_read(host, dcr_n) mfdcr(dcr_n + host.base) 38#define dcr_unmap_native(host, dcr_c) do {} while (0)
36#define dcr_write(host, dcr_n, value) mtdcr(dcr_n + host.base, value) 39#define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
40#define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
37 41
38/* Device Control Registers */ 42/* Device Control Registers */
39void __mtdcr(int reg, unsigned int val); 43void __mtdcr(int reg, unsigned int val);