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authorStephen Rothwell <sfr@canb.auug.org.au>2008-08-01 01:20:30 -0400
committerPaul Mackerras <paulus@samba.org>2008-08-03 22:02:00 -0400
commitb8b572e1015f81b4e748417be2629dfe51ab99f9 (patch)
tree7df58667d5ed71d6c8f8f4ce40ca16b6fb776d0b /include/asm-powerpc/dcr-native.h
parent2b12a4c524812fb3f6ee590a02e65b95c8c32229 (diff)
powerpc: Move include files to arch/powerpc/include/asm
from include/asm-powerpc. This is the result of a mkdir arch/powerpc/include/asm git mv include/asm-powerpc/* arch/powerpc/include/asm Followed by a few documentation/comment fixups and a couple of places where <asm-powepc/...> was being used explicitly. Of the latter only one was outside the arch code and it is a driver only built for powerpc. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/dcr-native.h')
-rw-r--r--include/asm-powerpc/dcr-native.h116
1 files changed, 0 insertions, 116 deletions
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
deleted file mode 100644
index 72d2b72c7390..000000000000
--- a/include/asm-powerpc/dcr-native.h
+++ /dev/null
@@ -1,116 +0,0 @@
1/*
2 * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
3 * <benh@kernel.crashing.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
13 * the GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef _ASM_POWERPC_DCR_NATIVE_H
21#define _ASM_POWERPC_DCR_NATIVE_H
22#ifdef __KERNEL__
23#ifndef __ASSEMBLY__
24
25#include <linux/spinlock.h>
26
27typedef struct {
28 unsigned int base;
29} dcr_host_native_t;
30
31static inline bool dcr_map_ok_native(dcr_host_native_t host)
32{
33 return 1;
34}
35
36#define dcr_map_native(dev, dcr_n, dcr_c) \
37 ((dcr_host_native_t){ .base = (dcr_n) })
38#define dcr_unmap_native(host, dcr_c) do {} while (0)
39#define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
40#define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
41
42/* Device Control Registers */
43void __mtdcr(int reg, unsigned int val);
44unsigned int __mfdcr(int reg);
45#define mfdcr(rn) \
46 ({unsigned int rval; \
47 if (__builtin_constant_p(rn)) \
48 asm volatile("mfdcr %0," __stringify(rn) \
49 : "=r" (rval)); \
50 else \
51 rval = __mfdcr(rn); \
52 rval;})
53
54#define mtdcr(rn, v) \
55do { \
56 if (__builtin_constant_p(rn)) \
57 asm volatile("mtdcr " __stringify(rn) ",%0" \
58 : : "r" (v)); \
59 else \
60 __mtdcr(rn, v); \
61} while (0)
62
63/* R/W of indirect DCRs make use of standard naming conventions for DCRs */
64extern spinlock_t dcr_ind_lock;
65
66static inline unsigned __mfdcri(int base_addr, int base_data, int reg)
67{
68 unsigned long flags;
69 unsigned int val;
70
71 spin_lock_irqsave(&dcr_ind_lock, flags);
72 __mtdcr(base_addr, reg);
73 val = __mfdcr(base_data);
74 spin_unlock_irqrestore(&dcr_ind_lock, flags);
75 return val;
76}
77
78static inline void __mtdcri(int base_addr, int base_data, int reg,
79 unsigned val)
80{
81 unsigned long flags;
82
83 spin_lock_irqsave(&dcr_ind_lock, flags);
84 __mtdcr(base_addr, reg);
85 __mtdcr(base_data, val);
86 spin_unlock_irqrestore(&dcr_ind_lock, flags);
87}
88
89static inline void __dcri_clrset(int base_addr, int base_data, int reg,
90 unsigned clr, unsigned set)
91{
92 unsigned long flags;
93 unsigned int val;
94
95 spin_lock_irqsave(&dcr_ind_lock, flags);
96 __mtdcr(base_addr, reg);
97 val = (__mfdcr(base_data) & ~clr) | set;
98 __mtdcr(base_data, val);
99 spin_unlock_irqrestore(&dcr_ind_lock, flags);
100}
101
102#define mfdcri(base, reg) __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \
103 DCRN_ ## base ## _CONFIG_DATA, \
104 reg)
105
106#define mtdcri(base, reg, data) __mtdcri(DCRN_ ## base ## _CONFIG_ADDR, \
107 DCRN_ ## base ## _CONFIG_DATA, \
108 reg, data)
109
110#define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \
111 DCRN_ ## base ## _CONFIG_DATA, \
112 reg, clr, set)
113
114#endif /* __ASSEMBLY__ */
115#endif /* __KERNEL__ */
116#endif /* _ASM_POWERPC_DCR_NATIVE_H */