diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-08 13:04:20 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-08 13:04:20 -0500 |
commit | 21eb4fa1700112d1420d72e1de708af671a251c8 (patch) | |
tree | 3afd9f526da50108c27e05ac69826be5e7c2ad6e /include/asm-powerpc/cputable.h | |
parent | 0c0e8caf9fd6c9a49fb9fbdba14a8b7b4239adde (diff) | |
parent | d003e7a1a569501cbe9a5ca14748177498c4893a (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc
* master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: (116 commits)
[POWERPC] Add export of vgacon_remap_base
[POWERPC] Remove bogus comment about page_is_ram
[POWERPC] windfarm: don't die on suspend thread signal
[POWERPC] Fix comment in kernel/irq.c
[POWERPC] ppc: Fix booke watchdog initialization
[POWERPC] PPC: Use ARRAY_SIZE macro when appropriate
[POWERPC] Use ARRAY_SIZE macro when appropriate
[POWERPC] Fix ppc64's writing to struct file_operations
[POWERPC] ppc: use syslog macro for the printk log level
[POWERPC] ppc: cs4218_tdm remove extra brace
[POWERPC] Add mpc52xx/lite5200 PCI support
[POWERPC] Only use H_BULK_REMOVE if the firmware supports it
[POWERPC] Fixup error handling when emulating a floating point instruction
[POWERPC] Enable interrupts if we are doing fp math emulation
[POWERPC] Added kprobes support to ppc32
[POWERPC] Make pSeries use the H_BULK_REMOVE hypervisor call
[POWERPC] Clear RI bit in MSR before restoring r13 when returning to userspace
[POWERPC] Fix performance monitor exception
[POWERPC] Compile fixes for arch/powerpc dcr code
[POWERPC] Maple: use mmio nvram
...
Diffstat (limited to 'include/asm-powerpc/cputable.h')
-rw-r--r-- | include/asm-powerpc/cputable.h | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 7384b8086b75..e870b5393175 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
@@ -50,6 +50,12 @@ enum powerpc_oprofile_type { | |||
50 | PPC_OPROFILE_CELL = 5, | 50 | PPC_OPROFILE_CELL = 5, |
51 | }; | 51 | }; |
52 | 52 | ||
53 | enum powerpc_pmc_type { | ||
54 | PPC_PMC_DEFAULT = 0, | ||
55 | PPC_PMC_IBM = 1, | ||
56 | PPC_PMC_PA6T = 2, | ||
57 | }; | ||
58 | |||
53 | struct cpu_spec { | 59 | struct cpu_spec { |
54 | /* CPU is matched via (PVR & pvr_mask) == pvr_value */ | 60 | /* CPU is matched via (PVR & pvr_mask) == pvr_value */ |
55 | unsigned int pvr_mask; | 61 | unsigned int pvr_mask; |
@@ -65,6 +71,7 @@ struct cpu_spec { | |||
65 | 71 | ||
66 | /* number of performance monitor counters */ | 72 | /* number of performance monitor counters */ |
67 | unsigned int num_pmcs; | 73 | unsigned int num_pmcs; |
74 | enum powerpc_pmc_type pmc_type; | ||
68 | 75 | ||
69 | /* this is called to initialize various CPU bits like L1 cache, | 76 | /* this is called to initialize various CPU bits like L1 cache, |
70 | * BHT, SPD, etc... from head.S before branching to identify_machine | 77 | * BHT, SPD, etc... from head.S before branching to identify_machine |
@@ -337,12 +344,6 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, | |||
337 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ | 344 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ |
338 | CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ | 345 | CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ |
339 | CPU_FTR_DSCR) | 346 | CPU_FTR_DSCR) |
340 | #define CPU_FTRS_POWER6X (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | ||
341 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | ||
342 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | ||
343 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ | ||
344 | CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE | \ | ||
345 | CPU_FTR_SPURR | CPU_FTR_REAL_LE | CPU_FTR_DSCR) | ||
346 | #define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | 347 | #define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ |
347 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 348 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
348 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 349 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |