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author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-04 22:22:33 -0500 |
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committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-04 22:22:33 -0500 |
commit | 15a4cb9c25df05a5d4844e80a1aea83d66165868 (patch) | |
tree | bcb4f7c6e84f501ee6ce8c7a740cc7c4ec92447d /include/asm-powerpc/cputable.h | |
parent | ff51a98799931256b555446b2f5675db08de6229 (diff) | |
parent | d8594d639135b500bf6010f981ea854092d54030 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc
* master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: (194 commits)
[POWERPC] Add missing EXPORTS for mpc52xx support
[POWERPC] Remove obsolete PPC_52xx and update CLASSIC32 comment
[POWERPC] ps3: add a default zImage target
[POWERPC] Add of_platform_bus support to mpc52xx psc uart driver
[POWERPC] typo fix and whitespace cleanup on mpc52xx-uart driver
[POWERPC] Fix debug printks for 32-bit resources in the PCI code
[POWERPC] Replace kmalloc+memset with kzalloc
[POWERPC] Linkstation / kurobox support
[POWERPC] Add the e300c3 core to the CPU table.
[POWERPC] ppc: m48t35 add missing bracket
[POWERPC] iSeries: don't build head_64.o unnecessarily
[POWERPC] iSeries: stop dt_mod.o being rebuilt unnecessarily
[POWERPC] Fix cputable.h for combined build
[POWERPC] Allow CONFIG_BOOTX_TEXT on iSeries
[POWERPC] Allow xmon to build on legacy iSeries
[POWERPC] Change ppc64_defconfig to use AUTOFS_V4 not V3
[POWERPC] Tell firmware we can handle POWER6 compatible mode
[POWERPC] Clean images in arch/powerpc/boot
[POWERPC] Fix OF pci flags parsing
[POWERPC] defconfig for lite5200 board
...
Diffstat (limited to 'include/asm-powerpc/cputable.h')
-rw-r--r-- | include/asm-powerpc/cputable.h | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index a9a40149a7c0..6fe5c9d4ca3b 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
@@ -24,6 +24,8 @@ | |||
24 | #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 | 24 | #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 |
25 | #define PPC_FEATURE_ARCH_2_05 0x00001000 | 25 | #define PPC_FEATURE_ARCH_2_05 0x00001000 |
26 | #define PPC_FEATURE_PA6T 0x00000800 | 26 | #define PPC_FEATURE_PA6T 0x00000800 |
27 | #define PPC_FEATURE_HAS_DFP 0x00000400 | ||
28 | #define PPC_FEATURE_POWER6_EXT 0x00000200 | ||
27 | 29 | ||
28 | #define PPC_FEATURE_TRUE_LE 0x00000002 | 30 | #define PPC_FEATURE_TRUE_LE 0x00000002 |
29 | #define PPC_FEATURE_PPC_LE 0x00000001 | 31 | #define PPC_FEATURE_PPC_LE 0x00000001 |
@@ -45,6 +47,7 @@ enum powerpc_oprofile_type { | |||
45 | PPC_OPROFILE_POWER4 = 2, | 47 | PPC_OPROFILE_POWER4 = 2, |
46 | PPC_OPROFILE_G4 = 3, | 48 | PPC_OPROFILE_G4 = 3, |
47 | PPC_OPROFILE_BOOKE = 4, | 49 | PPC_OPROFILE_BOOKE = 4, |
50 | PPC_OPROFILE_CELL = 5, | ||
48 | }; | 51 | }; |
49 | 52 | ||
50 | struct cpu_spec { | 53 | struct cpu_spec { |
@@ -91,7 +94,7 @@ extern struct cpu_spec *cur_cpu_spec; | |||
91 | 94 | ||
92 | extern unsigned int __start___ftr_fixup, __stop___ftr_fixup; | 95 | extern unsigned int __start___ftr_fixup, __stop___ftr_fixup; |
93 | 96 | ||
94 | extern struct cpu_spec *identify_cpu(unsigned long offset); | 97 | extern struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr); |
95 | extern void do_feature_fixups(unsigned long value, void *fixup_start, | 98 | extern void do_feature_fixups(unsigned long value, void *fixup_start, |
96 | void *fixup_end); | 99 | void *fixup_end); |
97 | 100 | ||
@@ -148,19 +151,13 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, | |||
148 | #define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000200000000000) | 151 | #define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000200000000000) |
149 | #define CPU_FTR_PURR LONG_ASM_CONST(0x0000400000000000) | 152 | #define CPU_FTR_PURR LONG_ASM_CONST(0x0000400000000000) |
150 | #define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000800000000000) | 153 | #define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000800000000000) |
154 | #define CPU_FTR_SPURR LONG_ASM_CONST(0x0001000000000000) | ||
151 | 155 | ||
152 | #ifndef __ASSEMBLY__ | 156 | #ifndef __ASSEMBLY__ |
153 | 157 | ||
154 | #define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \ | 158 | #define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_SLB | \ |
155 | CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ | 159 | CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ |
156 | CPU_FTR_NODSISRALIGN) | 160 | CPU_FTR_NODSISRALIGN | CPU_FTR_16M_PAGE) |
157 | |||
158 | /* iSeries doesn't support large pages */ | ||
159 | #ifdef CONFIG_PPC_ISERIES | ||
160 | #define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE) | ||
161 | #else | ||
162 | #define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE) | ||
163 | #endif /* CONFIG_PPC_ISERIES */ | ||
164 | 161 | ||
165 | /* We only set the altivec features if the kernel was compiled with altivec | 162 | /* We only set the altivec features if the kernel was compiled with altivec |
166 | * support | 163 | * support |
@@ -311,7 +308,8 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, | |||
311 | #define CPU_FTRS_E500_2 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | 308 | #define CPU_FTRS_E500_2 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ |
312 | CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN) | 309 | CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN) |
313 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) | 310 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) |
314 | #ifdef __powerpc64__ | 311 | |
312 | /* 64-bit CPUs */ | ||
315 | #define CPU_FTRS_POWER3 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | 313 | #define CPU_FTRS_POWER3 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ |
316 | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | CPU_FTR_PPC_LE) | 314 | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | CPU_FTR_PPC_LE) |
317 | #define CPU_FTRS_RS64 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | 315 | #define CPU_FTRS_RS64 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ |
@@ -332,7 +330,13 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, | |||
332 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 330 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
333 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 331 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
334 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ | 332 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ |
335 | CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_REAL_LE) | 333 | CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE) |
334 | #define CPU_FTRS_POWER6X (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | ||
335 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | ||
336 | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | ||
337 | CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ | ||
338 | CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE | \ | ||
339 | CPU_FTR_SPURR | CPU_FTR_REAL_LE) | ||
336 | #define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | 340 | #define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ |
337 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 341 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
338 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 342 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
@@ -343,7 +347,6 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, | |||
343 | CPU_FTR_PURR | CPU_FTR_REAL_LE) | 347 | CPU_FTR_PURR | CPU_FTR_REAL_LE) |
344 | #define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | 348 | #define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ |
345 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2) | 349 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2) |
346 | #endif | ||
347 | 350 | ||
348 | #ifdef __powerpc64__ | 351 | #ifdef __powerpc64__ |
349 | #define CPU_FTRS_POSSIBLE \ | 352 | #define CPU_FTRS_POSSIBLE \ |