aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-powerpc/cputable.h
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2006-02-22 10:46:02 -0500
committerPaul Mackerras <paulus@samba.org>2006-02-23 19:36:25 -0500
commit1775dbbcd02cab0c41329dd2cec5b69c7fafd13f (patch)
tree86043c098e2cc8c86780e1ddb0d76e1430cbed9c /include/asm-powerpc/cputable.h
parentf1434a4854407a262d194411245eb9ee66221f90 (diff)
[PATCH] powerpc: Enable coherency for all pages on 83xx to fix PCI data corruption
On the 83xx platform to ensure the PCI inbound memory is handled properly we have to turn on coherency for all pages in the MMU. Otherwise we see corruption if inbound "prefetching/streaming" is enabled on the PCI controller. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/cputable.h')
-rw-r--r--include/asm-powerpc/cputable.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 64210549f56b..90d005bb4d1c 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -159,9 +159,11 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
159#endif 159#endif
160 160
161/* We need to mark all pages as being coherent if we're SMP or we 161/* We need to mark all pages as being coherent if we're SMP or we
162 * have a 74[45]x and an MPC107 host bridge. 162 * have a 74[45]x and an MPC107 host bridge. Also 83xx requires
163 * it for PCI "streaming/prefetch" to work properly.
163 */ 164 */
164#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) 165#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \
166 || defined(CONFIG_PPC_83xx)
165#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT 167#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT
166#else 168#else
167#define CPU_FTR_COMMON 0 169#define CPU_FTR_COMMON 0
@@ -277,7 +279,8 @@ enum {
277 CPU_FTRS_G2_LE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 279 CPU_FTRS_G2_LE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
278 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, 280 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
279 CPU_FTRS_E300 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 281 CPU_FTRS_E300 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
280 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, 282 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS |
283 CPU_FTR_COMMON,
281 CPU_FTRS_CLASSIC32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 284 CPU_FTRS_CLASSIC32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
282 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, 285 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
283 CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 286 CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |