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authorNathan Lynch <ntl@pobox.com>2008-07-09 11:06:57 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-14 22:24:57 -0400
commit0f47331475201c7785454030a9976c8ac902a35d (patch)
tree62c366e29e7a3e2731cdb872dfe8368dfaae65d1 /include/asm-powerpc/cputable.h
parentfe9e8d53772b5ea9ccf8ea4e8f0f009a6885eb70 (diff)
powerpc: Add PPC_FEATURE_PSERIES_PERFMON_COMPAT
Background from Maynard Johnson: As of POWER6, a set of 32 common events is defined that must be supported on all future POWER processors. The main impetus for this compat set is the need to support partition migration, especially from processor P(n) to processor P(n+1), where performance software that's running in the new partition may not be knowledgeable about processor P(n+1). If a performance tool determines it does not support the physical processor, but is told (via the PPC_FEATURE_PSERIES_PERFMON_COMPAT bit) that the processor supports the notion of the PMU compat set, then the performance tool can surface just those events to the user of the tool. PPC_FEATURE_PSERIES_PERFMON_COMPAT indicates that the PMU supports at least this basic subset of events which is compatible across POWER processor lines. Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'include/asm-powerpc/cputable.h')
-rw-r--r--include/asm-powerpc/cputable.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 4fd76898975b..2a3e9075a5a0 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -27,6 +27,9 @@
27#define PPC_FEATURE_ARCH_2_06 0x00000100 27#define PPC_FEATURE_ARCH_2_06 0x00000100
28#define PPC_FEATURE_HAS_VSX 0x00000080 28#define PPC_FEATURE_HAS_VSX 0x00000080
29 29
30#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
31 0x00000040
32
30#define PPC_FEATURE_TRUE_LE 0x00000002 33#define PPC_FEATURE_TRUE_LE 0x00000002
31#define PPC_FEATURE_PPC_LE 0x00000001 34#define PPC_FEATURE_PPC_LE 0x00000001
32 35