diff options
author | Olof Johansson <olof@lixom.net> | 2006-09-06 15:35:57 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-09-13 04:39:52 -0400 |
commit | b3ebd1d862d6c23caa58e40d341eefc426f835e1 (patch) | |
tree | c4db512b520833be44b72b97aab0c439138bfb5e /include/asm-powerpc/cputable.h | |
parent | 0024300000769eadcb4a4fcdff531d45ee7735d4 (diff) |
[POWERPC] powerpc: PA6T cputable entry, PVR value
Introduce PWRficient PA6T cputable entries and feature bits.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/cputable.h')
-rw-r--r-- | include/asm-powerpc/cputable.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 3608259c49cf..12707ab9dc98 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
@@ -23,6 +23,7 @@ | |||
23 | #define PPC_FEATURE_SMT 0x00004000 | 23 | #define PPC_FEATURE_SMT 0x00004000 |
24 | #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 | 24 | #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 |
25 | #define PPC_FEATURE_ARCH_2_05 0x00001000 | 25 | #define PPC_FEATURE_ARCH_2_05 0x00001000 |
26 | #define PPC_FEATURE_PA6T 0x00000800 | ||
26 | 27 | ||
27 | #define PPC_FEATURE_TRUE_LE 0x00000002 | 28 | #define PPC_FEATURE_TRUE_LE 0x00000002 |
28 | #define PPC_FEATURE_PPC_LE 0x00000001 | 29 | #define PPC_FEATURE_PPC_LE 0x00000001 |
@@ -332,6 +333,10 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
332 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ | 333 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ |
333 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ | 334 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ |
334 | CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE) | 335 | CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE) |
336 | #define CPU_FTRS_PA6T (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | ||
337 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ | ||
338 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ | ||
339 | CPU_FTR_PURR | CPU_FTR_REAL_LE) | ||
335 | #define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ | 340 | #define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ |
336 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2) | 341 | CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2) |
337 | #endif | 342 | #endif |
@@ -340,7 +345,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
340 | #define CPU_FTRS_POSSIBLE \ | 345 | #define CPU_FTRS_POSSIBLE \ |
341 | (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ | 346 | (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ |
342 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \ | 347 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \ |
343 | CPU_FTRS_CELL | CPU_FTR_CI_LARGE_PAGE) | 348 | CPU_FTRS_CELL | CPU_FTRS_PA6T) |
344 | #else | 349 | #else |
345 | enum { | 350 | enum { |
346 | CPU_FTRS_POSSIBLE = | 351 | CPU_FTRS_POSSIBLE = |
@@ -379,7 +384,7 @@ enum { | |||
379 | #define CPU_FTRS_ALWAYS \ | 384 | #define CPU_FTRS_ALWAYS \ |
380 | (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ | 385 | (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ |
381 | CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \ | 386 | CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \ |
382 | CPU_FTRS_CELL & CPU_FTRS_POSSIBLE) | 387 | CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE) |
383 | #else | 388 | #else |
384 | enum { | 389 | enum { |
385 | CPU_FTRS_ALWAYS = | 390 | CPU_FTRS_ALWAYS = |