diff options
author | Jochen Friedrich <jochen@scram.de> | 2008-01-24 10:20:05 -0500 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-01-28 09:31:06 -0500 |
commit | 44f25fb4d0754c6c2ab5bf97990a671e19152139 (patch) | |
tree | 88116926057db0050f24d3f3a9dcb526c2342c73 /include/asm-powerpc/cpm.h | |
parent | b5677d848cbb94220ac2cfd36d93bcdbe49c3280 (diff) |
[POWERPC] CPM: Move definition of buffer descriptor to cpm.h
Buffer descriptors are used by both CPM1 and CPM2. Move the definitions
from the cpm dependent include file to common cpm.h
Signed-off-by: Jochen Friedrich <jochen@scram.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-powerpc/cpm.h')
-rw-r--r-- | include/asm-powerpc/cpm.h | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h index fae83b137337..77e39dad9728 100644 --- a/include/asm-powerpc/cpm.h +++ b/include/asm-powerpc/cpm.h | |||
@@ -4,6 +4,79 @@ | |||
4 | #include <linux/compiler.h> | 4 | #include <linux/compiler.h> |
5 | #include <linux/types.h> | 5 | #include <linux/types.h> |
6 | 6 | ||
7 | /* Buffer descriptors used by many of the CPM protocols. */ | ||
8 | typedef struct cpm_buf_desc { | ||
9 | ushort cbd_sc; /* Status and Control */ | ||
10 | ushort cbd_datlen; /* Data length in buffer */ | ||
11 | uint cbd_bufaddr; /* Buffer address in host memory */ | ||
12 | } cbd_t; | ||
13 | |||
14 | /* Buffer descriptor control/status used by serial | ||
15 | */ | ||
16 | |||
17 | #define BD_SC_EMPTY (0x8000) /* Receive is empty */ | ||
18 | #define BD_SC_READY (0x8000) /* Transmit is ready */ | ||
19 | #define BD_SC_WRAP (0x2000) /* Last buffer descriptor */ | ||
20 | #define BD_SC_INTRPT (0x1000) /* Interrupt on change */ | ||
21 | #define BD_SC_LAST (0x0800) /* Last buffer in frame */ | ||
22 | #define BD_SC_TC (0x0400) /* Transmit CRC */ | ||
23 | #define BD_SC_CM (0x0200) /* Continous mode */ | ||
24 | #define BD_SC_ID (0x0100) /* Rec'd too many idles */ | ||
25 | #define BD_SC_P (0x0100) /* xmt preamble */ | ||
26 | #define BD_SC_BR (0x0020) /* Break received */ | ||
27 | #define BD_SC_FR (0x0010) /* Framing error */ | ||
28 | #define BD_SC_PR (0x0008) /* Parity error */ | ||
29 | #define BD_SC_NAK (0x0004) /* NAK - did not respond */ | ||
30 | #define BD_SC_OV (0x0002) /* Overrun */ | ||
31 | #define BD_SC_UN (0x0002) /* Underrun */ | ||
32 | #define BD_SC_CD (0x0001) /* */ | ||
33 | #define BD_SC_CL (0x0001) /* Collision */ | ||
34 | |||
35 | /* Buffer descriptor control/status used by Ethernet receive. | ||
36 | * Common to SCC and FCC. | ||
37 | */ | ||
38 | #define BD_ENET_RX_EMPTY (0x8000) | ||
39 | #define BD_ENET_RX_WRAP (0x2000) | ||
40 | #define BD_ENET_RX_INTR (0x1000) | ||
41 | #define BD_ENET_RX_LAST (0x0800) | ||
42 | #define BD_ENET_RX_FIRST (0x0400) | ||
43 | #define BD_ENET_RX_MISS (0x0100) | ||
44 | #define BD_ENET_RX_BC (0x0080) /* FCC Only */ | ||
45 | #define BD_ENET_RX_MC (0x0040) /* FCC Only */ | ||
46 | #define BD_ENET_RX_LG (0x0020) | ||
47 | #define BD_ENET_RX_NO (0x0010) | ||
48 | #define BD_ENET_RX_SH (0x0008) | ||
49 | #define BD_ENET_RX_CR (0x0004) | ||
50 | #define BD_ENET_RX_OV (0x0002) | ||
51 | #define BD_ENET_RX_CL (0x0001) | ||
52 | #define BD_ENET_RX_STATS (0x01ff) /* All status bits */ | ||
53 | |||
54 | /* Buffer descriptor control/status used by Ethernet transmit. | ||
55 | * Common to SCC and FCC. | ||
56 | */ | ||
57 | #define BD_ENET_TX_READY (0x8000) | ||
58 | #define BD_ENET_TX_PAD (0x4000) | ||
59 | #define BD_ENET_TX_WRAP (0x2000) | ||
60 | #define BD_ENET_TX_INTR (0x1000) | ||
61 | #define BD_ENET_TX_LAST (0x0800) | ||
62 | #define BD_ENET_TX_TC (0x0400) | ||
63 | #define BD_ENET_TX_DEF (0x0200) | ||
64 | #define BD_ENET_TX_HB (0x0100) | ||
65 | #define BD_ENET_TX_LC (0x0080) | ||
66 | #define BD_ENET_TX_RL (0x0040) | ||
67 | #define BD_ENET_TX_RCMASK (0x003c) | ||
68 | #define BD_ENET_TX_UN (0x0002) | ||
69 | #define BD_ENET_TX_CSL (0x0001) | ||
70 | #define BD_ENET_TX_STATS (0x03ff) /* All status bits */ | ||
71 | |||
72 | /* Buffer descriptor control/status used by Transparent mode SCC. | ||
73 | */ | ||
74 | #define BD_SCC_TX_LAST (0x0800) | ||
75 | |||
76 | /* Buffer descriptor control/status used by I2C. | ||
77 | */ | ||
78 | #define BD_I2C_START (0x0400) | ||
79 | |||
7 | int cpm_muram_init(void); | 80 | int cpm_muram_init(void); |
8 | unsigned long cpm_muram_alloc(unsigned long size, unsigned long align); | 81 | unsigned long cpm_muram_alloc(unsigned long size, unsigned long align); |
9 | int cpm_muram_free(unsigned long offset); | 82 | int cpm_muram_free(unsigned long offset); |