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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-parisc
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-parisc')
-rw-r--r--include/asm-parisc/a.out.h29
-rw-r--r--include/asm-parisc/asmregs.h183
-rw-r--r--include/asm-parisc/assembly.h454
-rw-r--r--include/asm-parisc/atomic.h199
-rw-r--r--include/asm-parisc/bitops.h520
-rw-r--r--include/asm-parisc/bug.h12
-rw-r--r--include/asm-parisc/bugs.h19
-rw-r--r--include/asm-parisc/byteorder.h82
-rw-r--r--include/asm-parisc/cache.h79
-rw-r--r--include/asm-parisc/cacheflush.h182
-rw-r--r--include/asm-parisc/checksum.h213
-rw-r--r--include/asm-parisc/compat.h145
-rw-r--r--include/asm-parisc/compat_rt_sigframe.h50
-rw-r--r--include/asm-parisc/compat_signal.h2
-rw-r--r--include/asm-parisc/compat_ucontext.h18
-rw-r--r--include/asm-parisc/cputime.h6
-rw-r--r--include/asm-parisc/current.h15
-rw-r--r--include/asm-parisc/delay.h43
-rw-r--r--include/asm-parisc/div64.h1
-rw-r--r--include/asm-parisc/dma-mapping.h254
-rw-r--r--include/asm-parisc/dma.h192
-rw-r--r--include/asm-parisc/eisa_bus.h23
-rw-r--r--include/asm-parisc/eisa_eeprom.h153
-rw-r--r--include/asm-parisc/elf.h347
-rw-r--r--include/asm-parisc/errno.h119
-rw-r--r--include/asm-parisc/fcntl.h92
-rw-r--r--include/asm-parisc/fixmap.h23
-rw-r--r--include/asm-parisc/floppy.h277
-rw-r--r--include/asm-parisc/grfioctl.h111
-rw-r--r--include/asm-parisc/hardirq.h29
-rw-r--r--include/asm-parisc/hardware.h132
-rw-r--r--include/asm-parisc/hdreg.h1
-rw-r--r--include/asm-parisc/hw_irq.h17
-rw-r--r--include/asm-parisc/ide.h69
-rw-r--r--include/asm-parisc/io.h418
-rw-r--r--include/asm-parisc/ioctl.h93
-rw-r--r--include/asm-parisc/ioctls.h86
-rw-r--r--include/asm-parisc/iosapic.h53
-rw-r--r--include/asm-parisc/ipcbuf.h27
-rw-r--r--include/asm-parisc/irq.h55
-rw-r--r--include/asm-parisc/kmap_types.h31
-rw-r--r--include/asm-parisc/led.h45
-rw-r--r--include/asm-parisc/linkage.h6
-rw-r--r--include/asm-parisc/local.h40
-rw-r--r--include/asm-parisc/machdep.h16
-rw-r--r--include/asm-parisc/mc146818rtc.h9
-rw-r--r--include/asm-parisc/mman.h57
-rw-r--r--include/asm-parisc/mmu.h7
-rw-r--r--include/asm-parisc/mmu_context.h73
-rw-r--r--include/asm-parisc/mmzone.h102
-rw-r--r--include/asm-parisc/module.h32
-rw-r--r--include/asm-parisc/msgbuf.h37
-rw-r--r--include/asm-parisc/namei.h17
-rw-r--r--include/asm-parisc/numnodes.h7
-rw-r--r--include/asm-parisc/page.h162
-rw-r--r--include/asm-parisc/param.h27
-rw-r--r--include/asm-parisc/parisc-device.h54
-rw-r--r--include/asm-parisc/parport.h18
-rw-r--r--include/asm-parisc/pci.h241
-rw-r--r--include/asm-parisc/pdc.h781
-rw-r--r--include/asm-parisc/pdc_chassis.h382
-rw-r--r--include/asm-parisc/pdcpat.h337
-rw-r--r--include/asm-parisc/percpu.h7
-rw-r--r--include/asm-parisc/perf.h74
-rw-r--r--include/asm-parisc/pgalloc.h143
-rw-r--r--include/asm-parisc/pgtable.h522
-rw-r--r--include/asm-parisc/poll.h26
-rw-r--r--include/asm-parisc/posix_types.h133
-rw-r--r--include/asm-parisc/processor.h344
-rw-r--r--include/asm-parisc/psw.h62
-rw-r--r--include/asm-parisc/ptrace.h56
-rw-r--r--include/asm-parisc/real.h5
-rw-r--r--include/asm-parisc/resource.h7
-rw-r--r--include/asm-parisc/rt_sigframe.h27
-rw-r--r--include/asm-parisc/rtc.h131
-rw-r--r--include/asm-parisc/runway.h12
-rw-r--r--include/asm-parisc/scatterlist.h23
-rw-r--r--include/asm-parisc/sections.h7
-rw-r--r--include/asm-parisc/segment.h6
-rw-r--r--include/asm-parisc/semaphore-helper.h89
-rw-r--r--include/asm-parisc/semaphore.h147
-rw-r--r--include/asm-parisc/sembuf.h29
-rw-r--r--include/asm-parisc/serial.h36
-rw-r--r--include/asm-parisc/setup.h6
-rw-r--r--include/asm-parisc/shmbuf.h58
-rw-r--r--include/asm-parisc/shmparam.h8
-rw-r--r--include/asm-parisc/sigcontext.h20
-rw-r--r--include/asm-parisc/siginfo.h14
-rw-r--r--include/asm-parisc/signal.h166
-rw-r--r--include/asm-parisc/smp.h69
-rw-r--r--include/asm-parisc/socket.h50
-rw-r--r--include/asm-parisc/sockios.h12
-rw-r--r--include/asm-parisc/spinlock.h258
-rw-r--r--include/asm-parisc/stat.h100
-rw-r--r--include/asm-parisc/statfs.h58
-rw-r--r--include/asm-parisc/string.h10
-rw-r--r--include/asm-parisc/superio.h85
-rw-r--r--include/asm-parisc/system.h210
-rw-r--r--include/asm-parisc/termbits.h175
-rw-r--r--include/asm-parisc/termios.h106
-rw-r--r--include/asm-parisc/thread_info.h80
-rw-r--r--include/asm-parisc/timex.h20
-rw-r--r--include/asm-parisc/tlb.h27
-rw-r--r--include/asm-parisc/tlbflush.h95
-rw-r--r--include/asm-parisc/topology.h6
-rw-r--r--include/asm-parisc/traps.h16
-rw-r--r--include/asm-parisc/types.h65
-rw-r--r--include/asm-parisc/uaccess.h287
-rw-r--r--include/asm-parisc/ucontext.h12
-rw-r--r--include/asm-parisc/unaligned.h12
-rw-r--r--include/asm-parisc/unistd.h1029
-rw-r--r--include/asm-parisc/unwind.h77
-rw-r--r--include/asm-parisc/user.h5
-rw-r--r--include/asm-parisc/xor.h1
114 files changed, 12327 insertions, 0 deletions
diff --git a/include/asm-parisc/a.out.h b/include/asm-parisc/a.out.h
new file mode 100644
index 000000000000..2a490cc9ec91
--- /dev/null
+++ b/include/asm-parisc/a.out.h
@@ -0,0 +1,29 @@
1#ifndef __PARISC_A_OUT_H__
2#define __PARISC_A_OUT_H__
3
4struct exec
5{
6 unsigned int a_info; /* Use macros N_MAGIC, etc for access */
7 unsigned a_text; /* length of text, in bytes */
8 unsigned a_data; /* length of data, in bytes */
9 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
10 unsigned a_syms; /* length of symbol table data in file, in bytes */
11 unsigned a_entry; /* start address */
12 unsigned a_trsize; /* length of relocation info for text, in bytes */
13 unsigned a_drsize; /* length of relocation info for data, in bytes */
14};
15
16#define N_TRSIZE(a) ((a).a_trsize)
17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms)
19
20#ifdef __KERNEL__
21
22/* XXX: STACK_TOP actually should be STACK_BOTTOM for parisc.
23 * prumpf */
24
25#define STACK_TOP TASK_SIZE
26
27#endif
28
29#endif /* __A_OUT_GNU_H__ */
diff --git a/include/asm-parisc/asmregs.h b/include/asm-parisc/asmregs.h
new file mode 100644
index 000000000000..d93c646e1887
--- /dev/null
+++ b/include/asm-parisc/asmregs.h
@@ -0,0 +1,183 @@
1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef _PARISC_ASMREGS_H
20#define _PARISC_ASMREGS_H
21
22;! General Registers
23
24rp: .reg %r2
25arg3: .reg %r23
26arg2: .reg %r24
27arg1: .reg %r25
28arg0: .reg %r26
29dp: .reg %r27
30ret0: .reg %r28
31ret1: .reg %r29
32sl: .reg %r29
33sp: .reg %r30
34
35#if 0
36/* PA20_REVISIT */
37arg7: .reg r19
38arg6: .reg r20
39arg5: .reg r21
40arg4: .reg r22
41gp: .reg r27
42ap: .reg r29
43#endif
44
45
46r0: .reg %r0
47r1: .reg %r1
48r2: .reg %r2
49r3: .reg %r3
50r4: .reg %r4
51r5: .reg %r5
52r6: .reg %r6
53r7: .reg %r7
54r8: .reg %r8
55r9: .reg %r9
56r10: .reg %r10
57r11: .reg %r11
58r12: .reg %r12
59r13: .reg %r13
60r14: .reg %r14
61r15: .reg %r15
62r16: .reg %r16
63r17: .reg %r17
64r18: .reg %r18
65r19: .reg %r19
66r20: .reg %r20
67r21: .reg %r21
68r22: .reg %r22
69r23: .reg %r23
70r24: .reg %r24
71r25: .reg %r25
72r26: .reg %r26
73r27: .reg %r27
74r28: .reg %r28
75r29: .reg %r29
76r30: .reg %r30
77r31: .reg %r31
78
79
80;! Space Registers
81
82sr0: .reg %sr0
83sr1: .reg %sr1
84sr2: .reg %sr2
85sr3: .reg %sr3
86sr4: .reg %sr4
87sr5: .reg %sr5
88sr6: .reg %sr6
89sr7: .reg %sr7
90
91
92;! Floating Point Registers
93
94fr0: .reg %fr0
95fr1: .reg %fr1
96fr2: .reg %fr2
97fr3: .reg %fr3
98fr4: .reg %fr4
99fr5: .reg %fr5
100fr6: .reg %fr6
101fr7: .reg %fr7
102fr8: .reg %fr8
103fr9: .reg %fr9
104fr10: .reg %fr10
105fr11: .reg %fr11
106fr12: .reg %fr12
107fr13: .reg %fr13
108fr14: .reg %fr14
109fr15: .reg %fr15
110fr16: .reg %fr16
111fr17: .reg %fr17
112fr18: .reg %fr18
113fr19: .reg %fr19
114fr20: .reg %fr20
115fr21: .reg %fr21
116fr22: .reg %fr22
117fr23: .reg %fr23
118fr24: .reg %fr24
119fr25: .reg %fr25
120fr26: .reg %fr26
121fr27: .reg %fr27
122fr28: .reg %fr28
123fr29: .reg %fr29
124fr30: .reg %fr30
125fr31: .reg %fr31
126
127
128;! Control Registers
129
130rctr: .reg %cr0
131pidr1: .reg %cr8
132pidr2: .reg %cr9
133ccr: .reg %cr10
134sar: .reg %cr11
135pidr3: .reg %cr12
136pidr4: .reg %cr13
137iva: .reg %cr14
138eiem: .reg %cr15
139itmr: .reg %cr16
140pcsq: .reg %cr17
141pcoq: .reg %cr18
142iir: .reg %cr19
143isr: .reg %cr20
144ior: .reg %cr21
145ipsw: .reg %cr22
146eirr: .reg %cr23
147tr0: .reg %cr24
148tr1: .reg %cr25
149tr2: .reg %cr26
150tr3: .reg %cr27
151tr4: .reg %cr28
152tr5: .reg %cr29
153tr6: .reg %cr30
154tr7: .reg %cr31
155
156
157cr0: .reg %cr0
158cr8: .reg %cr8
159cr9: .reg %cr9
160cr10: .reg %cr10
161cr11: .reg %cr11
162cr12: .reg %cr12
163cr13: .reg %cr13
164cr14: .reg %cr14
165cr15: .reg %cr15
166cr16: .reg %cr16
167cr17: .reg %cr17
168cr18: .reg %cr18
169cr19: .reg %cr19
170cr20: .reg %cr20
171cr21: .reg %cr21
172cr22: .reg %cr22
173cr23: .reg %cr23
174cr24: .reg %cr24
175cr25: .reg %cr25
176cr26: .reg %cr26
177cr27: .reg %cr27
178cr28: .reg %cr28
179cr29: .reg %cr29
180cr30: .reg %cr30
181cr31: .reg %cr31
182
183#endif
diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
new file mode 100644
index 000000000000..cbc286f49b36
--- /dev/null
+++ b/include/asm-parisc/assembly.h
@@ -0,0 +1,454 @@
1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
4 * Copyright (C) 1999 SuSE GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef _PARISC_ASSEMBLY_H
22#define _PARISC_ASSEMBLY_H
23
24#ifdef __LP64__
25#define LDREG ldd
26#define STREG std
27#define LDREGX ldd,s
28#define LDREGM ldd,mb
29#define STREGM std,ma
30#define SHRREG shrd
31#define RP_OFFSET 16
32#define FRAME_SIZE 128
33#define CALLEE_SAVE_FRAME_SIZE 144
34#else
35#define LDREG ldw
36#define STREG stw
37#define LDREGX ldwx,s
38#define LDREGM ldwm
39#define STREGM stwm
40#define SHRREG shr
41#define RP_OFFSET 20
42#define FRAME_SIZE 64
43#define CALLEE_SAVE_FRAME_SIZE 128
44#endif
45
46#ifdef CONFIG_PA20
47#define BL b,l
48# ifdef CONFIG_64BIT
49# define LEVEL 2.0w
50# else
51# define LEVEL 2.0
52# endif
53#else
54#define BL bl
55#define LEVEL 1.1
56#endif
57
58#ifdef __ASSEMBLY__
59
60#ifdef __LP64__
61/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
62 * work around that for now... */
63 .level 2.0w
64#endif
65
66#include <asm/offsets.h>
67#include <asm/page.h>
68
69#include <asm/asmregs.h>
70
71 sp = 30
72 gp = 27
73 ipsw = 22
74
75 /*
76 * We provide two versions of each macro to convert from physical
77 * to virtual and vice versa. The "_r1" versions take one argument
78 * register, but trashes r1 to do the conversion. The other
79 * version takes two arguments: a src and destination register.
80 * However, the source and destination registers can not be
81 * the same register.
82 */
83
84 .macro tophys grvirt, grphys
85 ldil L%(__PAGE_OFFSET), \grphys
86 sub \grvirt, \grphys, \grphys
87 .endm
88
89 .macro tovirt grphys, grvirt
90 ldil L%(__PAGE_OFFSET), \grvirt
91 add \grphys, \grvirt, \grvirt
92 .endm
93
94 .macro tophys_r1 gr
95 ldil L%(__PAGE_OFFSET), %r1
96 sub \gr, %r1, \gr
97 .endm
98
99 .macro tovirt_r1 gr
100 ldil L%(__PAGE_OFFSET), %r1
101 add \gr, %r1, \gr
102 .endm
103
104 .macro delay value
105 ldil L%\value, 1
106 ldo R%\value(1), 1
107 addib,UV,n -1,1,.
108 addib,NUV,n -1,1,.+8
109 nop
110 .endm
111
112 .macro debug value
113 .endm
114
115
116 /* Shift Left - note the r and t can NOT be the same! */
117 .macro shl r, sa, t
118 dep,z \r, 31-\sa, 32-\sa, \t
119 .endm
120
121 /* The PA 2.0 shift left */
122 .macro shlw r, sa, t
123 depw,z \r, 31-\sa, 32-\sa, \t
124 .endm
125
126 /* And the PA 2.0W shift left */
127 .macro shld r, sa, t
128 depd,z \r, 63-\sa, 64-\sa, \t
129 .endm
130
131 /* Shift Right - note the r and t can NOT be the same! */
132 .macro shr r, sa, t
133 extru \r, 31-\sa, 32-\sa, \t
134 .endm
135
136 /* pa20w version of shift right */
137 .macro shrd r, sa, t
138 extrd,u \r, 63-\sa, 64-\sa, \t
139 .endm
140
141 /* load 32-bit 'value' into 'reg' compensating for the ldil
142 * sign-extension when running in wide mode.
143 * WARNING!! neither 'value' nor 'reg' can be expressions
144 * containing '.'!!!! */
145 .macro load32 value, reg
146 ldil L%\value, \reg
147 ldo R%\value(\reg), \reg
148 .endm
149
150 .macro loadgp
151#ifdef __LP64__
152 ldil L%__gp, %r27
153 ldo R%__gp(%r27), %r27
154#else
155 ldil L%$global$, %r27
156 ldo R%$global$(%r27), %r27
157#endif
158 .endm
159
160#define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where
161#define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r
162#define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
163#define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
164
165 .macro save_general regs
166 STREG %r1, PT_GR1 (\regs)
167 STREG %r2, PT_GR2 (\regs)
168 STREG %r3, PT_GR3 (\regs)
169 STREG %r4, PT_GR4 (\regs)
170 STREG %r5, PT_GR5 (\regs)
171 STREG %r6, PT_GR6 (\regs)
172 STREG %r7, PT_GR7 (\regs)
173 STREG %r8, PT_GR8 (\regs)
174 STREG %r9, PT_GR9 (\regs)
175 STREG %r10, PT_GR10(\regs)
176 STREG %r11, PT_GR11(\regs)
177 STREG %r12, PT_GR12(\regs)
178 STREG %r13, PT_GR13(\regs)
179 STREG %r14, PT_GR14(\regs)
180 STREG %r15, PT_GR15(\regs)
181 STREG %r16, PT_GR16(\regs)
182 STREG %r17, PT_GR17(\regs)
183 STREG %r18, PT_GR18(\regs)
184 STREG %r19, PT_GR19(\regs)
185 STREG %r20, PT_GR20(\regs)
186 STREG %r21, PT_GR21(\regs)
187 STREG %r22, PT_GR22(\regs)
188 STREG %r23, PT_GR23(\regs)
189 STREG %r24, PT_GR24(\regs)
190 STREG %r25, PT_GR25(\regs)
191 /* r26 is saved in get_stack and used to preserve a value across virt_map */
192 STREG %r27, PT_GR27(\regs)
193 STREG %r28, PT_GR28(\regs)
194 /* r29 is saved in get_stack and used to point to saved registers */
195 /* r30 stack pointer saved in get_stack */
196 STREG %r31, PT_GR31(\regs)
197 .endm
198
199 .macro rest_general regs
200 /* r1 used as a temp in rest_stack and is restored there */
201 LDREG PT_GR2 (\regs), %r2
202 LDREG PT_GR3 (\regs), %r3
203 LDREG PT_GR4 (\regs), %r4
204 LDREG PT_GR5 (\regs), %r5
205 LDREG PT_GR6 (\regs), %r6
206 LDREG PT_GR7 (\regs), %r7
207 LDREG PT_GR8 (\regs), %r8
208 LDREG PT_GR9 (\regs), %r9
209 LDREG PT_GR10(\regs), %r10
210 LDREG PT_GR11(\regs), %r11
211 LDREG PT_GR12(\regs), %r12
212 LDREG PT_GR13(\regs), %r13
213 LDREG PT_GR14(\regs), %r14
214 LDREG PT_GR15(\regs), %r15
215 LDREG PT_GR16(\regs), %r16
216 LDREG PT_GR17(\regs), %r17
217 LDREG PT_GR18(\regs), %r18
218 LDREG PT_GR19(\regs), %r19
219 LDREG PT_GR20(\regs), %r20
220 LDREG PT_GR21(\regs), %r21
221 LDREG PT_GR22(\regs), %r22
222 LDREG PT_GR23(\regs), %r23
223 LDREG PT_GR24(\regs), %r24
224 LDREG PT_GR25(\regs), %r25
225 LDREG PT_GR26(\regs), %r26
226 LDREG PT_GR27(\regs), %r27
227 LDREG PT_GR28(\regs), %r28
228 /* r29 points to register save area, and is restored in rest_stack */
229 /* r30 stack pointer restored in rest_stack */
230 LDREG PT_GR31(\regs), %r31
231 .endm
232
233 .macro save_fp regs
234 fstd,ma %fr0, 8(\regs)
235 fstd,ma %fr1, 8(\regs)
236 fstd,ma %fr2, 8(\regs)
237 fstd,ma %fr3, 8(\regs)
238 fstd,ma %fr4, 8(\regs)
239 fstd,ma %fr5, 8(\regs)
240 fstd,ma %fr6, 8(\regs)
241 fstd,ma %fr7, 8(\regs)
242 fstd,ma %fr8, 8(\regs)
243 fstd,ma %fr9, 8(\regs)
244 fstd,ma %fr10, 8(\regs)
245 fstd,ma %fr11, 8(\regs)
246 fstd,ma %fr12, 8(\regs)
247 fstd,ma %fr13, 8(\regs)
248 fstd,ma %fr14, 8(\regs)
249 fstd,ma %fr15, 8(\regs)
250 fstd,ma %fr16, 8(\regs)
251 fstd,ma %fr17, 8(\regs)
252 fstd,ma %fr18, 8(\regs)
253 fstd,ma %fr19, 8(\regs)
254 fstd,ma %fr20, 8(\regs)
255 fstd,ma %fr21, 8(\regs)
256 fstd,ma %fr22, 8(\regs)
257 fstd,ma %fr23, 8(\regs)
258 fstd,ma %fr24, 8(\regs)
259 fstd,ma %fr25, 8(\regs)
260 fstd,ma %fr26, 8(\regs)
261 fstd,ma %fr27, 8(\regs)
262 fstd,ma %fr28, 8(\regs)
263 fstd,ma %fr29, 8(\regs)
264 fstd,ma %fr30, 8(\regs)
265 fstd %fr31, 0(\regs)
266 .endm
267
268 .macro rest_fp regs
269 fldd 0(\regs), %fr31
270 fldd,mb -8(\regs), %fr30
271 fldd,mb -8(\regs), %fr29
272 fldd,mb -8(\regs), %fr28
273 fldd,mb -8(\regs), %fr27
274 fldd,mb -8(\regs), %fr26
275 fldd,mb -8(\regs), %fr25
276 fldd,mb -8(\regs), %fr24
277 fldd,mb -8(\regs), %fr23
278 fldd,mb -8(\regs), %fr22
279 fldd,mb -8(\regs), %fr21
280 fldd,mb -8(\regs), %fr20
281 fldd,mb -8(\regs), %fr19
282 fldd,mb -8(\regs), %fr18
283 fldd,mb -8(\regs), %fr17
284 fldd,mb -8(\regs), %fr16
285 fldd,mb -8(\regs), %fr15
286 fldd,mb -8(\regs), %fr14
287 fldd,mb -8(\regs), %fr13
288 fldd,mb -8(\regs), %fr12
289 fldd,mb -8(\regs), %fr11
290 fldd,mb -8(\regs), %fr10
291 fldd,mb -8(\regs), %fr9
292 fldd,mb -8(\regs), %fr8
293 fldd,mb -8(\regs), %fr7
294 fldd,mb -8(\regs), %fr6
295 fldd,mb -8(\regs), %fr5
296 fldd,mb -8(\regs), %fr4
297 fldd,mb -8(\regs), %fr3
298 fldd,mb -8(\regs), %fr2
299 fldd,mb -8(\regs), %fr1
300 fldd,mb -8(\regs), %fr0
301 .endm
302
303#ifdef __LP64__
304 .macro callee_save
305 std,ma %r3, CALLEE_SAVE_FRAME_SIZE(%r30)
306 mfctl %cr27, %r3
307 std %r4, -136(%r30)
308 std %r5, -128(%r30)
309 std %r6, -120(%r30)
310 std %r7, -112(%r30)
311 std %r8, -104(%r30)
312 std %r9, -96(%r30)
313 std %r10, -88(%r30)
314 std %r11, -80(%r30)
315 std %r12, -72(%r30)
316 std %r13, -64(%r30)
317 std %r14, -56(%r30)
318 std %r15, -48(%r30)
319 std %r16, -40(%r30)
320 std %r17, -32(%r30)
321 std %r18, -24(%r30)
322 std %r3, -16(%r30)
323 .endm
324
325 .macro callee_rest
326 ldd -16(%r30), %r3
327 ldd -24(%r30), %r18
328 ldd -32(%r30), %r17
329 ldd -40(%r30), %r16
330 ldd -48(%r30), %r15
331 ldd -56(%r30), %r14
332 ldd -64(%r30), %r13
333 ldd -72(%r30), %r12
334 ldd -80(%r30), %r11
335 ldd -88(%r30), %r10
336 ldd -96(%r30), %r9
337 ldd -104(%r30), %r8
338 ldd -112(%r30), %r7
339 ldd -120(%r30), %r6
340 ldd -128(%r30), %r5
341 ldd -136(%r30), %r4
342 mtctl %r3, %cr27
343 ldd,mb -CALLEE_SAVE_FRAME_SIZE(%r30), %r3
344 .endm
345
346#else /* ! __LP64__ */
347
348 .macro callee_save
349 stw,ma %r3, CALLEE_SAVE_FRAME_SIZE(%r30)
350 mfctl %cr27, %r3
351 stw %r4, -124(%r30)
352 stw %r5, -120(%r30)
353 stw %r6, -116(%r30)
354 stw %r7, -112(%r30)
355 stw %r8, -108(%r30)
356 stw %r9, -104(%r30)
357 stw %r10, -100(%r30)
358 stw %r11, -96(%r30)
359 stw %r12, -92(%r30)
360 stw %r13, -88(%r30)
361 stw %r14, -84(%r30)
362 stw %r15, -80(%r30)
363 stw %r16, -76(%r30)
364 stw %r17, -72(%r30)
365 stw %r18, -68(%r30)
366 stw %r3, -64(%r30)
367 .endm
368
369 .macro callee_rest
370 ldw -64(%r30), %r3
371 ldw -68(%r30), %r18
372 ldw -72(%r30), %r17
373 ldw -76(%r30), %r16
374 ldw -80(%r30), %r15
375 ldw -84(%r30), %r14
376 ldw -88(%r30), %r13
377 ldw -92(%r30), %r12
378 ldw -96(%r30), %r11
379 ldw -100(%r30), %r10
380 ldw -104(%r30), %r9
381 ldw -108(%r30), %r8
382 ldw -112(%r30), %r7
383 ldw -116(%r30), %r6
384 ldw -120(%r30), %r5
385 ldw -124(%r30), %r4
386 mtctl %r3, %cr27
387 ldw,mb -CALLEE_SAVE_FRAME_SIZE(%r30), %r3
388 .endm
389#endif /* ! __LP64__ */
390
391 .macro save_specials regs
392
393 SAVE_SP (%sr0, PT_SR0 (\regs))
394 SAVE_SP (%sr1, PT_SR1 (\regs))
395 SAVE_SP (%sr2, PT_SR2 (\regs))
396 SAVE_SP (%sr3, PT_SR3 (\regs))
397 SAVE_SP (%sr4, PT_SR4 (\regs))
398 SAVE_SP (%sr5, PT_SR5 (\regs))
399 SAVE_SP (%sr6, PT_SR6 (\regs))
400 SAVE_SP (%sr7, PT_SR7 (\regs))
401
402 SAVE_CR (%cr17, PT_IASQ0(\regs))
403 mtctl %r0, %cr17
404 SAVE_CR (%cr17, PT_IASQ1(\regs))
405
406 SAVE_CR (%cr18, PT_IAOQ0(\regs))
407 mtctl %r0, %cr18
408 SAVE_CR (%cr18, PT_IAOQ1(\regs))
409
410#ifdef __LP64__
411 /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
412 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
413 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
414 * we lose the 6th bit on a save/restore over interrupt.
415 */
416 mfctl,w %cr11, %r1
417 STREG %r1, PT_SAR (\regs)
418#else
419 SAVE_CR (%cr11, PT_SAR (\regs))
420#endif
421 SAVE_CR (%cr19, PT_IIR (\regs))
422
423 /*
424 * Code immediately following this macro (in intr_save) relies
425 * on r8 containing ipsw.
426 */
427 mfctl %cr22, %r8
428 STREG %r8, PT_PSW(\regs)
429 .endm
430
431 .macro rest_specials regs
432
433 REST_SP (%sr0, PT_SR0 (\regs))
434 REST_SP (%sr1, PT_SR1 (\regs))
435 REST_SP (%sr2, PT_SR2 (\regs))
436 REST_SP (%sr3, PT_SR3 (\regs))
437 REST_SP (%sr4, PT_SR4 (\regs))
438 REST_SP (%sr5, PT_SR5 (\regs))
439 REST_SP (%sr6, PT_SR6 (\regs))
440 REST_SP (%sr7, PT_SR7 (\regs))
441
442 REST_CR (%cr17, PT_IASQ0(\regs))
443 REST_CR (%cr17, PT_IASQ1(\regs))
444
445 REST_CR (%cr18, PT_IAOQ0(\regs))
446 REST_CR (%cr18, PT_IAOQ1(\regs))
447
448 REST_CR (%cr11, PT_SAR (\regs))
449
450 REST_CR (%cr22, PT_PSW (\regs))
451 .endm
452
453#endif /* __ASSEMBLY__ */
454#endif
diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h
new file mode 100644
index 000000000000..e24f7579adb0
--- /dev/null
+++ b/include/asm-parisc/atomic.h
@@ -0,0 +1,199 @@
1#ifndef _ASM_PARISC_ATOMIC_H_
2#define _ASM_PARISC_ATOMIC_H_
3
4#include <linux/config.h>
5#include <asm/system.h>
6/* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>. */
7
8/*
9 * Atomic operations that C can't guarantee us. Useful for
10 * resource counting etc..
11 *
12 * And probably incredibly slow on parisc. OTOH, we don't
13 * have to write any serious assembly. prumpf
14 */
15
16#ifdef CONFIG_SMP
17#include <asm/spinlock.h>
18#include <asm/cache.h> /* we use L1_CACHE_BYTES */
19
20/* Use an array of spinlocks for our atomic_ts.
21 * Hash function to index into a different SPINLOCK.
22 * Since "a" is usually an address, use one spinlock per cacheline.
23 */
24# define ATOMIC_HASH_SIZE 4
25# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
26
27extern spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
28
29/* Can't use _raw_spin_lock_irq because of #include problems, so
30 * this is the substitute */
31#define _atomic_spin_lock_irqsave(l,f) do { \
32 spinlock_t *s = ATOMIC_HASH(l); \
33 local_irq_save(f); \
34 _raw_spin_lock(s); \
35} while(0)
36
37#define _atomic_spin_unlock_irqrestore(l,f) do { \
38 spinlock_t *s = ATOMIC_HASH(l); \
39 _raw_spin_unlock(s); \
40 local_irq_restore(f); \
41} while(0)
42
43
44#else
45# define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
46# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
47#endif
48
49/* Note that we need not lock read accesses - aligned word writes/reads
50 * are atomic, so a reader never sees unconsistent values.
51 *
52 * Cache-line alignment would conflict with, for example, linux/module.h
53 */
54
55typedef struct { volatile int counter; } atomic_t;
56
57
58/* This should get optimized out since it's never called.
59** Or get a link error if xchg is used "wrong".
60*/
61extern void __xchg_called_with_bad_pointer(void);
62
63
64/* __xchg32/64 defined in arch/parisc/lib/bitops.c */
65extern unsigned long __xchg8(char, char *);
66extern unsigned long __xchg32(int, int *);
67#ifdef __LP64__
68extern unsigned long __xchg64(unsigned long, unsigned long *);
69#endif
70
71/* optimizer better get rid of switch since size is a constant */
72static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
73 int size)
74{
75
76 switch(size) {
77#ifdef __LP64__
78 case 8: return __xchg64(x,(unsigned long *) ptr);
79#endif
80 case 4: return __xchg32((int) x, (int *) ptr);
81 case 1: return __xchg8((char) x, (char *) ptr);
82 }
83 __xchg_called_with_bad_pointer();
84 return x;
85}
86
87
88/*
89** REVISIT - Abandoned use of LDCW in xchg() for now:
90** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
91** o and while we are at it, could __LP64__ code use LDCD too?
92**
93** if (__builtin_constant_p(x) && (x == NULL))
94** if (((unsigned long)p & 0xf) == 0)
95** return __ldcw(p);
96*/
97#define xchg(ptr,x) \
98 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
99
100
101#define __HAVE_ARCH_CMPXCHG 1
102
103/* bug catcher for when unsupported size is used - won't link */
104extern void __cmpxchg_called_with_bad_pointer(void);
105
106/* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */
107extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old, unsigned int new_);
108extern unsigned long __cmpxchg_u64(volatile unsigned long *ptr, unsigned long old, unsigned long new_);
109
110/* don't worry...optimizer will get rid of most of this */
111static __inline__ unsigned long
112__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
113{
114 switch(size) {
115#ifdef __LP64__
116 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
117#endif
118 case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_);
119 }
120 __cmpxchg_called_with_bad_pointer();
121 return old;
122}
123
124#define cmpxchg(ptr,o,n) \
125 ({ \
126 __typeof__(*(ptr)) _o_ = (o); \
127 __typeof__(*(ptr)) _n_ = (n); \
128 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
129 (unsigned long)_n_, sizeof(*(ptr))); \
130 })
131
132
133
134/* It's possible to reduce all atomic operations to either
135 * __atomic_add_return, atomic_set and atomic_read (the latter
136 * is there only for consistency).
137 */
138
139static __inline__ int __atomic_add_return(int i, atomic_t *v)
140{
141 int ret;
142 unsigned long flags;
143 _atomic_spin_lock_irqsave(v, flags);
144
145 ret = (v->counter += i);
146
147 _atomic_spin_unlock_irqrestore(v, flags);
148 return ret;
149}
150
151static __inline__ void atomic_set(atomic_t *v, int i)
152{
153 unsigned long flags;
154 _atomic_spin_lock_irqsave(v, flags);
155
156 v->counter = i;
157
158 _atomic_spin_unlock_irqrestore(v, flags);
159}
160
161static __inline__ int atomic_read(const atomic_t *v)
162{
163 return v->counter;
164}
165
166/* exported interface */
167
168#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v))))
169#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v))))
170#define atomic_inc(v) ((void)(__atomic_add_return( 1,(v))))
171#define atomic_dec(v) ((void)(__atomic_add_return( -1,(v))))
172
173#define atomic_add_return(i,v) (__atomic_add_return( ((int)i),(v)))
174#define atomic_sub_return(i,v) (__atomic_add_return(-((int)i),(v)))
175#define atomic_inc_return(v) (__atomic_add_return( 1,(v)))
176#define atomic_dec_return(v) (__atomic_add_return( -1,(v)))
177
178#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
179
180/*
181 * atomic_inc_and_test - increment and test
182 * @v: pointer of type atomic_t
183 *
184 * Atomically increments @v by 1
185 * and returns true if the result is zero, or false for all
186 * other cases.
187 */
188#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
189
190#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
191
192#define ATOMIC_INIT(i) { (i) }
193
194#define smp_mb__before_atomic_dec() smp_mb()
195#define smp_mb__after_atomic_dec() smp_mb()
196#define smp_mb__before_atomic_inc() smp_mb()
197#define smp_mb__after_atomic_inc() smp_mb()
198
199#endif
diff --git a/include/asm-parisc/bitops.h b/include/asm-parisc/bitops.h
new file mode 100644
index 000000000000..928e5ef850bd
--- /dev/null
+++ b/include/asm-parisc/bitops.h
@@ -0,0 +1,520 @@
1#ifndef _PARISC_BITOPS_H
2#define _PARISC_BITOPS_H
3
4#include <linux/compiler.h>
5#include <asm/system.h>
6#include <asm/byteorder.h>
7#include <asm/atomic.h>
8
9/*
10 * HP-PARISC specific bit operations
11 * for a detailed description of the functions please refer
12 * to include/asm-i386/bitops.h or kerneldoc
13 */
14
15#ifdef __LP64__
16# define SHIFT_PER_LONG 6
17#ifndef BITS_PER_LONG
18# define BITS_PER_LONG 64
19#endif
20#else
21# define SHIFT_PER_LONG 5
22#ifndef BITS_PER_LONG
23# define BITS_PER_LONG 32
24#endif
25#endif
26
27#define CHOP_SHIFTCOUNT(x) ((x) & (BITS_PER_LONG - 1))
28
29
30#define smp_mb__before_clear_bit() smp_mb()
31#define smp_mb__after_clear_bit() smp_mb()
32
33static __inline__ void set_bit(int nr, volatile unsigned long * address)
34{
35 unsigned long mask;
36 unsigned long *addr = (unsigned long *) address;
37 unsigned long flags;
38
39 addr += (nr >> SHIFT_PER_LONG);
40 mask = 1L << CHOP_SHIFTCOUNT(nr);
41 _atomic_spin_lock_irqsave(addr, flags);
42 *addr |= mask;
43 _atomic_spin_unlock_irqrestore(addr, flags);
44}
45
46static __inline__ void __set_bit(int nr, volatile unsigned long * address)
47{
48 unsigned long mask;
49 unsigned long *addr = (unsigned long *) address;
50
51 addr += (nr >> SHIFT_PER_LONG);
52 mask = 1L << CHOP_SHIFTCOUNT(nr);
53 *addr |= mask;
54}
55
56static __inline__ void clear_bit(int nr, volatile unsigned long * address)
57{
58 unsigned long mask;
59 unsigned long *addr = (unsigned long *) address;
60 unsigned long flags;
61
62 addr += (nr >> SHIFT_PER_LONG);
63 mask = 1L << CHOP_SHIFTCOUNT(nr);
64 _atomic_spin_lock_irqsave(addr, flags);
65 *addr &= ~mask;
66 _atomic_spin_unlock_irqrestore(addr, flags);
67}
68
69static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long * address)
70{
71 unsigned long mask;
72 unsigned long *addr = (unsigned long *) address;
73
74 addr += (nr >> SHIFT_PER_LONG);
75 mask = 1L << CHOP_SHIFTCOUNT(nr);
76 *addr &= ~mask;
77}
78
79static __inline__ void change_bit(int nr, volatile unsigned long * address)
80{
81 unsigned long mask;
82 unsigned long *addr = (unsigned long *) address;
83 unsigned long flags;
84
85 addr += (nr >> SHIFT_PER_LONG);
86 mask = 1L << CHOP_SHIFTCOUNT(nr);
87 _atomic_spin_lock_irqsave(addr, flags);
88 *addr ^= mask;
89 _atomic_spin_unlock_irqrestore(addr, flags);
90}
91
92static __inline__ void __change_bit(int nr, volatile unsigned long * address)
93{
94 unsigned long mask;
95 unsigned long *addr = (unsigned long *) address;
96
97 addr += (nr >> SHIFT_PER_LONG);
98 mask = 1L << CHOP_SHIFTCOUNT(nr);
99 *addr ^= mask;
100}
101
102static __inline__ int test_and_set_bit(int nr, volatile unsigned long * address)
103{
104 unsigned long mask;
105 unsigned long *addr = (unsigned long *) address;
106 int oldbit;
107 unsigned long flags;
108
109 addr += (nr >> SHIFT_PER_LONG);
110 mask = 1L << CHOP_SHIFTCOUNT(nr);
111 _atomic_spin_lock_irqsave(addr, flags);
112 oldbit = (*addr & mask) ? 1 : 0;
113 *addr |= mask;
114 _atomic_spin_unlock_irqrestore(addr, flags);
115
116 return oldbit;
117}
118
119static __inline__ int __test_and_set_bit(int nr, volatile unsigned long * address)
120{
121 unsigned long mask;
122 unsigned long *addr = (unsigned long *) address;
123 int oldbit;
124
125 addr += (nr >> SHIFT_PER_LONG);
126 mask = 1L << CHOP_SHIFTCOUNT(nr);
127 oldbit = (*addr & mask) ? 1 : 0;
128 *addr |= mask;
129
130 return oldbit;
131}
132
133static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * address)
134{
135 unsigned long mask;
136 unsigned long *addr = (unsigned long *) address;
137 int oldbit;
138 unsigned long flags;
139
140 addr += (nr >> SHIFT_PER_LONG);
141 mask = 1L << CHOP_SHIFTCOUNT(nr);
142 _atomic_spin_lock_irqsave(addr, flags);
143 oldbit = (*addr & mask) ? 1 : 0;
144 *addr &= ~mask;
145 _atomic_spin_unlock_irqrestore(addr, flags);
146
147 return oldbit;
148}
149
150static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long * address)
151{
152 unsigned long mask;
153 unsigned long *addr = (unsigned long *) address;
154 int oldbit;
155
156 addr += (nr >> SHIFT_PER_LONG);
157 mask = 1L << CHOP_SHIFTCOUNT(nr);
158 oldbit = (*addr & mask) ? 1 : 0;
159 *addr &= ~mask;
160
161 return oldbit;
162}
163
164static __inline__ int test_and_change_bit(int nr, volatile unsigned long * address)
165{
166 unsigned long mask;
167 unsigned long *addr = (unsigned long *) address;
168 int oldbit;
169 unsigned long flags;
170
171 addr += (nr >> SHIFT_PER_LONG);
172 mask = 1L << CHOP_SHIFTCOUNT(nr);
173 _atomic_spin_lock_irqsave(addr, flags);
174 oldbit = (*addr & mask) ? 1 : 0;
175 *addr ^= mask;
176 _atomic_spin_unlock_irqrestore(addr, flags);
177
178 return oldbit;
179}
180
181static __inline__ int __test_and_change_bit(int nr, volatile unsigned long * address)
182{
183 unsigned long mask;
184 unsigned long *addr = (unsigned long *) address;
185 int oldbit;
186
187 addr += (nr >> SHIFT_PER_LONG);
188 mask = 1L << CHOP_SHIFTCOUNT(nr);
189 oldbit = (*addr & mask) ? 1 : 0;
190 *addr ^= mask;
191
192 return oldbit;
193}
194
195static __inline__ int test_bit(int nr, const volatile unsigned long *address)
196{
197 unsigned long mask;
198 const unsigned long *addr = (const unsigned long *)address;
199
200 addr += (nr >> SHIFT_PER_LONG);
201 mask = 1L << CHOP_SHIFTCOUNT(nr);
202
203 return !!(*addr & mask);
204}
205
206#ifdef __KERNEL__
207
208/**
209 * __ffs - find first bit in word. returns 0 to "BITS_PER_LONG-1".
210 * @word: The word to search
211 *
212 * __ffs() return is undefined if no bit is set.
213 *
214 * 32-bit fast __ffs by LaMont Jones "lamont At hp com".
215 * 64-bit enhancement by Grant Grundler "grundler At parisc-linux org".
216 * (with help from willy/jejb to get the semantics right)
217 *
218 * This algorithm avoids branches by making use of nullification.
219 * One side effect of "extr" instructions is it sets PSW[N] bit.
220 * How PSW[N] (nullify next insn) gets set is determined by the
221 * "condition" field (eg "<>" or "TR" below) in the extr* insn.
222 * Only the 1st and one of either the 2cd or 3rd insn will get executed.
223 * Each set of 3 insn will get executed in 2 cycles on PA8x00 vs 16 or so
224 * cycles for each mispredicted branch.
225 */
226
227static __inline__ unsigned long __ffs(unsigned long x)
228{
229 unsigned long ret;
230
231 __asm__(
232#if BITS_PER_LONG > 32
233 " ldi 63,%1\n"
234 " extrd,u,*<> %0,63,32,%%r0\n"
235 " extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */
236 " addi -32,%1,%1\n"
237#else
238 " ldi 31,%1\n"
239#endif
240 " extru,<> %0,31,16,%%r0\n"
241 " extru,TR %0,15,16,%0\n" /* xxxx0000 -> 0000xxxx */
242 " addi -16,%1,%1\n"
243 " extru,<> %0,31,8,%%r0\n"
244 " extru,TR %0,23,8,%0\n" /* 0000xx00 -> 000000xx */
245 " addi -8,%1,%1\n"
246 " extru,<> %0,31,4,%%r0\n"
247 " extru,TR %0,27,4,%0\n" /* 000000x0 -> 0000000x */
248 " addi -4,%1,%1\n"
249 " extru,<> %0,31,2,%%r0\n"
250 " extru,TR %0,29,2,%0\n" /* 0000000y, 1100b -> 0011b */
251 " addi -2,%1,%1\n"
252 " extru,= %0,31,1,%%r0\n" /* check last bit */
253 " addi -1,%1,%1\n"
254 : "+r" (x), "=r" (ret) );
255 return ret;
256}
257
258/* Undefined if no bit is zero. */
259#define ffz(x) __ffs(~x)
260
261/*
262 * ffs: find first bit set. returns 1 to BITS_PER_LONG or 0 (if none set)
263 * This is defined the same way as the libc and compiler builtin
264 * ffs routines, therefore differs in spirit from the above ffz (man ffs).
265 */
266static __inline__ int ffs(int x)
267{
268 return x ? (__ffs((unsigned long)x) + 1) : 0;
269}
270
271/*
272 * fls: find last (most significant) bit set.
273 * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
274 */
275
276static __inline__ int fls(int x)
277{
278 int ret;
279 if (!x)
280 return 0;
281
282 __asm__(
283 " ldi 1,%1\n"
284 " extru,<> %0,15,16,%%r0\n"
285 " zdep,TR %0,15,16,%0\n" /* xxxx0000 */
286 " addi 16,%1,%1\n"
287 " extru,<> %0,7,8,%%r0\n"
288 " zdep,TR %0,23,24,%0\n" /* xx000000 */
289 " addi 8,%1,%1\n"
290 " extru,<> %0,3,4,%%r0\n"
291 " zdep,TR %0,27,28,%0\n" /* x0000000 */
292 " addi 4,%1,%1\n"
293 " extru,<> %0,1,2,%%r0\n"
294 " zdep,TR %0,29,30,%0\n" /* y0000000 (y&3 = 0) */
295 " addi 2,%1,%1\n"
296 " extru,= %0,0,1,%%r0\n"
297 " addi 1,%1,%1\n" /* if y & 8, add 1 */
298 : "+r" (x), "=r" (ret) );
299
300 return ret;
301}
302
303/*
304 * hweightN: returns the hamming weight (i.e. the number
305 * of bits set) of a N-bit word
306 */
307#define hweight64(x) \
308({ \
309 unsigned long __x = (x); \
310 unsigned int __w; \
311 __w = generic_hweight32((unsigned int) __x); \
312 __w += generic_hweight32((unsigned int) (__x>>32)); \
313 __w; \
314})
315#define hweight32(x) generic_hweight32(x)
316#define hweight16(x) generic_hweight16(x)
317#define hweight8(x) generic_hweight8(x)
318
319/*
320 * Every architecture must define this function. It's the fastest
321 * way of searching a 140-bit bitmap where the first 100 bits are
322 * unlikely to be set. It's guaranteed that at least one of the 140
323 * bits is cleared.
324 */
325static inline int sched_find_first_bit(const unsigned long *b)
326{
327#ifndef __LP64__
328 if (unlikely(b[0]))
329 return __ffs(b[0]);
330 if (unlikely(b[1]))
331 return __ffs(b[1]) + 32;
332 if (unlikely(b[2]))
333 return __ffs(b[2]) + 64;
334 if (b[3])
335 return __ffs(b[3]) + 96;
336 return __ffs(b[4]) + 128;
337#else
338 if (unlikely(b[0]))
339 return __ffs(b[0]);
340 if (unlikely(((unsigned int)b[1])))
341 return __ffs(b[1]) + 64;
342 if (b[1] >> 32)
343 return __ffs(b[1] >> 32) + 96;
344 return __ffs(b[2]) + 128;
345#endif
346}
347
348#endif /* __KERNEL__ */
349
350/*
351 * This implementation of find_{first,next}_zero_bit was stolen from
352 * Linus' asm-alpha/bitops.h.
353 */
354#define find_first_zero_bit(addr, size) \
355 find_next_zero_bit((addr), (size), 0)
356
357static __inline__ unsigned long find_next_zero_bit(const void * addr, unsigned long size, unsigned long offset)
358{
359 const unsigned long * p = ((unsigned long *) addr) + (offset >> SHIFT_PER_LONG);
360 unsigned long result = offset & ~(BITS_PER_LONG-1);
361 unsigned long tmp;
362
363 if (offset >= size)
364 return size;
365 size -= result;
366 offset &= (BITS_PER_LONG-1);
367 if (offset) {
368 tmp = *(p++);
369 tmp |= ~0UL >> (BITS_PER_LONG-offset);
370 if (size < BITS_PER_LONG)
371 goto found_first;
372 if (~tmp)
373 goto found_middle;
374 size -= BITS_PER_LONG;
375 result += BITS_PER_LONG;
376 }
377 while (size & ~(BITS_PER_LONG -1)) {
378 if (~(tmp = *(p++)))
379 goto found_middle;
380 result += BITS_PER_LONG;
381 size -= BITS_PER_LONG;
382 }
383 if (!size)
384 return result;
385 tmp = *p;
386found_first:
387 tmp |= ~0UL << size;
388found_middle:
389 return result + ffz(tmp);
390}
391
392static __inline__ unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset)
393{
394 const unsigned long *p = addr + (offset >> 6);
395 unsigned long result = offset & ~(BITS_PER_LONG-1);
396 unsigned long tmp;
397
398 if (offset >= size)
399 return size;
400 size -= result;
401 offset &= (BITS_PER_LONG-1);
402 if (offset) {
403 tmp = *(p++);
404 tmp &= (~0UL << offset);
405 if (size < BITS_PER_LONG)
406 goto found_first;
407 if (tmp)
408 goto found_middle;
409 size -= BITS_PER_LONG;
410 result += BITS_PER_LONG;
411 }
412 while (size & ~(BITS_PER_LONG-1)) {
413 if ((tmp = *(p++)))
414 goto found_middle;
415 result += BITS_PER_LONG;
416 size -= BITS_PER_LONG;
417 }
418 if (!size)
419 return result;
420 tmp = *p;
421
422found_first:
423 tmp &= (~0UL >> (BITS_PER_LONG - size));
424 if (tmp == 0UL) /* Are any bits set? */
425 return result + size; /* Nope. */
426found_middle:
427 return result + __ffs(tmp);
428}
429
430/**
431 * find_first_bit - find the first set bit in a memory region
432 * @addr: The address to start the search at
433 * @size: The maximum size to search
434 *
435 * Returns the bit-number of the first set bit, not the number of the byte
436 * containing a bit.
437 */
438#define find_first_bit(addr, size) \
439 find_next_bit((addr), (size), 0)
440
441#define _EXT2_HAVE_ASM_BITOPS_
442
443#ifdef __KERNEL__
444/*
445 * test_and_{set,clear}_bit guarantee atomicity without
446 * disabling interrupts.
447 */
448#ifdef __LP64__
449#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x38, (unsigned long *)addr)
450#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x38, (unsigned long *)addr)
451#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x38, (unsigned long *)addr)
452#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x38, (unsigned long *)addr)
453#else
454#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x18, (unsigned long *)addr)
455#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x18, (unsigned long *)addr)
456#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x18, (unsigned long *)addr)
457#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)addr)
458#endif
459
460#endif /* __KERNEL__ */
461
462static __inline__ int ext2_test_bit(int nr, __const__ void * addr)
463{
464 __const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
465
466 return (ADDR[nr >> 3] >> (nr & 7)) & 1;
467}
468
469/*
470 * This implementation of ext2_find_{first,next}_zero_bit was stolen from
471 * Linus' asm-alpha/bitops.h and modified for a big-endian machine.
472 */
473
474#define ext2_find_first_zero_bit(addr, size) \
475 ext2_find_next_zero_bit((addr), (size), 0)
476
477extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr,
478 unsigned long size, unsigned long offset)
479{
480 unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
481 unsigned int result = offset & ~31UL;
482 unsigned int tmp;
483
484 if (offset >= size)
485 return size;
486 size -= result;
487 offset &= 31UL;
488 if (offset) {
489 tmp = cpu_to_le32p(p++);
490 tmp |= ~0UL >> (32-offset);
491 if (size < 32)
492 goto found_first;
493 if (tmp != ~0U)
494 goto found_middle;
495 size -= 32;
496 result += 32;
497 }
498 while (size >= 32) {
499 if ((tmp = cpu_to_le32p(p++)) != ~0U)
500 goto found_middle;
501 result += 32;
502 size -= 32;
503 }
504 if (!size)
505 return result;
506 tmp = cpu_to_le32p(p);
507found_first:
508 tmp |= ~0U << size;
509found_middle:
510 return result + ffz(tmp);
511}
512
513/* Bitmap functions for the minix filesystem. */
514#define minix_test_and_set_bit(nr,addr) ext2_set_bit(nr,addr)
515#define minix_set_bit(nr,addr) ((void)ext2_set_bit(nr,addr))
516#define minix_test_and_clear_bit(nr,addr) ext2_clear_bit(nr,addr)
517#define minix_test_bit(nr,addr) ext2_test_bit(nr,addr)
518#define minix_find_first_zero_bit(addr,size) ext2_find_first_zero_bit(addr,size)
519
520#endif /* _PARISC_BITOPS_H */
diff --git a/include/asm-parisc/bug.h b/include/asm-parisc/bug.h
new file mode 100644
index 000000000000..e72f6e2b4b9f
--- /dev/null
+++ b/include/asm-parisc/bug.h
@@ -0,0 +1,12 @@
1#ifndef _PARISC_BUG_H
2#define _PARISC_BUG_H
3
4#define HAVE_ARCH_BUG
5#define BUG() do { \
6 printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
7 dump_stack(); \
8 panic("BUG!"); \
9} while (0)
10
11#include <asm-generic/bug.h>
12#endif
diff --git a/include/asm-parisc/bugs.h b/include/asm-parisc/bugs.h
new file mode 100644
index 000000000000..9e6284342a5f
--- /dev/null
+++ b/include/asm-parisc/bugs.h
@@ -0,0 +1,19 @@
1/*
2 * include/asm-parisc/bugs.h
3 *
4 * Copyright (C) 1999 Mike Shaver
5 */
6
7/*
8 * This is included by init/main.c to check for architecture-dependent bugs.
9 *
10 * Needs:
11 * void check_bugs(void);
12 */
13
14#include <asm/processor.h>
15
16static inline void check_bugs(void)
17{
18// identify_cpu(&boot_cpu_data);
19}
diff --git a/include/asm-parisc/byteorder.h b/include/asm-parisc/byteorder.h
new file mode 100644
index 000000000000..db148313de5d
--- /dev/null
+++ b/include/asm-parisc/byteorder.h
@@ -0,0 +1,82 @@
1#ifndef _PARISC_BYTEORDER_H
2#define _PARISC_BYTEORDER_H
3
4#include <asm/types.h>
5#include <linux/compiler.h>
6
7#ifdef __GNUC__
8
9static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
10{
11 __asm__("dep %0, 15, 8, %0\n\t" /* deposit 00ab -> 0bab */
12 "shd %%r0, %0, 8, %0" /* shift 000000ab -> 00ba */
13 : "=r" (x)
14 : "0" (x));
15 return x;
16}
17
18static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x)
19{
20 __asm__("shd %0, %0, 8, %0\n\t" /* shift xabcxabc -> cxab */
21 "dep %0, 15, 8, %0\n\t" /* deposit cxab -> cbab */
22 "shd %%r0, %0, 8, %0" /* shift 0000cbab -> 0cba */
23 : "=r" (x)
24 : "0" (x));
25 return x;
26}
27
28static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
29{
30 unsigned int temp;
31 __asm__("shd %0, %0, 16, %1\n\t" /* shift abcdabcd -> cdab */
32 "dep %1, 15, 8, %1\n\t" /* deposit cdab -> cbab */
33 "shd %0, %1, 8, %0" /* shift abcdcbab -> dcba */
34 : "=r" (x), "=&r" (temp)
35 : "0" (x));
36 return x;
37}
38
39
40#if BITS_PER_LONG > 32
41/*
42** From "PA-RISC 2.0 Architecture", HP Professional Books.
43** See Appendix I page 8 , "Endian Byte Swapping".
44**
45** Pretty cool algorithm: (* == zero'd bits)
46** PERMH 01234567 -> 67452301 into %0
47** HSHL 67452301 -> 7*5*3*1* into %1
48** HSHR 67452301 -> *6*4*2*0 into %0
49** OR %0 | %1 -> 76543210 into %0 (all done!)
50*/
51static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) {
52 __u64 temp;
53 __asm__("permh,3210 %0, %0\n\t"
54 "hshl %0, 8, %1\n\t"
55 "hshr,u %0, 8, %0\n\t"
56 "or %1, %0, %0"
57 : "=r" (x), "=&r" (temp)
58 : "0" (x));
59 return x;
60}
61#define __arch__swab64(x) ___arch__swab64(x)
62#define __BYTEORDER_HAS_U64__
63#elif !defined(__STRICT_ANSI__)
64static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
65{
66 __u32 t1 = ___arch__swab32((__u32) x);
67 __u32 t2 = ___arch__swab32((__u32) (x >> 32));
68 return (((__u64) t1 << 32) | t2);
69}
70#define __arch__swab64(x) ___arch__swab64(x)
71#define __BYTEORDER_HAS_U64__
72#endif
73
74#define __arch__swab16(x) ___arch__swab16(x)
75#define __arch__swab24(x) ___arch__swab24(x)
76#define __arch__swab32(x) ___arch__swab32(x)
77
78#endif /* __GNUC__ */
79
80#include <linux/byteorder/big_endian.h>
81
82#endif /* _PARISC_BYTEORDER_H */
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h
new file mode 100644
index 000000000000..5da72e38bdde
--- /dev/null
+++ b/include/asm-parisc/cache.h
@@ -0,0 +1,79 @@
1/*
2 * include/asm-parisc/cache.h
3 */
4
5#ifndef __ARCH_PARISC_CACHE_H
6#define __ARCH_PARISC_CACHE_H
7
8#include <linux/config.h>
9
10/*
11 * PA 2.0 processors have 64-byte cachelines; PA 1.1 processors have
12 * 32-byte cachelines. The default configuration is not for SMP anyway,
13 * so if you're building for SMP, you should select the appropriate
14 * processor type. There is a potential livelock danger when running
15 * a machine with this value set too small, but it's more probable you'll
16 * just ruin performance.
17 */
18#ifdef CONFIG_PA20
19#define L1_CACHE_BYTES 64
20#define L1_CACHE_SHIFT 6
21#else
22#define L1_CACHE_BYTES 32
23#define L1_CACHE_SHIFT 5
24#endif
25
26#ifndef __ASSEMBLY__
27
28#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
29
30#define SMP_CACHE_BYTES L1_CACHE_BYTES
31#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */
32
33extern void flush_data_cache_local(void); /* flushes local data-cache only */
34extern void flush_instruction_cache_local(void); /* flushes local code-cache only */
35#ifdef CONFIG_SMP
36extern void flush_data_cache(void); /* flushes data-cache only (all processors) */
37extern void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
38#else
39#define flush_data_cache flush_data_cache_local
40#define flush_instruction_cache flush_instruction_cache_local
41#endif
42
43extern void parisc_cache_init(void); /* initializes cache-flushing */
44extern void flush_all_caches(void); /* flush everything (tlb & cache) */
45extern int get_cache_info(char *);
46extern void flush_user_icache_range_asm(unsigned long, unsigned long);
47extern void flush_kernel_icache_range_asm(unsigned long, unsigned long);
48extern void flush_user_dcache_range_asm(unsigned long, unsigned long);
49extern void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
50extern void flush_kernel_dcache_page(void *);
51extern void flush_kernel_icache_page(void *);
52extern void disable_sr_hashing(void); /* turns off space register hashing */
53extern void disable_sr_hashing_asm(int); /* low level support for above */
54extern void free_sid(unsigned long);
55unsigned long alloc_sid(void);
56extern void flush_user_dcache_page(unsigned long);
57extern void flush_user_icache_page(unsigned long);
58
59struct seq_file;
60extern void show_cache_info(struct seq_file *m);
61
62extern int split_tlb;
63extern int dcache_stride;
64extern int icache_stride;
65extern struct pdc_cache_info cache_info;
66
67#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr));
68#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr));
69#define pdtlb_kernel(addr) asm volatile("pdtlb 0(%0)" : : "r" (addr));
70
71#endif /* ! __ASSEMBLY__ */
72
73/* Classes of processor wrt: disabling space register hashing */
74
75#define SRHASH_PCXST 0 /* pcxs, pcxt, pcxt_ */
76#define SRHASH_PCXL 1 /* pcxl */
77#define SRHASH_PA20 2 /* pcxu, pcxu_, pcxw, pcxw_ */
78
79#endif
diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h
new file mode 100644
index 000000000000..06732719d927
--- /dev/null
+++ b/include/asm-parisc/cacheflush.h
@@ -0,0 +1,182 @@
1#ifndef _PARISC_CACHEFLUSH_H
2#define _PARISC_CACHEFLUSH_H
3
4#include <linux/config.h>
5#include <linux/mm.h>
6
7/* The usual comment is "Caches aren't brain-dead on the <architecture>".
8 * Unfortunately, that doesn't apply to PA-RISC. */
9
10/* Cache flush operations */
11
12#ifdef CONFIG_SMP
13#define flush_cache_mm(mm) flush_cache_all()
14#else
15#define flush_cache_mm(mm) flush_cache_all_local()
16#endif
17
18#define flush_kernel_dcache_range(start,size) \
19 flush_kernel_dcache_range_asm((start), (start)+(size));
20
21extern void flush_cache_all_local(void);
22
23static inline void cacheflush_h_tmp_function(void *dummy)
24{
25 flush_cache_all_local();
26}
27
28static inline void flush_cache_all(void)
29{
30 on_each_cpu(cacheflush_h_tmp_function, NULL, 1, 1);
31}
32
33#define flush_cache_vmap(start, end) flush_cache_all()
34#define flush_cache_vunmap(start, end) flush_cache_all()
35
36extern int parisc_cache_flush_threshold;
37void parisc_setup_cache_timing(void);
38
39static inline void
40flush_user_dcache_range(unsigned long start, unsigned long end)
41{
42 if ((end - start) < parisc_cache_flush_threshold)
43 flush_user_dcache_range_asm(start,end);
44 else
45 flush_data_cache();
46}
47
48static inline void
49flush_user_icache_range(unsigned long start, unsigned long end)
50{
51 if ((end - start) < parisc_cache_flush_threshold)
52 flush_user_icache_range_asm(start,end);
53 else
54 flush_instruction_cache();
55}
56
57extern void flush_dcache_page(struct page *page);
58
59#define flush_dcache_mmap_lock(mapping) \
60 write_lock_irq(&(mapping)->tree_lock)
61#define flush_dcache_mmap_unlock(mapping) \
62 write_unlock_irq(&(mapping)->tree_lock)
63
64#define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page_address(page)); flush_kernel_icache_page(page_address(page)); } while (0)
65
66#define flush_icache_range(s,e) do { flush_kernel_dcache_range_asm(s,e); flush_kernel_icache_range_asm(s,e); } while (0)
67
68#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
69do { \
70 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
71 memcpy(dst, src, len); \
72 flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \
73} while (0)
74
75#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
76do { \
77 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
78 memcpy(dst, src, len); \
79} while (0)
80
81static inline void flush_cache_range(struct vm_area_struct *vma,
82 unsigned long start, unsigned long end)
83{
84 int sr3;
85
86 if (!vma->vm_mm->context) {
87 BUG();
88 return;
89 }
90
91 sr3 = mfsp(3);
92 if (vma->vm_mm->context == sr3) {
93 flush_user_dcache_range(start,end);
94 flush_user_icache_range(start,end);
95 } else {
96 flush_cache_all();
97 }
98}
99
100/* Simple function to work out if we have an existing address translation
101 * for a user space vma. */
102static inline pte_t *__translation_exists(struct mm_struct *mm,
103 unsigned long addr)
104{
105 pgd_t *pgd = pgd_offset(mm, addr);
106 pmd_t *pmd;
107 pte_t *pte;
108
109 if(pgd_none(*pgd))
110 return NULL;
111
112 pmd = pmd_offset(pgd, addr);
113 if(pmd_none(*pmd) || pmd_bad(*pmd))
114 return NULL;
115
116 pte = pte_offset_map(pmd, addr);
117
118 /* The PA flush mappings show up as pte_none, but they're
119 * valid none the less */
120 if(pte_none(*pte) && ((pte_val(*pte) & _PAGE_FLUSH) == 0))
121 return NULL;
122 return pte;
123}
124#define translation_exists(vma, addr) __translation_exists((vma)->vm_mm, addr)
125
126
127/* Private function to flush a page from the cache of a non-current
128 * process. cr25 contains the Page Directory of the current user
129 * process; we're going to hijack both it and the user space %sr3 to
130 * temporarily make the non-current process current. We have to do
131 * this because cache flushing may cause a non-access tlb miss which
132 * the handlers have to fill in from the pgd of the non-current
133 * process. */
134static inline void
135flush_user_cache_page_non_current(struct vm_area_struct *vma,
136 unsigned long vmaddr)
137{
138 /* save the current process space and pgd */
139 unsigned long space = mfsp(3), pgd = mfctl(25);
140
141 /* we don't mind taking interrups since they may not
142 * do anything with user space, but we can't
143 * be preempted here */
144 preempt_disable();
145
146 /* make us current */
147 mtctl(__pa(vma->vm_mm->pgd), 25);
148 mtsp(vma->vm_mm->context, 3);
149
150 flush_user_dcache_page(vmaddr);
151 if(vma->vm_flags & VM_EXEC)
152 flush_user_icache_page(vmaddr);
153
154 /* put the old current process back */
155 mtsp(space, 3);
156 mtctl(pgd, 25);
157 preempt_enable();
158}
159
160static inline void
161__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr)
162{
163 if (likely(vma->vm_mm->context == mfsp(3))) {
164 flush_user_dcache_page(vmaddr);
165 if (vma->vm_flags & VM_EXEC)
166 flush_user_icache_page(vmaddr);
167 } else {
168 flush_user_cache_page_non_current(vma, vmaddr);
169 }
170}
171
172static inline void
173flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
174{
175 BUG_ON(!vma->vm_mm->context);
176
177 if(likely(translation_exists(vma, vmaddr)))
178 __flush_cache_page(vma, vmaddr);
179
180}
181#endif
182
diff --git a/include/asm-parisc/checksum.h b/include/asm-parisc/checksum.h
new file mode 100644
index 000000000000..229cb56fdb7a
--- /dev/null
+++ b/include/asm-parisc/checksum.h
@@ -0,0 +1,213 @@
1#ifndef _PARISC_CHECKSUM_H
2#define _PARISC_CHECKSUM_H
3
4#include <linux/in6.h>
5
6/*
7 * computes the checksum of a memory block at buff, length len,
8 * and adds in "sum" (32-bit)
9 *
10 * returns a 32-bit number suitable for feeding into itself
11 * or csum_tcpudp_magic
12 *
13 * this function must be called with even lengths, except
14 * for the last fragment, which may be odd
15 *
16 * it's best to have buff aligned on a 32-bit boundary
17 */
18extern unsigned int csum_partial(const unsigned char *, int, unsigned int);
19
20/*
21 * The same as csum_partial, but copies from src while it checksums.
22 *
23 * Here even more important to align src and dst on a 32-bit (or even
24 * better 64-bit) boundary
25 */
26extern unsigned int csum_partial_copy_nocheck(const unsigned char *, unsigned char *,
27 int, unsigned int);
28
29/*
30 * this is a new version of the above that records errors it finds in *errp,
31 * but continues and zeros the rest of the buffer.
32 */
33extern unsigned int csum_partial_copy_from_user(const unsigned char __user *src,
34 unsigned char *dst, int len, unsigned int sum, int *errp);
35
36/*
37 * Optimized for IP headers, which always checksum on 4 octet boundaries.
38 *
39 * Written by Randolph Chung <tausq@debian.org>, and then mucked with by
40 * LaMont Jones <lamont@debian.org>
41 */
42static inline unsigned short ip_fast_csum(unsigned char * iph,
43 unsigned int ihl) {
44 unsigned int sum;
45
46
47 __asm__ __volatile__ (
48" ldws,ma 4(%1), %0\n"
49" addib,<= -4, %2, 2f\n"
50"\n"
51" ldws 4(%1), %%r20\n"
52" ldws 8(%1), %%r21\n"
53" add %0, %%r20, %0\n"
54" ldws,ma 12(%1), %%r19\n"
55" addc %0, %%r21, %0\n"
56" addc %0, %%r19, %0\n"
57"1: ldws,ma 4(%1), %%r19\n"
58" addib,< 0, %2, 1b\n"
59" addc %0, %%r19, %0\n"
60"\n"
61" extru %0, 31, 16, %%r20\n"
62" extru %0, 15, 16, %%r21\n"
63" addc %%r20, %%r21, %0\n"
64" extru %0, 15, 16, %%r21\n"
65" add %0, %%r21, %0\n"
66" subi -1, %0, %0\n"
67"2:\n"
68 : "=r" (sum), "=r" (iph), "=r" (ihl)
69 : "1" (iph), "2" (ihl)
70 : "r19", "r20", "r21" );
71
72 return(sum);
73}
74
75/*
76 * Fold a partial checksum
77 */
78static inline unsigned int csum_fold(unsigned int sum)
79{
80 /* add the swapped two 16-bit halves of sum,
81 a possible carry from adding the two 16-bit halves,
82 will carry from the lower half into the upper half,
83 giving us the correct sum in the upper half. */
84 sum += (sum << 16) + (sum >> 16);
85 return (~sum) >> 16;
86}
87
88static inline unsigned long csum_tcpudp_nofold(unsigned long saddr,
89 unsigned long daddr,
90 unsigned short len,
91 unsigned short proto,
92 unsigned int sum)
93{
94 __asm__(
95 " add %1, %0, %0\n"
96 " addc %2, %0, %0\n"
97 " addc %3, %0, %0\n"
98 " addc %%r0, %0, %0\n"
99 : "=r" (sum)
100 : "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum));
101 return sum;
102}
103
104/*
105 * computes the checksum of the TCP/UDP pseudo-header
106 * returns a 16-bit checksum, already complemented
107 */
108static inline unsigned short int csum_tcpudp_magic(unsigned long saddr,
109 unsigned long daddr,
110 unsigned short len,
111 unsigned short proto,
112 unsigned int sum)
113{
114 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
115}
116
117/*
118 * this routine is used for miscellaneous IP-like checksums, mainly
119 * in icmp.c
120 */
121static inline unsigned short ip_compute_csum(unsigned char * buf, int len) {
122 return csum_fold (csum_partial(buf, len, 0));
123}
124
125
126#define _HAVE_ARCH_IPV6_CSUM
127static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
128 struct in6_addr *daddr,
129 __u16 len,
130 unsigned short proto,
131 unsigned int sum)
132{
133 __asm__ __volatile__ (
134
135#if BITS_PER_LONG > 32
136
137 /*
138 ** We can execute two loads and two adds per cycle on PA 8000.
139 ** But add insn's get serialized waiting for the carry bit.
140 ** Try to keep 4 registers with "live" values ahead of the ALU.
141 */
142
143" ldd,ma 8(%1), %%r19\n" /* get 1st saddr word */
144" ldd,ma 8(%2), %%r20\n" /* get 1st daddr word */
145" add %8, %3, %3\n"/* add 16-bit proto + len */
146" add %%r19, %0, %0\n"
147" ldd,ma 8(%1), %%r21\n" /* 2cd saddr */
148" ldd,ma 8(%2), %%r22\n" /* 2cd daddr */
149" add,dc %%r20, %0, %0\n"
150" add,dc %%r21, %0, %0\n"
151" add,dc %%r22, %0, %0\n"
152" add,dc %3, %0, %0\n" /* fold in proto+len | carry bit */
153" extrd,u %0, 31, 32, %%r19\n" /* copy upper half down */
154" depdi 0, 31, 32, %0\n" /* clear upper half */
155" add %%r19, %0, %0\n" /* fold into 32-bits */
156" addc 0, %0, %0\n" /* add carry */
157
158#else
159
160 /*
161 ** For PA 1.x, the insn order doesn't matter as much.
162 ** Insn stream is serialized on the carry bit here too.
163 ** result from the previous operation (eg r0 + x)
164 */
165
166" ldw,ma 4(%1), %%r19\n" /* get 1st saddr word */
167" ldw,ma 4(%2), %%r20\n" /* get 1st daddr word */
168" add %8, %3, %3\n" /* add 16-bit proto + len */
169" add %%r19, %0, %0\n"
170" ldw,ma 4(%1), %%r21\n" /* 2cd saddr */
171" addc %%r20, %0, %0\n"
172" ldw,ma 4(%2), %%r22\n" /* 2cd daddr */
173" addc %%r21, %0, %0\n"
174" ldw,ma 4(%1), %%r19\n" /* 3rd saddr */
175" addc %%r22, %0, %0\n"
176" ldw,ma 4(%2), %%r20\n" /* 3rd daddr */
177" addc %%r19, %0, %0\n"
178" ldw,ma 4(%1), %%r21\n" /* 4th saddr */
179" addc %%r20, %0, %0\n"
180" ldw,ma 4(%2), %%r22\n" /* 4th daddr */
181" addc %%r21, %0, %0\n"
182" addc %%r22, %0, %0\n"
183" addc %3, %0, %0\n" /* fold in proto+len, catch carry */
184
185#endif
186 : "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len)
187 : "0" (sum), "1" (saddr), "2" (daddr), "3" (len), "r" (proto)
188 : "r19", "r20", "r21", "r22");
189 return csum_fold(sum);
190}
191
192/*
193 * Copy and checksum to user
194 */
195#define HAVE_CSUM_COPY_USER
196static __inline__ unsigned int csum_and_copy_to_user (const unsigned char *src,
197 unsigned char __user *dst,
198 int len, int sum,
199 int *err_ptr)
200{
201 /* code stolen from include/asm-mips64 */
202 sum = csum_partial(src, len, sum);
203
204 if (copy_to_user(dst, src, len)) {
205 *err_ptr = -EFAULT;
206 return -1;
207 }
208
209 return sum;
210}
211
212#endif
213
diff --git a/include/asm-parisc/compat.h b/include/asm-parisc/compat.h
new file mode 100644
index 000000000000..ca0eac647a05
--- /dev/null
+++ b/include/asm-parisc/compat.h
@@ -0,0 +1,145 @@
1#ifndef _ASM_PARISC_COMPAT_H
2#define _ASM_PARISC_COMPAT_H
3/*
4 * Architecture specific compatibility types
5 */
6#include <linux/types.h>
7#include <linux/sched.h>
8
9#define COMPAT_USER_HZ 100
10
11typedef u32 compat_size_t;
12typedef s32 compat_ssize_t;
13typedef s32 compat_time_t;
14typedef s32 compat_clock_t;
15typedef s32 compat_pid_t;
16typedef u32 compat_uid_t;
17typedef u32 compat_gid_t;
18typedef u16 compat_mode_t;
19typedef u32 compat_ino_t;
20typedef u32 compat_dev_t;
21typedef s32 compat_off_t;
22typedef s64 compat_loff_t;
23typedef u16 compat_nlink_t;
24typedef u16 compat_ipc_pid_t;
25typedef s32 compat_daddr_t;
26typedef u32 compat_caddr_t;
27typedef u32 compat_timer_t;
28
29typedef s32 compat_int_t;
30typedef s32 compat_long_t;
31typedef u32 compat_uint_t;
32typedef u32 compat_ulong_t;
33
34struct compat_timespec {
35 compat_time_t tv_sec;
36 s32 tv_nsec;
37};
38
39struct compat_timeval {
40 compat_time_t tv_sec;
41 s32 tv_usec;
42};
43
44struct compat_stat {
45 compat_dev_t st_dev; /* dev_t is 32 bits on parisc */
46 compat_ino_t st_ino; /* 32 bits */
47 compat_mode_t st_mode; /* 16 bits */
48 compat_nlink_t st_nlink; /* 16 bits */
49 u16 st_reserved1; /* old st_uid */
50 u16 st_reserved2; /* old st_gid */
51 compat_dev_t st_rdev;
52 compat_off_t st_size;
53 compat_time_t st_atime;
54 u32 st_atime_nsec;
55 compat_time_t st_mtime;
56 u32 st_mtime_nsec;
57 compat_time_t st_ctime;
58 u32 st_ctime_nsec;
59 s32 st_blksize;
60 s32 st_blocks;
61 u32 __unused1; /* ACL stuff */
62 compat_dev_t __unused2; /* network */
63 compat_ino_t __unused3; /* network */
64 u32 __unused4; /* cnodes */
65 u16 __unused5; /* netsite */
66 short st_fstype;
67 compat_dev_t st_realdev;
68 u16 st_basemode;
69 u16 st_spareshort;
70 compat_uid_t st_uid;
71 compat_gid_t st_gid;
72 u32 st_spare4[3];
73};
74
75struct compat_flock {
76 short l_type;
77 short l_whence;
78 compat_off_t l_start;
79 compat_off_t l_len;
80 compat_pid_t l_pid;
81};
82
83struct compat_flock64 {
84 short l_type;
85 short l_whence;
86 compat_loff_t l_start;
87 compat_loff_t l_len;
88 compat_pid_t l_pid;
89};
90
91struct compat_statfs {
92 s32 f_type;
93 s32 f_bsize;
94 s32 f_blocks;
95 s32 f_bfree;
96 s32 f_bavail;
97 s32 f_files;
98 s32 f_ffree;
99 __kernel_fsid_t f_fsid;
100 s32 f_namelen;
101 s32 f_frsize;
102 s32 f_spare[5];
103};
104
105struct compat_sigcontext {
106 compat_int_t sc_flags;
107 compat_int_t sc_gr[32]; /* PSW in sc_gr[0] */
108 u64 sc_fr[32];
109 compat_int_t sc_iasq[2];
110 compat_int_t sc_iaoq[2];
111 compat_int_t sc_sar; /* cr11 */
112};
113
114#define COMPAT_RLIM_INFINITY 0xffffffff
115
116typedef u32 compat_old_sigset_t; /* at least 32 bits */
117
118#define _COMPAT_NSIG 64
119#define _COMPAT_NSIG_BPW 32
120
121typedef u32 compat_sigset_word;
122
123#define COMPAT_OFF_T_MAX 0x7fffffff
124#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
125
126/*
127 * A pointer passed in from user mode. This should not
128 * be used for syscall parameters, just declare them
129 * as pointers because the syscall entry code will have
130 * appropriately comverted them already.
131 */
132typedef u32 compat_uptr_t;
133
134static inline void __user *compat_ptr(compat_uptr_t uptr)
135{
136 return (void __user *)(unsigned long)uptr;
137}
138
139static __inline__ void __user *compat_alloc_user_space(long len)
140{
141 struct pt_regs *regs = &current->thread.regs;
142 return (void __user *)regs->gr[30];
143}
144
145#endif /* _ASM_PARISC_COMPAT_H */
diff --git a/include/asm-parisc/compat_rt_sigframe.h b/include/asm-parisc/compat_rt_sigframe.h
new file mode 100644
index 000000000000..81bec28bdc48
--- /dev/null
+++ b/include/asm-parisc/compat_rt_sigframe.h
@@ -0,0 +1,50 @@
1#include<linux/compat.h>
2#include<linux/compat_siginfo.h>
3#include<asm/compat_ucontext.h>
4
5#ifndef _ASM_PARISC_COMPAT_RT_SIGFRAME_H
6#define _ASM_PARISC_COMPAT_RT_SIGFRAME_H
7
8/* In a deft move of uber-hackery, we decide to carry the top half of all
9 * 64-bit registers in a non-portable, non-ABI, hidden structure.
10 * Userspace can read the hidden structure if it *wants* but is never
11 * guaranteed to be in the same place. Infact the uc_sigmask from the
12 * ucontext_t structure may push the hidden register file downards
13 */
14struct compat_regfile {
15 /* Upper half of all the 64-bit registers that were truncated
16 on a copy to a 32-bit userspace */
17 compat_int_t rf_gr[32];
18 compat_int_t rf_iasq[2];
19 compat_int_t rf_iaoq[2];
20 compat_int_t rf_sar;
21};
22
23#define COMPAT_SIGRETURN_TRAMP 4
24#define COMPAT_SIGRESTARTBLOCK_TRAMP 5
25#define COMPAT_TRAMP_SIZE (COMPAT_SIGRETURN_TRAMP + COMPAT_SIGRESTARTBLOCK_TRAMP)
26
27struct compat_rt_sigframe {
28 /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c
29 Secondary to that it must protect the ERESTART_RESTARTBLOCK
30 trampoline we left on the stack (we were bad and didn't
31 change sp so we could run really fast.) */
32 compat_uint_t tramp[COMPAT_TRAMP_SIZE];
33 compat_siginfo_t info;
34 struct compat_ucontext uc;
35 /* Hidden location of truncated registers, *must* be last. */
36 struct compat_regfile regs;
37};
38
39/*
40 * The 32-bit ABI wants at least 48 bytes for a function call frame:
41 * 16 bytes for arg0-arg3, and 32 bytes for magic (the only part of
42 * which Linux/parisc uses is sp-20 for the saved return pointer...)
43 * Then, the stack pointer must be rounded to a cache line (64 bytes).
44 */
45#define SIGFRAME32 64
46#define FUNCTIONCALLFRAME32 48
47#define PARISC_RT_SIGFRAME_SIZE32 \
48 (((sizeof(struct compat_rt_sigframe) + FUNCTIONCALLFRAME32) + SIGFRAME32) & -SIGFRAME32)
49
50#endif
diff --git a/include/asm-parisc/compat_signal.h b/include/asm-parisc/compat_signal.h
new file mode 100644
index 000000000000..6ad02c360b21
--- /dev/null
+++ b/include/asm-parisc/compat_signal.h
@@ -0,0 +1,2 @@
1/* Use generic */
2#include <asm-generic/compat_signal.h>
diff --git a/include/asm-parisc/compat_ucontext.h b/include/asm-parisc/compat_ucontext.h
new file mode 100644
index 000000000000..a1228a3d2071
--- /dev/null
+++ b/include/asm-parisc/compat_ucontext.h
@@ -0,0 +1,18 @@
1#ifndef _ASM_PARISC_COMPAT_UCONTEXT_H
2#define _ASM_PARISC_COMPAT_UCONTEXT_H
3
4#include<linux/compat.h>
5#include<asm/compat_signal.h>
6
7/* 32-bit ucontext as seen from an 64-bit kernel */
8struct compat_ucontext {
9 compat_uint_t uc_flags;
10 compat_uptr_t uc_link;
11 compat_stack_t uc_stack; /* struct compat_sigaltstack (12 bytes)*/
12 /* FIXME: Pad out to get uc_mcontext to start at an 8-byte aligned boundary */
13 compat_uint_t pad[1];
14 struct compat_sigcontext uc_mcontext;
15 compat_sigset_t uc_sigmask; /* mask last for extensibility */
16};
17
18#endif /* !_ASM_PARISC_COMPAT_UCONTEXT_H */
diff --git a/include/asm-parisc/cputime.h b/include/asm-parisc/cputime.h
new file mode 100644
index 000000000000..dcdf2fbd7e72
--- /dev/null
+++ b/include/asm-parisc/cputime.h
@@ -0,0 +1,6 @@
1#ifndef __PARISC_CPUTIME_H
2#define __PARISC_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __PARISC_CPUTIME_H */
diff --git a/include/asm-parisc/current.h b/include/asm-parisc/current.h
new file mode 100644
index 000000000000..0fb9338e3bf2
--- /dev/null
+++ b/include/asm-parisc/current.h
@@ -0,0 +1,15 @@
1#ifndef _PARISC_CURRENT_H
2#define _PARISC_CURRENT_H
3
4#include <linux/thread_info.h>
5
6struct task_struct;
7
8static inline struct task_struct * get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current get_current()
14
15#endif /* !(_PARISC_CURRENT_H) */
diff --git a/include/asm-parisc/delay.h b/include/asm-parisc/delay.h
new file mode 100644
index 000000000000..7a75e984674b
--- /dev/null
+++ b/include/asm-parisc/delay.h
@@ -0,0 +1,43 @@
1#ifndef _PARISC_DELAY_H
2#define _PARISC_DELAY_H
3
4#include <asm/system.h> /* for mfctl() */
5#include <asm/processor.h> /* for boot_cpu_data */
6
7
8/*
9 * Copyright (C) 1993 Linus Torvalds
10 *
11 * Delay routines
12 */
13
14static __inline__ void __delay(unsigned long loops) {
15 asm volatile(
16 " .balignl 64,0x34000034\n"
17 " addib,UV -1,%0,.\n"
18 " nop\n"
19 : "=r" (loops) : "0" (loops));
20}
21
22static __inline__ void __cr16_delay(unsigned long clocks) {
23 unsigned long start;
24
25 /*
26 * Note: Due to unsigned math, cr16 rollovers shouldn't be
27 * a problem here. However, on 32 bit, we need to make sure
28 * we don't pass in too big a value. The current default
29 * value of MAX_UDELAY_MS should help prevent this.
30 */
31
32 start = mfctl(16);
33 while ((mfctl(16) - start) < clocks)
34 ;
35}
36
37static __inline__ void __udelay(unsigned long usecs) {
38 __cr16_delay(usecs * ((unsigned long)boot_cpu_data.cpu_hz / 1000000UL));
39}
40
41#define udelay(n) __udelay(n)
42
43#endif /* defined(_PARISC_DELAY_H) */
diff --git a/include/asm-parisc/div64.h b/include/asm-parisc/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/include/asm-parisc/div64.h
@@ -0,0 +1 @@
#include <asm-generic/div64.h>
diff --git a/include/asm-parisc/dma-mapping.h b/include/asm-parisc/dma-mapping.h
new file mode 100644
index 000000000000..4db84f969e9e
--- /dev/null
+++ b/include/asm-parisc/dma-mapping.h
@@ -0,0 +1,254 @@
1#ifndef _PARISC_DMA_MAPPING_H
2#define _PARISC_DMA_MAPPING_H
3
4#include <linux/config.h>
5#include <linux/mm.h>
6#include <asm/cacheflush.h>
7#include <asm/scatterlist.h>
8
9/* See Documentation/DMA-mapping.txt */
10struct hppa_dma_ops {
11 int (*dma_supported)(struct device *dev, u64 mask);
12 void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, int flag);
13 void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, int flag);
14 void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t iova);
15 dma_addr_t (*map_single)(struct device *dev, void *addr, size_t size, enum dma_data_direction direction);
16 void (*unmap_single)(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction direction);
17 int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction);
18 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nhwents, enum dma_data_direction direction);
19 void (*dma_sync_single_for_cpu)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
20 void (*dma_sync_single_for_device)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
21 void (*dma_sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
22 void (*dma_sync_sg_for_device)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
23};
24
25/*
26** We could live without the hppa_dma_ops indirection if we didn't want
27** to support 4 different coherent dma models with one binary (they will
28** someday be loadable modules):
29** I/O MMU consistent method dma_sync behavior
30** ============= ====================== =======================
31** a) PA-7x00LC uncachable host memory flush/purge
32** b) U2/Uturn cachable host memory NOP
33** c) Ike/Astro cachable host memory NOP
34** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel
35**
36** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
37**
38** Systems (eg PCX-T workstations) that don't fall into the above
39** categories will need to modify the needed drivers to perform
40** flush/purge and allocate "regular" cacheable pages for everything.
41*/
42
43#ifdef CONFIG_PA11
44extern struct hppa_dma_ops pcxl_dma_ops;
45extern struct hppa_dma_ops pcx_dma_ops;
46#endif
47
48extern struct hppa_dma_ops *hppa_dma_ops;
49
50static inline void *
51dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
52 int flag)
53{
54 return hppa_dma_ops->alloc_consistent(dev, size, dma_handle, flag);
55}
56
57static inline void *
58dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
59 int flag)
60{
61 return hppa_dma_ops->alloc_noncoherent(dev, size, dma_handle, flag);
62}
63
64static inline void
65dma_free_coherent(struct device *dev, size_t size,
66 void *vaddr, dma_addr_t dma_handle)
67{
68 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
69}
70
71static inline void
72dma_free_noncoherent(struct device *dev, size_t size,
73 void *vaddr, dma_addr_t dma_handle)
74{
75 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
76}
77
78static inline dma_addr_t
79dma_map_single(struct device *dev, void *ptr, size_t size,
80 enum dma_data_direction direction)
81{
82 return hppa_dma_ops->map_single(dev, ptr, size, direction);
83}
84
85static inline void
86dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
87 enum dma_data_direction direction)
88{
89 hppa_dma_ops->unmap_single(dev, dma_addr, size, direction);
90}
91
92static inline int
93dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
94 enum dma_data_direction direction)
95{
96 return hppa_dma_ops->map_sg(dev, sg, nents, direction);
97}
98
99static inline void
100dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
101 enum dma_data_direction direction)
102{
103 hppa_dma_ops->unmap_sg(dev, sg, nhwentries, direction);
104}
105
106static inline dma_addr_t
107dma_map_page(struct device *dev, struct page *page, unsigned long offset,
108 size_t size, enum dma_data_direction direction)
109{
110 return dma_map_single(dev, (page_address(page) + (offset)), size, direction);
111}
112
113static inline void
114dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
115 enum dma_data_direction direction)
116{
117 dma_unmap_single(dev, dma_address, size, direction);
118}
119
120
121static inline void
122dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
123 enum dma_data_direction direction)
124{
125 if(hppa_dma_ops->dma_sync_single_for_cpu)
126 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, 0, size, direction);
127}
128
129static inline void
130dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
131 enum dma_data_direction direction)
132{
133 if(hppa_dma_ops->dma_sync_single_for_device)
134 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, 0, size, direction);
135}
136
137static inline void
138dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
139 unsigned long offset, size_t size,
140 enum dma_data_direction direction)
141{
142 if(hppa_dma_ops->dma_sync_single_for_cpu)
143 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, offset, size, direction);
144}
145
146static inline void
147dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
148 unsigned long offset, size_t size,
149 enum dma_data_direction direction)
150{
151 if(hppa_dma_ops->dma_sync_single_for_device)
152 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, offset, size, direction);
153}
154
155static inline void
156dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
157 enum dma_data_direction direction)
158{
159 if(hppa_dma_ops->dma_sync_sg_for_cpu)
160 hppa_dma_ops->dma_sync_sg_for_cpu(dev, sg, nelems, direction);
161}
162
163static inline void
164dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
165 enum dma_data_direction direction)
166{
167 if(hppa_dma_ops->dma_sync_sg_for_device)
168 hppa_dma_ops->dma_sync_sg_for_device(dev, sg, nelems, direction);
169}
170
171static inline int
172dma_supported(struct device *dev, u64 mask)
173{
174 return hppa_dma_ops->dma_supported(dev, mask);
175}
176
177static inline int
178dma_set_mask(struct device *dev, u64 mask)
179{
180 if(!dev->dma_mask || !dma_supported(dev, mask))
181 return -EIO;
182
183 *dev->dma_mask = mask;
184
185 return 0;
186}
187
188static inline int
189dma_get_cache_alignment(void)
190{
191 return dcache_stride;
192}
193
194static inline int
195dma_is_consistent(dma_addr_t dma_addr)
196{
197 return (hppa_dma_ops->dma_sync_single_for_cpu == NULL);
198}
199
200static inline void
201dma_cache_sync(void *vaddr, size_t size,
202 enum dma_data_direction direction)
203{
204 if(hppa_dma_ops->dma_sync_single_for_cpu)
205 flush_kernel_dcache_range((unsigned long)vaddr, size);
206}
207
208static inline void *
209parisc_walk_tree(struct device *dev)
210{
211 struct device *otherdev;
212 if(likely(dev->platform_data != NULL))
213 return dev->platform_data;
214 /* OK, just traverse the bus to find it */
215 for(otherdev = dev->parent; otherdev;
216 otherdev = otherdev->parent) {
217 if(otherdev->platform_data) {
218 dev->platform_data = otherdev->platform_data;
219 break;
220 }
221 }
222 BUG_ON(!dev->platform_data);
223 return dev->platform_data;
224}
225
226#define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu);
227
228
229#ifdef CONFIG_IOMMU_CCIO
230struct parisc_device;
231struct ioc;
232void * ccio_get_iommu(const struct parisc_device *dev);
233int ccio_request_resource(const struct parisc_device *dev,
234 struct resource *res);
235int ccio_allocate_resource(const struct parisc_device *dev,
236 struct resource *res, unsigned long size,
237 unsigned long min, unsigned long max, unsigned long align);
238#else /* !CONFIG_IOMMU_CCIO */
239#define ccio_get_iommu(dev) NULL
240#define ccio_request_resource(dev, res) request_resource(&iomem_resource, res)
241#define ccio_allocate_resource(dev, res, size, min, max, align) \
242 allocate_resource(&iomem_resource, res, size, min, max, \
243 align, NULL, NULL)
244#endif /* !CONFIG_IOMMU_CCIO */
245
246#ifdef CONFIG_IOMMU_SBA
247struct parisc_device;
248void * sba_get_iommu(struct parisc_device *dev);
249#endif
250
251/* At the moment, we panic on error for IOMMU resource exaustion */
252#define dma_mapping_error(x) 0
253
254#endif
diff --git a/include/asm-parisc/dma.h b/include/asm-parisc/dma.h
new file mode 100644
index 000000000000..31fd10df43a7
--- /dev/null
+++ b/include/asm-parisc/dma.h
@@ -0,0 +1,192 @@
1/* $Id: dma.h,v 1.2 1999/04/27 00:46:18 deller Exp $
2 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992.
6 * (c) Copyright 2000, Grant Grundler
7 */
8
9#ifndef _ASM_DMA_H
10#define _ASM_DMA_H
11
12#include <linux/config.h>
13#include <asm/io.h> /* need byte IO */
14#include <asm/system.h>
15
16#define dma_outb outb
17#define dma_inb inb
18
19/*
20** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
21** (or rather not merge) DMA's into managable chunks.
22** On parisc, this is more of the software/tuning constraint
23** rather than the HW. I/O MMU allocation alogorithms can be
24** faster with smaller size is (to some degree).
25*/
26#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE)
27
28/* The maximum address that we can perform a DMA transfer to on this platform
29** New dynamic DMA interfaces should obsolete this....
30*/
31#define MAX_DMA_ADDRESS (~0UL)
32
33/*
34** We don't have DMA channels... well V-class does but the
35** Dynamic DMA Mapping interface will support them... right? :^)
36** Note: this is not relevant right now for PA-RISC, but we cannot
37** leave this as undefined because some things (e.g. sound)
38** won't compile :-(
39*/
40#define MAX_DMA_CHANNELS 8
41#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
42#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
43#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
44
45#define DMA_AUTOINIT 0x10
46
47/* 8237 DMA controllers */
48#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
49#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
50
51/* DMA controller registers */
52#define DMA1_CMD_REG 0x08 /* command register (w) */
53#define DMA1_STAT_REG 0x08 /* status register (r) */
54#define DMA1_REQ_REG 0x09 /* request register (w) */
55#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
56#define DMA1_MODE_REG 0x0B /* mode register (w) */
57#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
58#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
59#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
60#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
61#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
62#define DMA1_EXT_MODE_REG (0x400 | DMA1_MODE_REG)
63
64#define DMA2_CMD_REG 0xD0 /* command register (w) */
65#define DMA2_STAT_REG 0xD0 /* status register (r) */
66#define DMA2_REQ_REG 0xD2 /* request register (w) */
67#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
68#define DMA2_MODE_REG 0xD6 /* mode register (w) */
69#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
70#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
71#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
72#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
73#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
74#define DMA2_EXT_MODE_REG (0x400 | DMA2_MODE_REG)
75
76extern spinlock_t dma_spin_lock;
77
78static __inline__ unsigned long claim_dma_lock(void)
79{
80 unsigned long flags;
81 spin_lock_irqsave(&dma_spin_lock, flags);
82 return flags;
83}
84
85static __inline__ void release_dma_lock(unsigned long flags)
86{
87 spin_unlock_irqrestore(&dma_spin_lock, flags);
88}
89
90
91/* Get DMA residue count. After a DMA transfer, this
92 * should return zero. Reading this while a DMA transfer is
93 * still in progress will return unpredictable results.
94 * If called before the channel has been used, it may return 1.
95 * Otherwise, it returns the number of _bytes_ left to transfer.
96 *
97 * Assumes DMA flip-flop is clear.
98 */
99static __inline__ int get_dma_residue(unsigned int dmanr)
100{
101 unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
102 : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
103
104 /* using short to get 16-bit wrap around */
105 unsigned short count;
106
107 count = 1 + dma_inb(io_port);
108 count += dma_inb(io_port) << 8;
109
110 return (dmanr<=3)? count : (count<<1);
111}
112
113/* enable/disable a specific DMA channel */
114static __inline__ void enable_dma(unsigned int dmanr)
115{
116#ifdef CONFIG_SUPERIO
117 if (dmanr<=3)
118 dma_outb(dmanr, DMA1_MASK_REG);
119 else
120 dma_outb(dmanr & 3, DMA2_MASK_REG);
121#endif
122}
123
124static __inline__ void disable_dma(unsigned int dmanr)
125{
126#ifdef CONFIG_SUPERIO
127 if (dmanr<=3)
128 dma_outb(dmanr | 4, DMA1_MASK_REG);
129 else
130 dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
131#endif
132}
133
134/* reserve a DMA channel */
135#define request_dma(dmanr, device_id) (0)
136
137/* Clear the 'DMA Pointer Flip Flop'.
138 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
139 * Use this once to initialize the FF to a known state.
140 * After that, keep track of it. :-)
141 * --- In order to do that, the DMA routines below should ---
142 * --- only be used while holding the DMA lock ! ---
143 */
144static __inline__ void clear_dma_ff(unsigned int dmanr)
145{
146}
147
148/* set mode (above) for a specific DMA channel */
149static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
150{
151}
152
153/* Set only the page register bits of the transfer address.
154 * This is used for successive transfers when we know the contents of
155 * the lower 16 bits of the DMA current address register, but a 64k boundary
156 * may have been crossed.
157 */
158static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
159{
160}
161
162
163/* Set transfer address & page bits for specific DMA channel.
164 * Assumes dma flipflop is clear.
165 */
166static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
167{
168}
169
170
171/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
172 * a specific DMA channel.
173 * You must ensure the parameters are valid.
174 * NOTE: from a manual: "the number of transfers is one more
175 * than the initial word count"! This is taken into account.
176 * Assumes dma flip-flop is clear.
177 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
178 */
179static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
180{
181}
182
183
184#define free_dma(dmanr)
185
186#ifdef CONFIG_PCI
187extern int isa_dma_bridge_buggy;
188#else
189#define isa_dma_bridge_buggy (0)
190#endif
191
192#endif /* _ASM_DMA_H */
diff --git a/include/asm-parisc/eisa_bus.h b/include/asm-parisc/eisa_bus.h
new file mode 100644
index 000000000000..201085f83dd5
--- /dev/null
+++ b/include/asm-parisc/eisa_bus.h
@@ -0,0 +1,23 @@
1/*
2 * eisa_bus.h interface between the eisa BA driver and the bus enumerator
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Copyright (c) 2002 Daniel Engstrom <5116@telia.com>
10 *
11 */
12
13#ifndef ASM_EISA_H
14#define ASM_EISA_H
15
16extern void eisa_make_irq_level(int num);
17extern void eisa_make_irq_edge(int num);
18extern int eisa_enumerator(unsigned long eeprom_addr,
19 struct resource *io_parent,
20 struct resource *mem_parent);
21extern int eisa_eeprom_init(unsigned long addr);
22
23#endif
diff --git a/include/asm-parisc/eisa_eeprom.h b/include/asm-parisc/eisa_eeprom.h
new file mode 100644
index 000000000000..9c9da980402a
--- /dev/null
+++ b/include/asm-parisc/eisa_eeprom.h
@@ -0,0 +1,153 @@
1/*
2 * eisa_eeprom.h - provide support for EISA adapters in PA-RISC machines
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Copyright (c) 2001, 2002 Daniel Engstrom <5116@telia.com>
10 *
11 */
12
13#ifndef ASM_EISA_EEPROM_H
14#define ASM_EISA_EEPROM_H
15
16extern void __iomem *eisa_eeprom_addr;
17
18#define HPEE_MAX_LENGTH 0x2000 /* maximum eeprom length */
19
20#define HPEE_SLOT_INFO(slot) (20+(48*slot))
21
22struct eeprom_header
23{
24
25 u_int32_t num_writes; /* number of writes */
26 u_int8_t flags; /* flags, usage? */
27 u_int8_t ver_maj;
28 u_int8_t ver_min;
29 u_int8_t num_slots; /* number of EISA slots in system */
30 u_int16_t csum; /* checksum, I don't know how to calulate this */
31 u_int8_t pad[10];
32} __attribute__ ((packed));
33
34
35struct eeprom_eisa_slot_info
36{
37 u_int32_t eisa_slot_id;
38 u_int32_t config_data_offset;
39 u_int32_t num_writes;
40 u_int16_t csum;
41 u_int16_t num_functions;
42 u_int16_t config_data_length;
43
44 /* bits 0..3 are the duplicate slot id */
45#define HPEE_SLOT_INFO_EMBEDDED 0x10
46#define HPEE_SLOT_INFO_VIRTUAL 0x20
47#define HPEE_SLOT_INFO_NO_READID 0x40
48#define HPEE_SLOT_INFO_DUPLICATE 0x80
49 u_int8_t slot_info;
50
51#define HPEE_SLOT_FEATURES_ENABLE 0x01
52#define HPEE_SLOT_FEATURES_IOCHK 0x02
53#define HPEE_SLOT_FEATURES_CFG_INCOMPLETE 0x80
54 u_int8_t slot_features;
55
56 u_int8_t ver_min;
57 u_int8_t ver_maj;
58
59#define HPEE_FUNCTION_INFO_HAVE_TYPE 0x01
60#define HPEE_FUNCTION_INFO_HAVE_MEMORY 0x02
61#define HPEE_FUNCTION_INFO_HAVE_IRQ 0x04
62#define HPEE_FUNCTION_INFO_HAVE_DMA 0x08
63#define HPEE_FUNCTION_INFO_HAVE_PORT 0x10
64#define HPEE_FUNCTION_INFO_HAVE_PORT_INIT 0x20
65/* I think there are two slighty different
66 * versions of the function_info field
67 * one int the fixed header and one optional
68 * in the parsed slot data area */
69#define HPEE_FUNCTION_INFO_HAVE_FUNCTION 0x01
70#define HPEE_FUNCTION_INFO_F_DISABLED 0x80
71#define HPEE_FUNCTION_INFO_CFG_FREE_FORM 0x40
72 u_int8_t function_info;
73
74#define HPEE_FLAG_BOARD_IS_ISA 0x01 /* flag and minor version for isa board */
75 u_int8_t flags;
76 u_int8_t pad[24];
77} __attribute__ ((packed));
78
79
80#define HPEE_MEMORY_MAX_ENT 9
81/* memory descriptor: byte 0 */
82#define HPEE_MEMORY_WRITABLE 0x01
83#define HPEE_MEMORY_CACHABLE 0x02
84#define HPEE_MEMORY_TYPE_MASK 0x18
85#define HPEE_MEMORY_TYPE_SYS 0x00
86#define HPEE_MEMORY_TYPE_EXP 0x08
87#define HPEE_MEMORY_TYPE_VIR 0x10
88#define HPEE_MEMORY_TYPE_OTH 0x18
89#define HPEE_MEMORY_SHARED 0x20
90#define HPEE_MEMORY_MORE 0x80
91
92/* memory descriptor: byte 1 */
93#define HPEE_MEMORY_WIDTH_MASK 0x03
94#define HPEE_MEMORY_WIDTH_BYTE 0x00
95#define HPEE_MEMORY_WIDTH_WORD 0x01
96#define HPEE_MEMORY_WIDTH_DWORD 0x02
97#define HPEE_MEMORY_DECODE_MASK 0x0c
98#define HPEE_MEMORY_DECODE_20BITS 0x00
99#define HPEE_MEMORY_DECODE_24BITS 0x04
100#define HPEE_MEMORY_DECODE_32BITS 0x08
101/* byte 2 and 3 are a 16bit LE value
102 * containging the memory size in kilobytes */
103/* byte 4,5,6 are a 24bit LE value
104 * containing the memory base address */
105
106
107#define HPEE_IRQ_MAX_ENT 7
108/* Interrupt entry: byte 0 */
109#define HPEE_IRQ_CHANNEL_MASK 0xf
110#define HPEE_IRQ_TRIG_LEVEL 0x20
111#define HPEE_IRQ_MORE 0x80
112/* byte 1 seems to be unused */
113
114#define HPEE_DMA_MAX_ENT 4
115
116/* dma entry: byte 0 */
117#define HPEE_DMA_CHANNEL_MASK 7
118#define HPEE_DMA_SIZE_MASK 0xc
119#define HPEE_DMA_SIZE_BYTE 0x0
120#define HPEE_DMA_SIZE_WORD 0x4
121#define HPEE_DMA_SIZE_DWORD 0x8
122#define HPEE_DMA_SHARED 0x40
123#define HPEE_DMA_MORE 0x80
124
125/* dma entry: byte 1 */
126#define HPEE_DMA_TIMING_MASK 0x30
127#define HPEE_DMA_TIMING_ISA 0x0
128#define HPEE_DMA_TIMING_TYPEA 0x10
129#define HPEE_DMA_TIMING_TYPEB 0x20
130#define HPEE_DMA_TIMING_TYPEC 0x30
131
132#define HPEE_PORT_MAX_ENT 20
133/* port entry byte 0 */
134#define HPEE_PORT_SIZE_MASK 0x1f
135#define HPEE_PORT_SHARED 0x40
136#define HPEE_PORT_MORE 0x80
137/* byte 1 and 2 is a 16bit LE value
138 * conating the start port number */
139
140#define HPEE_PORT_INIT_MAX_LEN 60 /* in bytes here */
141/* port init entry byte 0 */
142#define HPEE_PORT_INIT_WIDTH_MASK 0x3
143#define HPEE_PORT_INIT_WIDTH_BYTE 0x0
144#define HPEE_PORT_INIT_WIDTH_WORD 0x1
145#define HPEE_PORT_INIT_WIDTH_DWORD 0x2
146#define HPEE_PORT_INIT_MASK 0x4
147#define HPEE_PORT_INIT_MORE 0x80
148
149#define HPEE_SELECTION_MAX_ENT 26
150
151#define HPEE_TYPE_MAX_LEN 80
152
153#endif
diff --git a/include/asm-parisc/elf.h b/include/asm-parisc/elf.h
new file mode 100644
index 000000000000..adea65fc43c9
--- /dev/null
+++ b/include/asm-parisc/elf.h
@@ -0,0 +1,347 @@
1#ifndef __ASMPARISC_ELF_H
2#define __ASMPARISC_ELF_H
3
4/*
5 * ELF register definitions..
6 */
7
8#include <asm/ptrace.h>
9
10#define EM_PARISC 15
11
12/* HPPA specific definitions. */
13
14/* Legal values for e_flags field of Elf32_Ehdr. */
15
16#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
17#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
18#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
19#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
20#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
21 prediction. */
22#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
23#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
24
25/* Defined values for `e_flags & EF_PARISC_ARCH' are: */
26
27#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
28#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
29#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
30
31/* Additional section indeces. */
32
33#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
34 symbols in ANSI C. */
35#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */
36
37/* Legal values for sh_type field of Elf32_Shdr. */
38
39#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */
40#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */
41#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */
42
43/* Legal values for sh_flags field of Elf32_Shdr. */
44
45#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */
46#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */
47#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */
48
49/* Legal values for ST_TYPE subfield of st_info (symbol type). */
50
51#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */
52
53#define STT_HP_OPAQUE (STT_LOOS + 0x1)
54#define STT_HP_STUB (STT_LOOS + 0x2)
55
56/* HPPA relocs. */
57
58#define R_PARISC_NONE 0 /* No reloc. */
59#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
60#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
61#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
62#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
63#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
64#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
65#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
66#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
67#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
68#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
69#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
70#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
71#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
72#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
73#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
74#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
75#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */
76#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */
77#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */
78#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */
79#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
80#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
81#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
82#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
83#define R_PARISC_FPTR64 64 /* 64 bits function address. */
84#define R_PARISC_PLABEL32 65 /* 32 bits function address. */
85#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
86#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
87#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
88#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
89#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
90#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
91#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
92#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
93#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
94#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */
95#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */
96#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */
97#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */
98#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
99#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
100#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
101#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
102#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
103#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
104#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
105#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
106#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
107#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
108#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
109#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
110#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
111#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
112#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
113#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
114#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
115#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
116#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
117#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
118#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
119#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
120#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
121#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
122#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
123#define R_PARISC_LORESERVE 128
124#define R_PARISC_COPY 128 /* Copy relocation. */
125#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
126#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
127#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
128#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
129#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
130#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
131#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
132#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
133#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
134#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
135#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
136#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
137#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
138#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
139#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
140#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
141#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
142#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
143#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
144#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
145#define R_PARISC_HIRESERVE 255
146
147#define PA_PLABEL_FDESC 0x02 /* bit set if PLABEL points to
148 * a function descriptor, not
149 * an address */
150
151/* The following are PA function descriptors
152 *
153 * addr: the absolute address of the function
154 * gp: either the data pointer (r27) for non-PIC code or the
155 * the PLT pointer (r19) for PIC code */
156
157/* Format for the Elf32 Function descriptor */
158typedef struct elf32_fdesc {
159 __u32 addr;
160 __u32 gp;
161} Elf32_Fdesc;
162
163/* Format for the Elf64 Function descriptor */
164typedef struct elf64_fdesc {
165 __u64 dummy[2]; /* FIXME: nothing uses these, why waste
166 * the space */
167 __u64 addr;
168 __u64 gp;
169} Elf64_Fdesc;
170
171/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
172
173#define PT_HP_TLS (PT_LOOS + 0x0)
174#define PT_HP_CORE_NONE (PT_LOOS + 0x1)
175#define PT_HP_CORE_VERSION (PT_LOOS + 0x2)
176#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
177#define PT_HP_CORE_COMM (PT_LOOS + 0x4)
178#define PT_HP_CORE_PROC (PT_LOOS + 0x5)
179#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6)
180#define PT_HP_CORE_STACK (PT_LOOS + 0x7)
181#define PT_HP_CORE_SHM (PT_LOOS + 0x8)
182#define PT_HP_CORE_MMF (PT_LOOS + 0x9)
183#define PT_HP_PARALLEL (PT_LOOS + 0x10)
184#define PT_HP_FASTBIND (PT_LOOS + 0x11)
185#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12)
186#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13)
187#define PT_HP_STACK (PT_LOOS + 0x14)
188
189#define PT_PARISC_ARCHEXT 0x70000000
190#define PT_PARISC_UNWIND 0x70000001
191
192/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
193
194#define PF_PARISC_SBP 0x08000000
195
196#define PF_HP_PAGE_SIZE 0x00100000
197#define PF_HP_FAR_SHARED 0x00200000
198#define PF_HP_NEAR_SHARED 0x00400000
199#define PF_HP_CODE 0x01000000
200#define PF_HP_MODIFY 0x02000000
201#define PF_HP_LAZYSWAP 0x04000000
202#define PF_HP_SBP 0x08000000
203
204/*
205 * The following definitions are those for 32-bit ELF binaries on a 32-bit
206 * kernel and for 64-bit binaries on a 64-bit kernel. To run 32-bit binaries
207 * on a 64-bit kernel, arch/parisc64/kernel/binfmt_elf32.c defines these
208 * macros appropriately and then #includes binfmt_elf.c, which then includes
209 * this file.
210 */
211#ifndef ELF_CLASS
212
213/*
214 * This is used to ensure we don't load something for the wrong architecture.
215 *
216 * Note that this header file is used by default in fs/binfmt_elf.c. So
217 * the following macros are for the default case. However, for the 64
218 * bit kernel we also support 32 bit parisc binaries. To do that
219 * arch/parisc64/kernel/binfmt_elf32.c defines its own set of these
220 * macros, and then it includes fs/binfmt_elf.c to provide an alternate
221 * elf binary handler for 32 bit binaries (on the 64 bit kernel).
222 */
223#ifdef __LP64__
224#define ELF_CLASS ELFCLASS64
225#else
226#define ELF_CLASS ELFCLASS32
227#endif
228
229typedef unsigned long elf_greg_t;
230
231/* This yields a string that ld.so will use to load implementation
232 specific libraries for optimization. This is more specific in
233 intent than poking at uname or /proc/cpuinfo.
234
235 For the moment, we have only optimizations for the Intel generations,
236 but that could change... */
237
238#define ELF_PLATFORM ("PARISC\0" /*+((boot_cpu_data.x86-3)*5) */)
239
240#ifdef __KERNEL__
241#define SET_PERSONALITY(ex, ibcs2) \
242 current->personality = PER_LINUX; \
243 current->thread.map_base = DEFAULT_MAP_BASE; \
244 current->thread.task_size = DEFAULT_TASK_SIZE \
245
246#endif
247
248/*
249 * Fill in general registers in a core dump. This saves pretty
250 * much the same registers as hp-ux, although in a different order.
251 * Registers marked # below are not currently saved in pt_regs, so
252 * we use their current values here.
253 *
254 * gr0..gr31
255 * sr0..sr7
256 * iaoq0..iaoq1
257 * iasq0..iasq1
258 * cr11 (sar)
259 * cr19 (iir)
260 * cr20 (isr)
261 * cr21 (ior)
262 * # cr22 (ipsw)
263 * # cr0 (recovery counter)
264 * # cr24..cr31 (temporary registers)
265 * # cr8,9,12,13 (protection IDs)
266 * # cr10 (scr/ccr)
267 * # cr15 (ext int enable mask)
268 *
269 */
270
271#define ELF_CORE_COPY_REGS(dst, pt) \
272 memset(dst, 0, sizeof(dst)); /* don't leak any "random" bits */ \
273 memcpy(dst + 0, pt->gr, 32 * sizeof(elf_greg_t)); \
274 memcpy(dst + 32, pt->sr, 8 * sizeof(elf_greg_t)); \
275 memcpy(dst + 40, pt->iaoq, 2 * sizeof(elf_greg_t)); \
276 memcpy(dst + 42, pt->iasq, 2 * sizeof(elf_greg_t)); \
277 dst[44] = pt->sar; dst[45] = pt->iir; \
278 dst[46] = pt->isr; dst[47] = pt->ior; \
279 dst[48] = mfctl(22); dst[49] = mfctl(0); \
280 dst[50] = mfctl(24); dst[51] = mfctl(25); \
281 dst[52] = mfctl(26); dst[53] = mfctl(27); \
282 dst[54] = mfctl(28); dst[55] = mfctl(29); \
283 dst[56] = mfctl(30); dst[57] = mfctl(31); \
284 dst[58] = mfctl( 8); dst[59] = mfctl( 9); \
285 dst[60] = mfctl(12); dst[61] = mfctl(13); \
286 dst[62] = mfctl(10); dst[63] = mfctl(15);
287
288#endif /* ! ELF_CLASS */
289
290#define ELF_NGREG 80 /* We only need 64 at present, but leave space
291 for expansion. */
292typedef elf_greg_t elf_gregset_t[ELF_NGREG];
293
294#define ELF_NFPREG 32
295typedef double elf_fpreg_t;
296typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
297
298struct task_struct;
299
300extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *);
301#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
302
303struct pt_regs; /* forward declaration... */
304
305
306#define elf_check_arch(x) ((x)->e_machine == EM_PARISC && (x)->e_ident[EI_CLASS] == ELF_CLASS)
307
308/*
309 * These are used to set parameters in the core dumps.
310 */
311#define ELF_DATA ELFDATA2MSB
312#define ELF_ARCH EM_PARISC
313#define ELF_OSABI ELFOSABI_LINUX
314
315/* %r23 is set by ld.so to a pointer to a function which might be
316 registered using atexit. This provides a mean for the dynamic
317 linker to call DT_FINI functions for shared libraries that have
318 been loaded before the code runs.
319
320 So that we can use the same startup file with static executables,
321 we start programs with a value of 0 to indicate that there is no
322 such function. */
323#define ELF_PLAT_INIT(_r, load_addr) _r->gr[23] = 0
324
325#define USE_ELF_CORE_DUMP
326#define ELF_EXEC_PAGESIZE 4096
327
328/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
329 use of this is to invoke "./ld.so someprog" to test out a new version of
330 the loader. We need to make sure that it is out of the way of the program
331 that it will "exec", and that there is sufficient room for the brk.
332
333 (2 * TASK_SIZE / 3) turns into something undefined when run through a
334 32 bit preprocessor and in some cases results in the kernel trying to map
335 ld.so to the kernel virtual base. Use a sane value instead. /Jes
336 */
337
338#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE + 0x01000000)
339
340/* This yields a mask that user programs can use to figure out what
341 instruction set this CPU supports. This could be done in user space,
342 but it's not easy, and we've already done it here. */
343
344#define ELF_HWCAP 0
345/* (boot_cpu_data.x86_capability) */
346
347#endif
diff --git a/include/asm-parisc/errno.h b/include/asm-parisc/errno.h
new file mode 100644
index 000000000000..a10f109770f1
--- /dev/null
+++ b/include/asm-parisc/errno.h
@@ -0,0 +1,119 @@
1#ifndef _PARISC_ERRNO_H
2#define _PARISC_ERRNO_H
3
4#include <asm-generic/errno-base.h>
5
6#define ENOMSG 35 /* No message of desired type */
7#define EIDRM 36 /* Identifier removed */
8#define ECHRNG 37 /* Channel number out of range */
9#define EL2NSYNC 38 /* Level 2 not synchronized */
10#define EL3HLT 39 /* Level 3 halted */
11#define EL3RST 40 /* Level 3 reset */
12#define ELNRNG 41 /* Link number out of range */
13#define EUNATCH 42 /* Protocol driver not attached */
14#define ENOCSI 43 /* No CSI structure available */
15#define EL2HLT 44 /* Level 2 halted */
16#define EDEADLK 45 /* Resource deadlock would occur */
17#define EDEADLOCK EDEADLK
18#define ENOLCK 46 /* No record locks available */
19#define EILSEQ 47 /* Illegal byte sequence */
20
21#define ENONET 50 /* Machine is not on the network */
22#define ENODATA 51 /* No data available */
23#define ETIME 52 /* Timer expired */
24#define ENOSR 53 /* Out of streams resources */
25#define ENOSTR 54 /* Device not a stream */
26#define ENOPKG 55 /* Package not installed */
27
28#define ENOLINK 57 /* Link has been severed */
29#define EADV 58 /* Advertise error */
30#define ESRMNT 59 /* Srmount error */
31#define ECOMM 60 /* Communication error on send */
32#define EPROTO 61 /* Protocol error */
33
34#define EMULTIHOP 64 /* Multihop attempted */
35
36#define EDOTDOT 66 /* RFS specific error */
37#define EBADMSG 67 /* Not a data message */
38#define EUSERS 68 /* Too many users */
39#define EDQUOT 69 /* Quota exceeded */
40#define ESTALE 70 /* Stale NFS file handle */
41#define EREMOTE 71 /* Object is remote */
42#define EOVERFLOW 72 /* Value too large for defined data type */
43
44/* these errnos are defined by Linux but not HPUX. */
45
46#define EBADE 160 /* Invalid exchange */
47#define EBADR 161 /* Invalid request descriptor */
48#define EXFULL 162 /* Exchange full */
49#define ENOANO 163 /* No anode */
50#define EBADRQC 164 /* Invalid request code */
51#define EBADSLT 165 /* Invalid slot */
52#define EBFONT 166 /* Bad font file format */
53#define ENOTUNIQ 167 /* Name not unique on network */
54#define EBADFD 168 /* File descriptor in bad state */
55#define EREMCHG 169 /* Remote address changed */
56#define ELIBACC 170 /* Can not access a needed shared library */
57#define ELIBBAD 171 /* Accessing a corrupted shared library */
58#define ELIBSCN 172 /* .lib section in a.out corrupted */
59#define ELIBMAX 173 /* Attempting to link in too many shared libraries */
60#define ELIBEXEC 174 /* Cannot exec a shared library directly */
61#define ERESTART 175 /* Interrupted system call should be restarted */
62#define ESTRPIPE 176 /* Streams pipe error */
63#define EUCLEAN 177 /* Structure needs cleaning */
64#define ENOTNAM 178 /* Not a XENIX named type file */
65#define ENAVAIL 179 /* No XENIX semaphores available */
66#define EISNAM 180 /* Is a named type file */
67#define EREMOTEIO 181 /* Remote I/O error */
68#define ENOMEDIUM 182 /* No medium found */
69#define EMEDIUMTYPE 183 /* Wrong medium type */
70#define ENOKEY 184 /* Required key not available */
71#define EKEYEXPIRED 185 /* Key has expired */
72#define EKEYREVOKED 186 /* Key has been revoked */
73#define EKEYREJECTED 187 /* Key was rejected by service */
74
75/* We now return you to your regularly scheduled HPUX. */
76
77#define ENOSYM 215 /* symbol does not exist in executable */
78#define ENOTSOCK 216 /* Socket operation on non-socket */
79#define EDESTADDRREQ 217 /* Destination address required */
80#define EMSGSIZE 218 /* Message too long */
81#define EPROTOTYPE 219 /* Protocol wrong type for socket */
82#define ENOPROTOOPT 220 /* Protocol not available */
83#define EPROTONOSUPPORT 221 /* Protocol not supported */
84#define ESOCKTNOSUPPORT 222 /* Socket type not supported */
85#define EOPNOTSUPP 223 /* Operation not supported on transport endpoint */
86#define EPFNOSUPPORT 224 /* Protocol family not supported */
87#define EAFNOSUPPORT 225 /* Address family not supported by protocol */
88#define EADDRINUSE 226 /* Address already in use */
89#define EADDRNOTAVAIL 227 /* Cannot assign requested address */
90#define ENETDOWN 228 /* Network is down */
91#define ENETUNREACH 229 /* Network is unreachable */
92#define ENETRESET 230 /* Network dropped connection because of reset */
93#define ECONNABORTED 231 /* Software caused connection abort */
94#define ECONNRESET 232 /* Connection reset by peer */
95#define ENOBUFS 233 /* No buffer space available */
96#define EISCONN 234 /* Transport endpoint is already connected */
97#define ENOTCONN 235 /* Transport endpoint is not connected */
98#define ESHUTDOWN 236 /* Cannot send after transport endpoint shutdown */
99#define ETOOMANYREFS 237 /* Too many references: cannot splice */
100#define EREFUSED ECONNREFUSED /* for HP's NFS apparently */
101#define ETIMEDOUT 238 /* Connection timed out */
102#define ECONNREFUSED 239 /* Connection refused */
103#define EREMOTERELEASE 240 /* Remote peer released connection */
104#define EHOSTDOWN 241 /* Host is down */
105#define EHOSTUNREACH 242 /* No route to host */
106
107#define EALREADY 244 /* Operation already in progress */
108#define EINPROGRESS 245 /* Operation now in progress */
109#define EWOULDBLOCK 246 /* Operation would block (Linux returns EAGAIN) */
110#define ENOTEMPTY 247 /* Directory not empty */
111#define ENAMETOOLONG 248 /* File name too long */
112#define ELOOP 249 /* Too many symbolic links encountered */
113#define ENOSYS 251 /* Function not implemented */
114
115#define ENOTSUP 252 /* Function not implemented (POSIX.4 / HPUX) */
116#define ECANCELLED 253 /* aio request was canceled before complete (POSIX.4 / HPUX) */
117
118
119#endif
diff --git a/include/asm-parisc/fcntl.h b/include/asm-parisc/fcntl.h
new file mode 100644
index 000000000000..def35230716a
--- /dev/null
+++ b/include/asm-parisc/fcntl.h
@@ -0,0 +1,92 @@
1#ifndef _PARISC_FCNTL_H
2#define _PARISC_FCNTL_H
3
4/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
5 located on an ext2 file system */
6#define O_ACCMODE 00000003
7#define O_RDONLY 00000000
8#define O_WRONLY 00000001
9#define O_RDWR 00000002
10#define O_APPEND 00000010
11#define O_BLKSEEK 00000100 /* HPUX only */
12#define O_CREAT 00000400 /* not fcntl */
13#define O_TRUNC 00001000 /* not fcntl */
14#define O_EXCL 00002000 /* not fcntl */
15#define O_LARGEFILE 00004000
16#define O_SYNC 00100000
17#define O_NONBLOCK 00200004 /* HPUX has separate NDELAY & NONBLOCK */
18#define O_NDELAY O_NONBLOCK
19#define O_NOCTTY 00400000 /* not fcntl */
20#define O_DSYNC 01000000 /* HPUX only */
21#define O_RSYNC 02000000 /* HPUX only */
22#define O_NOATIME 04000000
23
24#define FASYNC 00020000 /* fcntl, for BSD compatibility */
25#define O_DIRECT 00040000 /* direct disk access hint - currently ignored */
26#define O_DIRECTORY 00010000 /* must be a directory */
27#define O_NOFOLLOW 00000200 /* don't follow links */
28#define O_INVISIBLE 04000000 /* invisible I/O, for DMAPI/XDSM */
29
30#define F_DUPFD 0 /* dup */
31#define F_GETFD 1 /* get f_flags */
32#define F_SETFD 2 /* set f_flags */
33#define F_GETFL 3 /* more flags (cloexec) */
34#define F_SETFL 4
35#define F_GETLK 5
36#define F_SETLK 6
37#define F_SETLKW 7
38#define F_GETLK64 8
39#define F_SETLK64 9
40#define F_SETLKW64 10
41
42#define F_GETOWN 11 /* for sockets. */
43#define F_SETOWN 12 /* for sockets. */
44#define F_SETSIG 13 /* for sockets. */
45#define F_GETSIG 14 /* for sockets. */
46
47/* for F_[GET|SET]FL */
48#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
49
50/* for posix fcntl() and lockf() */
51#define F_RDLCK 01
52#define F_WRLCK 02
53#define F_UNLCK 03
54
55/* for old implementation of bsd flock () */
56#define F_EXLCK 4 /* or 3 */
57#define F_SHLCK 8 /* or 4 */
58
59/* for leases */
60#define F_INPROGRESS 16
61
62/* operations for bsd flock(), also used by the kernel implementation */
63#define LOCK_SH 1 /* shared lock */
64#define LOCK_EX 2 /* exclusive lock */
65#define LOCK_NB 4 /* or'd with one of the above to prevent
66 blocking */
67#define LOCK_UN 8 /* remove lock */
68
69#define LOCK_MAND 32 /* This is a mandatory flock */
70#define LOCK_READ 64 /* ... Which allows concurrent read operations */
71#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
72#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
73
74struct flock {
75 short l_type;
76 short l_whence;
77 off_t l_start;
78 off_t l_len;
79 pid_t l_pid;
80};
81
82struct flock64 {
83 short l_type;
84 short l_whence;
85 loff_t l_start;
86 loff_t l_len;
87 pid_t l_pid;
88};
89
90#define F_LINUX_SPECIFIC_BASE 1024
91
92#endif
diff --git a/include/asm-parisc/fixmap.h b/include/asm-parisc/fixmap.h
new file mode 100644
index 000000000000..a5caf4b122b7
--- /dev/null
+++ b/include/asm-parisc/fixmap.h
@@ -0,0 +1,23 @@
1#ifndef _ASM_FIXMAP_H
2#define _ASM_FIXMAP_H
3
4/*
5 * This file defines the locations of the fixed mappings on parisc.
6 *
7 * All of the values in this file are machine virtual addresses.
8 *
9 * All of the values in this file must be <4GB (because of assembly
10 * loading restrictions). If you place this region anywhere above
11 * __PAGE_OFFSET, you must adjust the memory map accordingly */
12
13/* The alias region is used in kernel space to do copy/clear to or
14 * from areas congruently mapped with user space. It is 8MB large
15 * and must be 16MB aligned */
16#define TMPALIAS_MAP_START ((__PAGE_OFFSET) - 16*1024*1024)
17/* This is the kernel area for all maps (vmalloc, dma etc.) most
18 * usually, it extends up to TMPALIAS_MAP_START. Virtual addresses
19 * 0..GATEWAY_PAGE_SIZE are reserved for the gateway page */
20#define KERNEL_MAP_START (GATEWAY_PAGE_SIZE)
21#define KERNEL_MAP_END (TMPALIAS_MAP_START)
22
23#endif
diff --git a/include/asm-parisc/floppy.h b/include/asm-parisc/floppy.h
new file mode 100644
index 000000000000..47f53df2cef5
--- /dev/null
+++ b/include/asm-parisc/floppy.h
@@ -0,0 +1,277 @@
1/* Architecture specific parts of the Floppy driver
2 *
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
4 * Copyright (C) 2000 Matthew Wilcox (willy a debian . org)
5 * Copyright (C) 2000 Dave Kennedy
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_PARISC_FLOPPY_H
22#define __ASM_PARISC_FLOPPY_H
23
24#include <linux/vmalloc.h>
25
26
27/*
28 * The DMA channel used by the floppy controller cannot access data at
29 * addresses >= 16MB
30 *
31 * Went back to the 1MB limit, as some people had problems with the floppy
32 * driver otherwise. It doesn't matter much for performance anyway, as most
33 * floppy accesses go through the track buffer.
34 */
35#define _CROSS_64KB(a,s,vdma) \
36(!vdma && ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64))
37
38#define CROSS_64KB(a,s) _CROSS_64KB(a,s,use_virtual_dma & 1)
39
40
41#define SW fd_routine[use_virtual_dma&1]
42#define CSW fd_routine[can_use_virtual_dma & 1]
43
44
45#define fd_inb(port) readb(port)
46#define fd_outb(value, port) writeb(value, port)
47
48#define fd_request_dma() CSW._request_dma(FLOPPY_DMA,"floppy")
49#define fd_free_dma() CSW._free_dma(FLOPPY_DMA)
50#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
51#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
52#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
53#define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
54#define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
55#define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
56
57#define FLOPPY_CAN_FALLBACK_ON_NODMA
58
59static int virtual_dma_count=0;
60static int virtual_dma_residue=0;
61static char *virtual_dma_addr=0;
62static int virtual_dma_mode=0;
63static int doing_pdma=0;
64
65static void floppy_hardint(int irq, void *dev_id, struct pt_regs * regs)
66{
67 register unsigned char st;
68
69#undef TRACE_FLPY_INT
70
71#ifdef TRACE_FLPY_INT
72 static int calls=0;
73 static int bytes=0;
74 static int dma_wait=0;
75#endif
76 if (!doing_pdma) {
77 floppy_interrupt(irq, dev_id, regs);
78 return;
79 }
80
81#ifdef TRACE_FLPY_INT
82 if(!calls)
83 bytes = virtual_dma_count;
84#endif
85
86 {
87 register int lcount;
88 register char *lptr = virtual_dma_addr;
89
90 for (lcount = virtual_dma_count; lcount; lcount--) {
91 st = fd_inb(virtual_dma_port+4) & 0xa0 ;
92 if (st != 0xa0)
93 break;
94 if (virtual_dma_mode) {
95 fd_outb(*lptr, virtual_dma_port+5);
96 } else {
97 *lptr = fd_inb(virtual_dma_port+5);
98 }
99 lptr++;
100 }
101 virtual_dma_count = lcount;
102 virtual_dma_addr = lptr;
103 st = fd_inb(virtual_dma_port+4);
104 }
105
106#ifdef TRACE_FLPY_INT
107 calls++;
108#endif
109 if (st == 0x20)
110 return;
111 if (!(st & 0x20)) {
112 virtual_dma_residue += virtual_dma_count;
113 virtual_dma_count = 0;
114#ifdef TRACE_FLPY_INT
115 printk("count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n",
116 virtual_dma_count, virtual_dma_residue, calls, bytes,
117 dma_wait);
118 calls = 0;
119 dma_wait=0;
120#endif
121 doing_pdma = 0;
122 floppy_interrupt(irq, dev_id, regs);
123 return;
124 }
125#ifdef TRACE_FLPY_INT
126 if (!virtual_dma_count)
127 dma_wait++;
128#endif
129}
130
131static void fd_disable_dma(void)
132{
133 if(! (can_use_virtual_dma & 1))
134 disable_dma(FLOPPY_DMA);
135 doing_pdma = 0;
136 virtual_dma_residue += virtual_dma_count;
137 virtual_dma_count=0;
138}
139
140static int vdma_request_dma(unsigned int dmanr, const char * device_id)
141{
142 return 0;
143}
144
145static void vdma_nop(unsigned int dummy)
146{
147}
148
149
150static int vdma_get_dma_residue(unsigned int dummy)
151{
152 return virtual_dma_count + virtual_dma_residue;
153}
154
155
156static int fd_request_irq(void)
157{
158 if(can_use_virtual_dma)
159 return request_irq(FLOPPY_IRQ, floppy_hardint,SA_INTERRUPT,
160 "floppy", NULL);
161 else
162 return request_irq(FLOPPY_IRQ, floppy_interrupt,
163 SA_INTERRUPT|SA_SAMPLE_RANDOM,
164 "floppy", NULL);
165
166}
167
168static unsigned long dma_mem_alloc(unsigned long size)
169{
170 return __get_dma_pages(GFP_KERNEL, get_order(size));
171}
172
173
174static unsigned long vdma_mem_alloc(unsigned long size)
175{
176 return (unsigned long) vmalloc(size);
177
178}
179
180#define nodma_mem_alloc(size) vdma_mem_alloc(size)
181
182static void _fd_dma_mem_free(unsigned long addr, unsigned long size)
183{
184 if((unsigned int) addr >= (unsigned int) high_memory)
185 return vfree((void *)addr);
186 else
187 free_pages(addr, get_order(size));
188}
189
190#define fd_dma_mem_free(addr, size) _fd_dma_mem_free(addr, size)
191
192static void _fd_chose_dma_mode(char *addr, unsigned long size)
193{
194 if(can_use_virtual_dma == 2) {
195 if((unsigned int) addr >= (unsigned int) high_memory ||
196 virt_to_bus(addr) >= 0x1000000 ||
197 _CROSS_64KB(addr, size, 0))
198 use_virtual_dma = 1;
199 else
200 use_virtual_dma = 0;
201 } else {
202 use_virtual_dma = can_use_virtual_dma & 1;
203 }
204}
205
206#define fd_chose_dma_mode(addr, size) _fd_chose_dma_mode(addr, size)
207
208
209static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
210{
211 doing_pdma = 1;
212 virtual_dma_port = io;
213 virtual_dma_mode = (mode == DMA_MODE_WRITE);
214 virtual_dma_addr = addr;
215 virtual_dma_count = size;
216 virtual_dma_residue = 0;
217 return 0;
218}
219
220static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
221{
222#ifdef FLOPPY_SANITY_CHECK
223 if (CROSS_64KB(addr, size)) {
224 printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size);
225 return -1;
226 }
227#endif
228 /* actual, physical DMA */
229 doing_pdma = 0;
230 clear_dma_ff(FLOPPY_DMA);
231 set_dma_mode(FLOPPY_DMA,mode);
232 set_dma_addr(FLOPPY_DMA,virt_to_bus(addr));
233 set_dma_count(FLOPPY_DMA,size);
234 enable_dma(FLOPPY_DMA);
235 return 0;
236}
237
238struct fd_routine_l {
239 int (*_request_dma)(unsigned int dmanr, const char * device_id);
240 void (*_free_dma)(unsigned int dmanr);
241 int (*_get_dma_residue)(unsigned int dummy);
242 unsigned long (*_dma_mem_alloc) (unsigned long size);
243 int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
244} fd_routine[] = {
245 {
246 request_dma,
247 free_dma,
248 get_dma_residue,
249 dma_mem_alloc,
250 hard_dma_setup
251 },
252 {
253 vdma_request_dma,
254 vdma_nop,
255 vdma_get_dma_residue,
256 vdma_mem_alloc,
257 vdma_dma_setup
258 }
259};
260
261
262static int FDC1 = 0x3f0; /* Lies. Floppy controller is memory mapped, not io mapped */
263static int FDC2 = -1;
264
265#define FLOPPY0_TYPE 0
266#define FLOPPY1_TYPE 0
267
268#define N_FDC 1
269#define N_DRIVE 8
270
271#define FLOPPY_MOTOR_MASK 0xf0
272
273#define AUTO_DMA
274
275#define EXTRA_FLOPPY_PARAMS
276
277#endif /* __ASM_PARISC_FLOPPY_H */
diff --git a/include/asm-parisc/grfioctl.h b/include/asm-parisc/grfioctl.h
new file mode 100644
index 000000000000..d3cfc0168fb1
--- /dev/null
+++ b/include/asm-parisc/grfioctl.h
@@ -0,0 +1,111 @@
1/* Architecture specific parts of HP's STI (framebuffer) driver.
2 * Structures are HP-UX compatible for XFree86 usage.
3 *
4 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Copyright (C) 2001 Helge Deller (deller a parisc-linux org)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __ASM_PARISC_GRFIOCTL_H
23#define __ASM_PARISC_GRFIOCTL_H
24
25/* upper 32 bits of graphics id (HP/UX identifier) */
26
27#define GRFGATOR 8
28#define S9000_ID_S300 9
29#define GRFBOBCAT 9
30#define GRFCATSEYE 9
31#define S9000_ID_98720 10
32#define GRFRBOX 10
33#define S9000_ID_98550 11
34#define GRFFIREEYE 11
35#define S9000_ID_A1096A 12
36#define GRFHYPERION 12
37#define S9000_ID_FRI 13
38#define S9000_ID_98730 14
39#define GRFDAVINCI 14
40#define S9000_ID_98705 0x26C08070 /* Tigershark */
41#define S9000_ID_98736 0x26D148AB
42#define S9000_ID_A1659A 0x26D1482A /* CRX 8 plane color (=ELK) */
43#define S9000_ID_ELK S9000_ID_A1659A
44#define S9000_ID_A1439A 0x26D148EE /* CRX24 = CRX+ (24-plane color) */
45#define S9000_ID_A1924A 0x26D1488C /* GRX gray-scale */
46#define S9000_ID_ELM S9000_ID_A1924A
47#define S9000_ID_98765 0x27480DEF
48#define S9000_ID_ELK_768 0x27482101
49#define S9000_ID_STINGER 0x27A4A402
50#define S9000_ID_TIMBER 0x27F12392 /* Bushmaster (710) Graphics */
51#define S9000_ID_TOMCAT 0x27FCCB6D /* dual-headed ELK (Dual CRX) */
52#define S9000_ID_ARTIST 0x2B4DED6D /* Artist (Gecko/712 & 715) onboard Graphics */
53#define S9000_ID_HCRX 0x2BCB015A /* Hyperdrive/Hyperbowl (A4071A) Graphics */
54#define CRX24_OVERLAY_PLANES 0x920825AA /* Overlay planes on CRX24 */
55
56#define CRT_ID_ELK_1024 S9000_ID_ELK_768 /* Elk 1024x768 CRX */
57#define CRT_ID_ELK_1280 S9000_ID_A1659A /* Elk 1280x1024 CRX */
58#define CRT_ID_ELK_1024DB 0x27849CA5 /* Elk 1024x768 double buffer */
59#define CRT_ID_ELK_GS S9000_ID_A1924A /* Elk 1280x1024 GreyScale */
60#define CRT_ID_CRX24 S9000_ID_A1439A /* Piranha */
61#define CRT_ID_VISUALIZE_EG 0x2D08C0A7 /* Graffiti (built-in B132+/B160L) */
62#define CRT_ID_THUNDER 0x2F23E5FC /* Thunder 1 VISUALIZE 48*/
63#define CRT_ID_THUNDER2 0x2F8D570E /* Thunder 2 VISUALIZE 48 XP*/
64#define CRT_ID_HCRX S9000_ID_HCRX /* Hyperdrive HCRX */
65#define CRT_ID_CRX48Z S9000_ID_STINGER /* Stinger */
66#define CRT_ID_DUAL_CRX S9000_ID_TOMCAT /* Tomcat */
67#define CRT_ID_PVRX S9000_ID_98705 /* Tigershark */
68#define CRT_ID_TIMBER S9000_ID_TIMBER /* Timber (710 builtin) */
69#define CRT_ID_TVRX S9000_ID_98765 /* TVRX (gto/falcon) */
70#define CRT_ID_ARTIST S9000_ID_ARTIST /* Artist */
71#define CRT_ID_SUMMIT 0x2FC1066B /* Summit FX2, FX4, FX6 ... */
72
73/* structure for ioctl(GCDESCRIBE) */
74
75#define gaddr_t unsigned long /* FIXME: PA2.0 (64bit) portable ? */
76
77struct grf_fbinfo {
78 unsigned int id; /* upper 32 bits of graphics id */
79 unsigned int mapsize; /* mapped size of framebuffer */
80 unsigned int dwidth, dlength;/* x and y sizes */
81 unsigned int width, length; /* total x and total y size */
82 unsigned int xlen; /* x pitch size */
83 unsigned int bpp, bppu; /* bits per pixel and used bpp */
84 unsigned int npl, nplbytes; /* # of planes and bytes per plane */
85 char name[32]; /* name of the device (from ROM) */
86 unsigned int attr; /* attributes */
87 gaddr_t fbbase, regbase;/* framebuffer and register base addr */
88 gaddr_t regions[6]; /* region bases */
89};
90
91#define GCID _IOR('G', 0, int)
92#define GCON _IO('G', 1)
93#define GCOFF _IO('G', 2)
94#define GCAON _IO('G', 3)
95#define GCAOFF _IO('G', 4)
96#define GCMAP _IOWR('G', 5, int)
97#define GCUNMAP _IOWR('G', 6, int)
98#define GCMAP_HPUX _IO('G', 5)
99#define GCUNMAP_HPUX _IO('G', 6)
100#define GCLOCK _IO('G', 7)
101#define GCUNLOCK _IO('G', 8)
102#define GCLOCK_MINIMUM _IO('G', 9)
103#define GCUNLOCK_MINIMUM _IO('G', 10)
104#define GCSTATIC_CMAP _IO('G', 11)
105#define GCVARIABLE_CMAP _IO('G', 12)
106#define GCTERM _IOWR('G',20,int) /* multi-headed Tomcat */
107#define GCDESCRIBE _IOR('G', 21, struct grf_fbinfo)
108#define GCFASTLOCK _IO('G', 26)
109
110#endif /* __ASM_PARISC_GRFIOCTL_H */
111
diff --git a/include/asm-parisc/hardirq.h b/include/asm-parisc/hardirq.h
new file mode 100644
index 000000000000..ce93133d5112
--- /dev/null
+++ b/include/asm-parisc/hardirq.h
@@ -0,0 +1,29 @@
1/* hardirq.h: PA-RISC hard IRQ support.
2 *
3 * Copyright (C) 2001 Matthew Wilcox <matthew@wil.cx>
4 *
5 * The locking is really quite interesting. There's a cpu-local
6 * count of how many interrupts are being handled, and a global
7 * lock. An interrupt can only be serviced if the global lock
8 * is free. You can't be sure no more interrupts are being
9 * serviced until you've acquired the lock and then checked
10 * all the per-cpu interrupt counts are all zero. It's a specialised
11 * br_lock, and that's exactly how Sparc does it. We don't because
12 * it's more locking for us. This way is lock-free in the interrupt path.
13 */
14
15#ifndef _PARISC_HARDIRQ_H
16#define _PARISC_HARDIRQ_H
17
18#include <linux/threads.h>
19#include <linux/irq.h>
20
21typedef struct {
22 unsigned long __softirq_pending; /* set_bit is used on this */
23} ____cacheline_aligned irq_cpustat_t;
24
25#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
26
27void ack_bad_irq(unsigned int irq);
28
29#endif /* _PARISC_HARDIRQ_H */
diff --git a/include/asm-parisc/hardware.h b/include/asm-parisc/hardware.h
new file mode 100644
index 000000000000..106d3f7cd882
--- /dev/null
+++ b/include/asm-parisc/hardware.h
@@ -0,0 +1,132 @@
1#ifndef _PARISC_HARDWARE_H
2#define _PARISC_HARDWARE_H
3
4#include <asm/pdc.h>
5
6struct parisc_device_id {
7 unsigned char hw_type; /* 5 bits used */
8 unsigned char hversion_rev; /* 4 bits */
9 unsigned short hversion; /* 12 bits */
10 unsigned int sversion; /* 20 bits */
11};
12
13#define HWTYPE_ANY_ID 0xff
14#define HVERSION_REV_ANY_ID 0xff
15#define HVERSION_ANY_ID 0xffff
16#define SVERSION_ANY_ID 0xffffffffU
17
18struct hp_hardware {
19 unsigned short hw_type:5; /* HPHW_xxx */
20 unsigned short hversion;
21 unsigned long sversion:28;
22 unsigned short opt;
23 const char name[80]; /* The hardware description */
24};
25
26struct parisc_device;
27
28enum cpu_type {
29 pcx = 0, /* pa7000 pa 1.0 */
30 pcxs = 1, /* pa7000 pa 1.1a */
31 pcxt = 2, /* pa7100 pa 1.1b */
32 pcxt_ = 3, /* pa7200 (t') pa 1.1c */
33 pcxl = 4, /* pa7100lc pa 1.1d */
34 pcxl2 = 5, /* pa7300lc pa 1.1e */
35 pcxu = 6, /* pa8000 pa 2.0 */
36 pcxu_ = 7, /* pa8200 (u+) pa 2.0 */
37 pcxw = 8, /* pa8500 pa 2.0 */
38 pcxw_ = 9, /* pa8600 (w+) pa 2.0 */
39 pcxw2 = 10, /* pa8700 pa 2.0 */
40 mako = 11 /* pa8800 pa 2.0 */
41};
42
43extern char *cpu_name_version[][2]; /* mapping from enum cpu_type to strings */
44
45struct parisc_driver;
46
47struct io_module {
48 volatile uint32_t nothing; /* reg 0 */
49 volatile uint32_t io_eim;
50 volatile uint32_t io_dc_adata;
51 volatile uint32_t io_ii_cdata;
52 volatile uint32_t io_dma_link; /* reg 4 */
53 volatile uint32_t io_dma_command;
54 volatile uint32_t io_dma_address;
55 volatile uint32_t io_dma_count;
56 volatile uint32_t io_flex; /* reg 8 */
57 volatile uint32_t io_spa_address;
58 volatile uint32_t reserved1[2];
59 volatile uint32_t io_command; /* reg 12 */
60 volatile uint32_t io_status;
61 volatile uint32_t io_control;
62 volatile uint32_t io_data;
63 volatile uint32_t reserved2; /* reg 16 */
64 volatile uint32_t chain_addr;
65 volatile uint32_t sub_mask_clr;
66 volatile uint32_t reserved3[13];
67 volatile uint32_t undefined[480];
68 volatile uint32_t unpriv[512];
69};
70
71struct bc_module {
72 volatile uint32_t unused1[12];
73 volatile uint32_t io_command;
74 volatile uint32_t io_status;
75 volatile uint32_t io_control;
76 volatile uint32_t unused2[1];
77 volatile uint32_t io_err_resp;
78 volatile uint32_t io_err_info;
79 volatile uint32_t io_err_req;
80 volatile uint32_t unused3[11];
81 volatile uint32_t io_io_low;
82 volatile uint32_t io_io_high;
83};
84
85#define HPHW_NPROC 0
86#define HPHW_MEMORY 1
87#define HPHW_B_DMA 2
88#define HPHW_OBSOLETE 3
89#define HPHW_A_DMA 4
90#define HPHW_A_DIRECT 5
91#define HPHW_OTHER 6
92#define HPHW_BCPORT 7
93#define HPHW_CIO 8
94#define HPHW_CONSOLE 9
95#define HPHW_FIO 10
96#define HPHW_BA 11
97#define HPHW_IOA 12
98#define HPHW_BRIDGE 13
99#define HPHW_FABRIC 14
100#define HPHW_MC 15
101#define HPHW_FAULTY 31
102
103
104/* hardware.c: */
105extern const char *parisc_hardware_description(struct parisc_device_id *id);
106extern enum cpu_type parisc_get_cpu_type(unsigned long hversion);
107
108struct pci_dev;
109
110/* drivers.c: */
111extern struct parisc_device *alloc_pa_dev(unsigned long hpa,
112 struct hardware_path *path);
113extern int register_parisc_device(struct parisc_device *dev);
114extern int register_parisc_driver(struct parisc_driver *driver);
115extern int count_parisc_driver(struct parisc_driver *driver);
116extern int unregister_parisc_driver(struct parisc_driver *driver);
117extern void walk_central_bus(void);
118extern const struct parisc_device *find_pa_parent_type(const struct parisc_device *, int);
119extern void print_parisc_devices(void);
120extern char *print_pa_hwpath(struct parisc_device *dev, char *path);
121extern char *print_pci_hwpath(struct pci_dev *dev, char *path);
122extern void get_pci_node_path(struct pci_dev *dev, struct hardware_path *path);
123extern void init_parisc_bus(void);
124extern struct device *hwpath_to_device(struct hardware_path *modpath);
125extern void device_to_hwpath(struct device *dev, struct hardware_path *path);
126
127
128/* inventory.c: */
129extern void do_memory_inventory(void);
130extern void do_device_inventory(void);
131
132#endif /* _PARISC_HARDWARE_H */
diff --git a/include/asm-parisc/hdreg.h b/include/asm-parisc/hdreg.h
new file mode 100644
index 000000000000..7f7fd1af0af3
--- /dev/null
+++ b/include/asm-parisc/hdreg.h
@@ -0,0 +1 @@
#include <asm-generic/hdreg.h>
diff --git a/include/asm-parisc/hw_irq.h b/include/asm-parisc/hw_irq.h
new file mode 100644
index 000000000000..151426e27521
--- /dev/null
+++ b/include/asm-parisc/hw_irq.h
@@ -0,0 +1,17 @@
1#ifndef _ASM_HW_IRQ_H
2#define _ASM_HW_IRQ_H
3
4/*
5 * linux/include/asm/hw_irq.h
6 *
7 * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
8 *
9 * moved some of the old arch/i386/kernel/irq.h to here. VY
10 *
11 * IRQ/IPI changes taken from work by Thomas Radke
12 * <tomsoft@informatik.tu-chemnitz.de>
13 */
14
15extern void hw_resend_irq(struct hw_interrupt_type *, unsigned int);
16
17#endif
diff --git a/include/asm-parisc/ide.h b/include/asm-parisc/ide.h
new file mode 100644
index 000000000000..3243cf2cd227
--- /dev/null
+++ b/include/asm-parisc/ide.h
@@ -0,0 +1,69 @@
1/*
2 * linux/include/asm-parisc/ide.h
3 *
4 * Copyright (C) 1994-1996 Linus Torvalds & authors
5 */
6
7/*
8 * This file contains the PARISC architecture specific IDE code.
9 */
10
11#ifndef __ASM_PARISC_IDE_H
12#define __ASM_PARISC_IDE_H
13
14#ifdef __KERNEL__
15
16#ifndef MAX_HWIFS
17#define MAX_HWIFS 2
18#endif
19
20#define IDE_ARCH_OBSOLETE_INIT
21#define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */
22
23#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id))
24#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id))
25#define ide_check_region(from,extent) check_region((from), (extent))
26#define ide_request_region(from,extent,name) request_region((from), (extent), (name))
27#define ide_release_region(from,extent) release_region((from), (extent))
28/* Generic I/O and MEMIO string operations. */
29
30#define __ide_insw insw
31#define __ide_insl insl
32#define __ide_outsw outsw
33#define __ide_outsl outsl
34
35static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
36{
37 while (count--) {
38 *(u16 *)addr = __raw_readw(port);
39 addr += 2;
40 }
41}
42
43static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
44{
45 while (count--) {
46 *(u32 *)addr = __raw_readl(port);
47 addr += 4;
48 }
49}
50
51static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
52{
53 while (count--) {
54 __raw_writew(*(u16 *)addr, port);
55 addr += 2;
56 }
57}
58
59static __inline__ void __ide_mm_outsl(void __iomem *port, void *addr, u32 count)
60{
61 while (count--) {
62 __raw_writel(*(u32 *)addr, port);
63 addr += 4;
64 }
65}
66
67#endif /* __KERNEL__ */
68
69#endif /* __ASM_PARISC_IDE_H */
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h
new file mode 100644
index 000000000000..b9bb5946ecc9
--- /dev/null
+++ b/include/asm-parisc/io.h
@@ -0,0 +1,418 @@
1#ifndef _ASM_IO_H
2#define _ASM_IO_H
3
4#include <linux/config.h>
5#include <linux/types.h>
6#include <asm/pgtable.h>
7
8extern unsigned long parisc_vmerge_boundary;
9extern unsigned long parisc_vmerge_max_size;
10
11#define BIO_VMERGE_BOUNDARY parisc_vmerge_boundary
12#define BIO_VMERGE_MAX_SIZE parisc_vmerge_max_size
13
14#define virt_to_phys(a) ((unsigned long)__pa(a))
15#define phys_to_virt(a) __va(a)
16#define virt_to_bus virt_to_phys
17#define bus_to_virt phys_to_virt
18
19/*
20 * Memory mapped I/O
21 *
22 * readX()/writeX() do byteswapping and take an ioremapped address
23 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
24 * gsc_*() don't byteswap and operate on physical addresses;
25 * eg dev->hpa or 0xfee00000.
26 */
27
28#ifdef CONFIG_DEBUG_IOREMAP
29#ifdef CONFIG_64BIT
30#define NYBBLE_SHIFT 60
31#else
32#define NYBBLE_SHIFT 28
33#endif
34extern void gsc_bad_addr(unsigned long addr);
35extern void __raw_bad_addr(const volatile void __iomem *addr);
36#define gsc_check_addr(addr) \
37 if ((addr >> NYBBLE_SHIFT) != 0xf) { \
38 gsc_bad_addr(addr); \
39 addr |= 0xfUL << NYBBLE_SHIFT; \
40 }
41#define __raw_check_addr(addr) \
42 if (((unsigned long)addr >> NYBBLE_SHIFT) != 0xe) \
43 __raw_bad_addr(addr); \
44 addr = (void *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT));
45#else
46#define gsc_check_addr(addr)
47#define __raw_check_addr(addr)
48#endif
49
50static inline unsigned char gsc_readb(unsigned long addr)
51{
52 long flags;
53 unsigned char ret;
54
55 gsc_check_addr(addr);
56
57 __asm__ __volatile__(
58 " rsm 2,%0\n"
59 " ldbx 0(%2),%1\n"
60 " mtsm %0\n"
61 : "=&r" (flags), "=r" (ret) : "r" (addr) );
62
63 return ret;
64}
65
66static inline unsigned short gsc_readw(unsigned long addr)
67{
68 long flags;
69 unsigned short ret;
70
71 gsc_check_addr(addr);
72
73 __asm__ __volatile__(
74 " rsm 2,%0\n"
75 " ldhx 0(%2),%1\n"
76 " mtsm %0\n"
77 : "=&r" (flags), "=r" (ret) : "r" (addr) );
78
79 return ret;
80}
81
82static inline unsigned int gsc_readl(unsigned long addr)
83{
84 u32 ret;
85
86 gsc_check_addr(addr);
87
88 __asm__ __volatile__(
89 " ldwax 0(%1),%0\n"
90 : "=r" (ret) : "r" (addr) );
91
92 return ret;
93}
94
95static inline unsigned long long gsc_readq(unsigned long addr)
96{
97 unsigned long long ret;
98 gsc_check_addr(addr);
99
100#ifdef __LP64__
101 __asm__ __volatile__(
102 " ldda 0(%1),%0\n"
103 : "=r" (ret) : "r" (addr) );
104#else
105 /* two reads may have side effects.. */
106 ret = ((u64) gsc_readl(addr)) << 32;
107 ret |= gsc_readl(addr+4);
108#endif
109 return ret;
110}
111
112static inline void gsc_writeb(unsigned char val, unsigned long addr)
113{
114 long flags;
115 gsc_check_addr(addr);
116
117 __asm__ __volatile__(
118 " rsm 2,%0\n"
119 " stbs %1,0(%2)\n"
120 " mtsm %0\n"
121 : "=&r" (flags) : "r" (val), "r" (addr) );
122}
123
124static inline void gsc_writew(unsigned short val, unsigned long addr)
125{
126 long flags;
127 gsc_check_addr(addr);
128
129 __asm__ __volatile__(
130 " rsm 2,%0\n"
131 " sths %1,0(%2)\n"
132 " mtsm %0\n"
133 : "=&r" (flags) : "r" (val), "r" (addr) );
134}
135
136static inline void gsc_writel(unsigned int val, unsigned long addr)
137{
138 gsc_check_addr(addr);
139
140 __asm__ __volatile__(
141 " stwas %0,0(%1)\n"
142 : : "r" (val), "r" (addr) );
143}
144
145static inline void gsc_writeq(unsigned long long val, unsigned long addr)
146{
147 gsc_check_addr(addr);
148
149#ifdef __LP64__
150 __asm__ __volatile__(
151 " stda %0,0(%1)\n"
152 : : "r" (val), "r" (addr) );
153#else
154 /* two writes may have side effects.. */
155 gsc_writel(val >> 32, addr);
156 gsc_writel(val, addr+4);
157#endif
158}
159
160/*
161 * The standard PCI ioremap interfaces
162 */
163
164extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
165
166extern inline void __iomem * ioremap(unsigned long offset, unsigned long size)
167{
168 return __ioremap(offset, size, 0);
169}
170
171/*
172 * This one maps high address device memory and turns off caching for that area.
173 * it's useful if some control registers are in such an area and write combining
174 * or read caching is not desirable:
175 */
176extern inline void * ioremap_nocache(unsigned long offset, unsigned long size)
177{
178 return __ioremap(offset, size, _PAGE_NO_CACHE /* _PAGE_PCD */);
179}
180
181extern void iounmap(void __iomem *addr);
182
183/*
184 * USE_HPPA_IOREMAP is the magic flag to enable or disable real ioremap()
185 * functionality. It's currently disabled because it may not work on some
186 * machines.
187 */
188#define USE_HPPA_IOREMAP 0
189
190#if USE_HPPA_IOREMAP
191static inline unsigned char __raw_readb(const volatile void __iomem *addr)
192{
193 return (*(volatile unsigned char __force *) (addr));
194}
195static inline unsigned short __raw_readw(const volatile void __iomem *addr)
196{
197 return *(volatile unsigned short __force *) addr;
198}
199static inline unsigned int __raw_readl(const volatile void __iomem *addr)
200{
201 return *(volatile unsigned int __force *) addr;
202}
203static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
204{
205 return *(volatile unsigned long long __force *) addr;
206}
207
208static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
209{
210 *(volatile unsigned char __force *) addr = b;
211}
212static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
213{
214 *(volatile unsigned short __force *) addr = b;
215}
216static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
217{
218 *(volatile unsigned int __force *) addr = b;
219}
220static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
221{
222 *(volatile unsigned long long __force *) addr = b;
223}
224#else /* !USE_HPPA_IOREMAP */
225static inline unsigned char __raw_readb(const volatile void __iomem *addr)
226{
227 __raw_check_addr(addr);
228
229 return gsc_readb((unsigned long) addr);
230}
231static inline unsigned short __raw_readw(const volatile void __iomem *addr)
232{
233 __raw_check_addr(addr);
234
235 return gsc_readw((unsigned long) addr);
236}
237static inline unsigned int __raw_readl(const volatile void __iomem *addr)
238{
239 __raw_check_addr(addr);
240
241 return gsc_readl((unsigned long) addr);
242}
243static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
244{
245 __raw_check_addr(addr);
246
247 return gsc_readq((unsigned long) addr);
248}
249
250static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
251{
252 __raw_check_addr(addr);
253
254 gsc_writeb(b, (unsigned long) addr);
255}
256static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
257{
258 __raw_check_addr(addr);
259
260 gsc_writew(b, (unsigned long) addr);
261}
262static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
263{
264 __raw_check_addr(addr);
265
266 gsc_writel(b, (unsigned long) addr);
267}
268static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
269{
270 __raw_check_addr(addr);
271
272 gsc_writeq(b, (unsigned long) addr);
273}
274#endif /* !USE_HPPA_IOREMAP */
275
276/* readb can never be const, so use __fswab instead of le*_to_cpu */
277#define readb(addr) __raw_readb(addr)
278#define readw(addr) __fswab16(__raw_readw(addr))
279#define readl(addr) __fswab32(__raw_readl(addr))
280#define readq(addr) __fswab64(__raw_readq(addr))
281#define writeb(b, addr) __raw_writeb(b, addr)
282#define writew(b, addr) __raw_writew(cpu_to_le16(b), addr)
283#define writel(b, addr) __raw_writel(cpu_to_le32(b), addr)
284#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
285
286#define readb_relaxed(addr) readb(addr)
287#define readw_relaxed(addr) readw(addr)
288#define readl_relaxed(addr) readl(addr)
289#define readq_relaxed(addr) readq(addr)
290
291#define mmiowb() do { } while (0)
292
293void memset_io(volatile void __iomem *addr, unsigned char val, int count);
294void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
295void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
296
297/* Support old drivers which don't ioremap.
298 * NB this interface is scheduled to disappear in 2.5
299 */
300
301#define __isa_addr(x) (void __iomem *)(F_EXTEND(0xfc000000) | (x))
302#define isa_readb(a) readb(__isa_addr(a))
303#define isa_readw(a) readw(__isa_addr(a))
304#define isa_readl(a) readl(__isa_addr(a))
305#define isa_writeb(b,a) writeb((b), __isa_addr(a))
306#define isa_writew(b,a) writew((b), __isa_addr(a))
307#define isa_writel(b,a) writel((b), __isa_addr(a))
308#define isa_memset_io(a,b,c) memset_io(__isa_addr(a), (b), (c))
309#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a), __isa_addr(b), (c))
310#define isa_memcpy_toio(a,b,c) memcpy_toio(__isa_addr(a), (b), (c))
311
312
313/*
314 * XXX - We don't have csum_partial_copy_fromio() yet, so we cheat here and
315 * just copy it. The net code will then do the checksum later. Presently
316 * only used by some shared memory 8390 Ethernet cards anyway.
317 */
318
319#define eth_io_copy_and_sum(skb,src,len,unused) \
320 memcpy_fromio((skb)->data,(src),(len))
321#define isa_eth_io_copy_and_sum(skb,src,len,unused) \
322 isa_memcpy_fromio((skb)->data,(src),(len))
323
324/* Port-space IO */
325
326#define inb_p inb
327#define inw_p inw
328#define inl_p inl
329#define outb_p outb
330#define outw_p outw
331#define outl_p outl
332
333extern unsigned char eisa_in8(unsigned short port);
334extern unsigned short eisa_in16(unsigned short port);
335extern unsigned int eisa_in32(unsigned short port);
336extern void eisa_out8(unsigned char data, unsigned short port);
337extern void eisa_out16(unsigned short data, unsigned short port);
338extern void eisa_out32(unsigned int data, unsigned short port);
339
340#if defined(CONFIG_PCI)
341extern unsigned char inb(int addr);
342extern unsigned short inw(int addr);
343extern unsigned int inl(int addr);
344
345extern void outb(unsigned char b, int addr);
346extern void outw(unsigned short b, int addr);
347extern void outl(unsigned int b, int addr);
348#elif defined(CONFIG_EISA)
349#define inb eisa_in8
350#define inw eisa_in16
351#define inl eisa_in32
352#define outb eisa_out8
353#define outw eisa_out16
354#define outl eisa_out32
355#else
356static inline char inb(unsigned long addr)
357{
358 BUG();
359 return -1;
360}
361
362static inline short inw(unsigned long addr)
363{
364 BUG();
365 return -1;
366}
367
368static inline int inl(unsigned long addr)
369{
370 BUG();
371 return -1;
372}
373
374#define outb(x, y) BUG()
375#define outw(x, y) BUG()
376#define outl(x, y) BUG()
377#endif
378
379/*
380 * String versions of in/out ops:
381 */
382extern void insb (unsigned long port, void *dst, unsigned long count);
383extern void insw (unsigned long port, void *dst, unsigned long count);
384extern void insl (unsigned long port, void *dst, unsigned long count);
385extern void outsb (unsigned long port, const void *src, unsigned long count);
386extern void outsw (unsigned long port, const void *src, unsigned long count);
387extern void outsl (unsigned long port, const void *src, unsigned long count);
388
389
390/* IO Port space is : BBiiii where BB is HBA number. */
391#define IO_SPACE_LIMIT 0x00ffffff
392
393
394#define dma_cache_inv(_start,_size) do { flush_kernel_dcache_range(_start,_size); } while (0)
395#define dma_cache_wback(_start,_size) do { flush_kernel_dcache_range(_start,_size); } while (0)
396#define dma_cache_wback_inv(_start,_size) do { flush_kernel_dcache_range(_start,_size); } while (0)
397
398/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
399 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
400 * mode (essentially just sign extending. This macro takes in a 32
401 * bit I/O address (still with the leading f) and outputs the correct
402 * value for either 32 or 64 bit mode */
403#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
404
405#include <asm-generic/iomap.h>
406
407/*
408 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
409 * access
410 */
411#define xlate_dev_mem_ptr(p) __va(p)
412
413/*
414 * Convert a virtual cached pointer to an uncached pointer
415 */
416#define xlate_dev_kmem_ptr(p) p
417
418#endif
diff --git a/include/asm-parisc/ioctl.h b/include/asm-parisc/ioctl.h
new file mode 100644
index 000000000000..68338d2bda4e
--- /dev/null
+++ b/include/asm-parisc/ioctl.h
@@ -0,0 +1,93 @@
1/*
2 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
3 * Copyright (C) 1999,2003 Matthew Wilcox < willy at debian . org >
4 * portions from "linux/ioctl.h for Linux" by H.H. Bergman.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21
22#ifndef _ASM_PARISC_IOCTL_H
23#define _ASM_PARISC_IOCTL_H
24
25/* ioctl command encoding: 32 bits total, command in lower 16 bits,
26 * size of the parameter structure in the lower 14 bits of the
27 * upper 16 bits.
28 * Encoding the size of the parameter structure in the ioctl request
29 * is useful for catching programs compiled with old versions
30 * and to avoid overwriting user space outside the user buffer area.
31 * The highest 2 bits are reserved for indicating the ``access mode''.
32 * NOTE: This limits the max parameter size to 16kB -1 !
33 */
34
35#define _IOC_NRBITS 8
36#define _IOC_TYPEBITS 8
37#define _IOC_SIZEBITS 14
38#define _IOC_DIRBITS 2
39
40#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
41#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
42#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
43#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
44
45#define _IOC_NRSHIFT 0
46#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS)
47#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS)
48#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
49
50/*
51 * Direction bits.
52 */
53#define _IOC_NONE 0U
54#define _IOC_WRITE 2U
55#define _IOC_READ 1U
56
57#define _IOC(dir,type,nr,size) \
58 (((dir) << _IOC_DIRSHIFT) | \
59 ((type) << _IOC_TYPESHIFT) | \
60 ((nr) << _IOC_NRSHIFT) | \
61 ((size) << _IOC_SIZESHIFT))
62
63/* provoke compile error for invalid uses of size argument */
64extern unsigned int __invalid_size_argument_for_IOC;
65#define _IOC_TYPECHECK(t) \
66 ((sizeof(t) == sizeof(t[1]) && \
67 sizeof(t) < (1 << _IOC_SIZEBITS)) ? \
68 sizeof(t) : __invalid_size_argument_for_IOC)
69
70/* used to create numbers */
71#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
72#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size)))
73#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
74#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
75#define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
76#define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
77#define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
78
79/* used to decode ioctl numbers.. */
80#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
81#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
82#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
83#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
84
85/* ...and for the drivers/sound files... */
86
87#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT)
88#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT)
89#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
90#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT)
91#define IOCSIZE_SHIFT (_IOC_SIZESHIFT)
92
93#endif /* _ASM_PARISC_IOCTL_H */
diff --git a/include/asm-parisc/ioctls.h b/include/asm-parisc/ioctls.h
new file mode 100644
index 000000000000..ee84e4172c36
--- /dev/null
+++ b/include/asm-parisc/ioctls.h
@@ -0,0 +1,86 @@
1#ifndef __ARCH_PARISC_IOCTLS_H__
2#define __ARCH_PARISC_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS _IOR('T', 16, struct termios) /* TCGETATTR */
9#define TCSETS _IOW('T', 17, struct termios) /* TCSETATTR */
10#define TCSETSW _IOW('T', 18, struct termios) /* TCSETATTRD */
11#define TCSETSF _IOW('T', 19, struct termios) /* TCSETATTRF */
12#define TCGETA _IOR('T', 1, struct termio)
13#define TCSETA _IOW('T', 2, struct termio)
14#define TCSETAW _IOW('T', 3, struct termio)
15#define TCSETAF _IOW('T', 4, struct termio)
16#define TCSBRK _IO('T', 5)
17#define TCXONC _IO('T', 6)
18#define TCFLSH _IO('T', 7)
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP _IOR('T', 30, int)
23#define TIOCSPGRP _IOW('T', 29, int)
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCSBRK 0x5427 /* BSD compatibility */
47#define TIOCCBRK 0x5428 /* BSD compatibility */
48#define TIOCGSID _IOR('T', 20, int) /* Return the session ID of FD */
49#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
50#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
51
52#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
53#define FIOCLEX 0x5451
54#define FIOASYNC 0x5452
55#define TIOCSERCONFIG 0x5453
56#define TIOCSERGWILD 0x5454
57#define TIOCSERSWILD 0x5455
58#define TIOCGLCKTRMIOS 0x5456
59#define TIOCSLCKTRMIOS 0x5457
60#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
61#define TIOCSERGETLSR 0x5459 /* Get line status register */
62#define TIOCSERGETMULTI 0x545A /* Get multiport config */
63#define TIOCSERSETMULTI 0x545B /* Set multiport config */
64
65#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
66#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
67#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
68#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
69#define FIOQSIZE 0x5460 /* Get exact space used by quota */
70
71#define TIOCSTART 0x5461
72#define TIOCSTOP 0x5462
73#define TIOCSLTC 0x5462
74
75/* Used for packet mode */
76#define TIOCPKT_DATA 0
77#define TIOCPKT_FLUSHREAD 1
78#define TIOCPKT_FLUSHWRITE 2
79#define TIOCPKT_STOP 4
80#define TIOCPKT_START 8
81#define TIOCPKT_NOSTOP 16
82#define TIOCPKT_DOSTOP 32
83
84#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
85
86#endif /* _ASM_PARISC_IOCTLS_H */
diff --git a/include/asm-parisc/iosapic.h b/include/asm-parisc/iosapic.h
new file mode 100644
index 000000000000..613390e6805c
--- /dev/null
+++ b/include/asm-parisc/iosapic.h
@@ -0,0 +1,53 @@
1/*
2** This file is private to iosapic driver.
3** If stuff needs to be used by another driver, move it to a common file.
4**
5** WARNING: fields most data structures here are ordered to make sure
6** they pack nicely for 64-bit compilation. (ie sizeof(long) == 8)
7*/
8
9
10/*
11** I/O SAPIC init function
12** Caller knows where an I/O SAPIC is. LBA has an integrated I/O SAPIC.
13** Call setup as part of per instance initialization.
14** (ie *not* init_module() function unless only one is present.)
15** fixup_irq is to initialize PCI IRQ line support and
16** virtualize pcidev->irq value. To be called by pci_fixup_bus().
17*/
18extern void *iosapic_register(unsigned long hpa);
19extern int iosapic_fixup_irq(void *obj, struct pci_dev *pcidev);
20
21
22#ifdef __IA64__
23/*
24** PA: PIB (Processor Interrupt Block) is handled by Runway bus adapter.
25** and is hardcoded to 0xfeeNNNN0 where NNNN is id_eid field.
26**
27** IA64: PIB is handled by "Local SAPIC" (integrated in the processor).
28*/
29struct local_sapic_info {
30 struct local_sapic_info *lsi_next; /* point to next CPU info */
31 int *lsi_cpu_id; /* point to logical CPU id */
32 unsigned long *lsi_id_eid; /* point to IA-64 CPU id */
33 int *lsi_status; /* point to CPU status */
34 void *lsi_private; /* point to special info */
35};
36
37/*
38** "root" data structure which ties everything together.
39** Should always be able to start with sapic_root and locate
40** the desired information.
41*/
42struct sapic_info {
43 struct sapic_info *si_next; /* info is per cell */
44 int si_cellid; /* cell id */
45 unsigned int si_status; /* status */
46 char *si_pib_base; /* intr blk base address */
47 local_sapic_info_t *si_local_info;
48 io_sapic_info_t *si_io_info;
49 extint_info_t *si_extint_info;/* External Intr info */
50};
51
52#endif /* IA64 */
53
diff --git a/include/asm-parisc/ipcbuf.h b/include/asm-parisc/ipcbuf.h
new file mode 100644
index 000000000000..bd956c425785
--- /dev/null
+++ b/include/asm-parisc/ipcbuf.h
@@ -0,0 +1,27 @@
1#ifndef __PARISC_IPCBUF_H__
2#define __PARISC_IPCBUF_H__
3
4/*
5 * The ipc64_perm structure for PA-RISC is almost identical to
6 * kern_ipc_perm as we have always had 32-bit UIDs and GIDs in the kernel.
7 * 'seq' has been changed from long to int so that it's the same size
8 * on 64-bit kernels as on 32-bit ones.
9 */
10
11struct ipc64_perm
12{
13 key_t key;
14 uid_t uid;
15 gid_t gid;
16 uid_t cuid;
17 gid_t cgid;
18 unsigned short int __pad1;
19 mode_t mode;
20 unsigned short int __pad2;
21 unsigned short int seq;
22 unsigned int __pad3;
23 unsigned long long int __unused1;
24 unsigned long long int __unused2;
25};
26
27#endif /* __PARISC_IPCBUF_H__ */
diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h
new file mode 100644
index 000000000000..75654ba93353
--- /dev/null
+++ b/include/asm-parisc/irq.h
@@ -0,0 +1,55 @@
1/*
2 * include/asm-parisc/irq.h
3 *
4 * Copyright 2005 Matthew Wilcox <matthew@wil.cx>
5 */
6
7#ifndef _ASM_PARISC_IRQ_H
8#define _ASM_PARISC_IRQ_H
9
10#include <linux/config.h>
11#include <asm/types.h>
12
13#define NO_IRQ (-1)
14
15#ifdef CONFIG_GSC
16#define GSC_IRQ_BASE 16
17#define GSC_IRQ_MAX 63
18#define CPU_IRQ_BASE 64
19#else
20#define CPU_IRQ_BASE 16
21#endif
22
23#define TIMER_IRQ (CPU_IRQ_BASE + 0)
24#define IPI_IRQ (CPU_IRQ_BASE + 1)
25#define CPU_IRQ_MAX (CPU_IRQ_BASE + (BITS_PER_LONG - 1))
26
27#define NR_IRQS (CPU_IRQ_MAX + 1)
28
29static __inline__ int irq_canonicalize(int irq)
30{
31 return (irq == 2) ? 9 : irq;
32}
33
34struct hw_interrupt_type;
35
36/*
37 * Some useful "we don't have to do anything here" handlers. Should
38 * probably be provided by the generic code.
39 */
40void no_ack_irq(unsigned int irq);
41void no_end_irq(unsigned int irq);
42
43extern int txn_alloc_irq(unsigned int nbits);
44extern int txn_claim_irq(int);
45extern unsigned int txn_alloc_data(unsigned int);
46extern unsigned long txn_alloc_addr(unsigned int);
47
48extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
49
50extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
51
52/* soft power switch support (power.c) */
53extern struct tasklet_struct power_tasklet;
54
55#endif /* _ASM_PARISC_IRQ_H */
diff --git a/include/asm-parisc/kmap_types.h b/include/asm-parisc/kmap_types.h
new file mode 100644
index 000000000000..6886a0c3fedf
--- /dev/null
+++ b/include/asm-parisc/kmap_types.h
@@ -0,0 +1,31 @@
1#ifndef _ASM_KMAP_TYPES_H
2#define _ASM_KMAP_TYPES_H
3
4#include <linux/config.h>
5
6#ifdef CONFIG_DEBUG_HIGHMEM
7# define D(n) __KM_FENCE_##n ,
8#else
9# define D(n)
10#endif
11
12enum km_type {
13D(0) KM_BOUNCE_READ,
14D(1) KM_SKB_SUNRPC_DATA,
15D(2) KM_SKB_DATA_SOFTIRQ,
16D(3) KM_USER0,
17D(4) KM_USER1,
18D(5) KM_BIO_SRC_IRQ,
19D(6) KM_BIO_DST_IRQ,
20D(7) KM_PTE0,
21D(8) KM_PTE1,
22D(9) KM_IRQ0,
23D(10) KM_IRQ1,
24D(11) KM_SOFTIRQ0,
25D(12) KM_SOFTIRQ1,
26D(13) KM_TYPE_NR
27};
28
29#undef D
30
31#endif
diff --git a/include/asm-parisc/led.h b/include/asm-parisc/led.h
new file mode 100644
index 000000000000..1ac8ab6c580d
--- /dev/null
+++ b/include/asm-parisc/led.h
@@ -0,0 +1,45 @@
1#ifndef LED_H
2#define LED_H
3
4#define LED7 0x80 /* top (or furthest right) LED */
5#define LED6 0x40
6#define LED5 0x20
7#define LED4 0x10
8#define LED3 0x08
9#define LED2 0x04
10#define LED1 0x02
11#define LED0 0x01 /* bottom (or furthest left) LED */
12
13#define LED_LAN_TX LED0 /* for LAN transmit activity */
14#define LED_LAN_RCV LED1 /* for LAN receive activity */
15#define LED_DISK_IO LED2 /* for disk activity */
16#define LED_HEARTBEAT LED3 /* heartbeat */
17
18/* values for pdc_chassis_lcd_info_ret_block.model: */
19#define DISPLAY_MODEL_LCD 0 /* KittyHawk LED or LCD */
20#define DISPLAY_MODEL_NONE 1 /* no LED or LCD */
21#define DISPLAY_MODEL_LASI 2 /* LASI style 8 bit LED */
22#define DISPLAY_MODEL_OLD_ASP 0x7F /* faked: ASP style 8 x 1 bit LED (only very old ASP versions) */
23
24#define LED_CMD_REG_NONE 0 /* NULL == no addr for the cmd register */
25
26/* led tasklet struct */
27extern struct tasklet_struct led_tasklet;
28
29/* register_led_driver() */
30int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg);
31
32/* registers the LED regions for procfs */
33void __init register_led_regions(void);
34
35#ifdef CONFIG_CHASSIS_LCD_LED
36/* writes a string to the LCD display (if possible on this h/w) */
37int lcd_print(char *str);
38#else
39#define lcd_print(str)
40#endif
41
42/* main LED initialization function (uses PDC) */
43int __init led_init(void);
44
45#endif /* LED_H */
diff --git a/include/asm-parisc/linkage.h b/include/asm-parisc/linkage.h
new file mode 100644
index 000000000000..291c2d01c44f
--- /dev/null
+++ b/include/asm-parisc/linkage.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4/* Nothing to see here... */
5
6#endif
diff --git a/include/asm-parisc/local.h b/include/asm-parisc/local.h
new file mode 100644
index 000000000000..892b3b2c4962
--- /dev/null
+++ b/include/asm-parisc/local.h
@@ -0,0 +1,40 @@
1#ifndef _ARCH_PARISC_LOCAL_H
2#define _ARCH_PARISC_LOCAL_H
3
4#include <linux/percpu.h>
5#include <asm/atomic.h>
6
7typedef atomic_t local_t;
8
9#define LOCAL_INIT(i) ATOMIC_INIT(i)
10#define local_read(v) atomic_read(v)
11#define local_set(v,i) atomic_set(v,i)
12
13#define local_inc(v) atomic_inc(v)
14#define local_dec(v) atomic_dec(v)
15#define local_add(i, v) atomic_add(i, v)
16#define local_sub(i, v) atomic_sub(i, v)
17
18#define __local_inc(v) ((v)->counter++)
19#define __local_dec(v) ((v)->counter--)
20#define __local_add(i,v) ((v)->counter+=(i))
21#define __local_sub(i,v) ((v)->counter-=(i))
22
23/* Use these for per-cpu local_t variables: on some archs they are
24 * much more efficient than these naive implementations. Note they take
25 * a variable, not an address.
26 */
27#define cpu_local_read(v) local_read(&__get_cpu_var(v))
28#define cpu_local_set(v, i) local_set(&__get_cpu_var(v), (i))
29
30#define cpu_local_inc(v) local_inc(&__get_cpu_var(v))
31#define cpu_local_dec(v) local_dec(&__get_cpu_var(v))
32#define cpu_local_add(i, v) local_add((i), &__get_cpu_var(v))
33#define cpu_local_sub(i, v) local_sub((i), &__get_cpu_var(v))
34
35#define __cpu_local_inc(v) __local_inc(&__get_cpu_var(v))
36#define __cpu_local_dec(v) __local_dec(&__get_cpu_var(v))
37#define __cpu_local_add(i, v) __local_add((i), &__get_cpu_var(v))
38#define __cpu_local_sub(i, v) __local_sub((i), &__get_cpu_var(v))
39
40#endif /* _ARCH_PARISC_LOCAL_H */
diff --git a/include/asm-parisc/machdep.h b/include/asm-parisc/machdep.h
new file mode 100644
index 000000000000..a231c97d703e
--- /dev/null
+++ b/include/asm-parisc/machdep.h
@@ -0,0 +1,16 @@
1#ifndef _PARISC_MACHDEP_H
2#define _PARISC_MACHDEP_H
3
4#include <linux/notifier.h>
5
6#define MACH_RESTART 1
7#define MACH_HALT 2
8#define MACH_POWER_ON 3
9#define MACH_POWER_OFF 4
10
11extern struct notifier_block *mach_notifier;
12extern void pa7300lc_init(void);
13
14extern void (*cpu_lpmc)(int, struct pt_regs *);
15
16#endif
diff --git a/include/asm-parisc/mc146818rtc.h b/include/asm-parisc/mc146818rtc.h
new file mode 100644
index 000000000000..adf41631449f
--- /dev/null
+++ b/include/asm-parisc/mc146818rtc.h
@@ -0,0 +1,9 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H
6
7/* empty include file to satisfy the include in genrtc.c */
8
9#endif /* _ASM_MC146818RTC_H */
diff --git a/include/asm-parisc/mman.h b/include/asm-parisc/mman.h
new file mode 100644
index 000000000000..e829607eb8bc
--- /dev/null
+++ b/include/asm-parisc/mman.h
@@ -0,0 +1,57 @@
1#ifndef __PARISC_MMAN_H__
2#define __PARISC_MMAN_H__
3
4#define PROT_READ 0x1 /* page can be read */
5#define PROT_WRITE 0x2 /* page can be written */
6#define PROT_EXEC 0x4 /* page can be executed */
7#define PROT_SEM 0x8 /* page may be used for atomic ops */
8#define PROT_NONE 0x0 /* page can not be accessed */
9#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
10#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
11
12#define MAP_SHARED 0x01 /* Share changes */
13#define MAP_PRIVATE 0x02 /* Changes are private */
14#define MAP_TYPE 0x03 /* Mask for type of mapping */
15#define MAP_FIXED 0x04 /* Interpret addr exactly */
16#define MAP_ANONYMOUS 0x10 /* don't use a file */
17
18#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
19#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
20#define MAP_LOCKED 0x2000 /* pages are locked */
21#define MAP_NORESERVE 0x4000 /* don't check for reservations */
22#define MAP_GROWSDOWN 0x8000 /* stack-like segment */
23#define MAP_POPULATE 0x10000 /* populate (prefault) pagetables */
24#define MAP_NONBLOCK 0x20000 /* do not block on IO */
25
26#define MS_SYNC 1 /* synchronous memory sync */
27#define MS_ASYNC 2 /* sync memory asynchronously */
28#define MS_INVALIDATE 4 /* invalidate the caches */
29
30#define MCL_CURRENT 1 /* lock all current mappings */
31#define MCL_FUTURE 2 /* lock all future mappings */
32
33#define MADV_NORMAL 0 /* no further special treatment */
34#define MADV_RANDOM 1 /* expect random page references */
35#define MADV_SEQUENTIAL 2 /* expect sequential page references */
36#define MADV_WILLNEED 3 /* will need these pages */
37#define MADV_DONTNEED 4 /* don't need these pages */
38#define MADV_SPACEAVAIL 5 /* insure that resources are reserved */
39#define MADV_VPS_PURGE 6 /* Purge pages from VM page cache */
40#define MADV_VPS_INHERIT 7 /* Inherit parents page size */
41
42/* The range 12-64 is reserved for page size specification. */
43#define MADV_4K_PAGES 12 /* Use 4K pages */
44#define MADV_16K_PAGES 14 /* Use 16K pages */
45#define MADV_64K_PAGES 16 /* Use 64K pages */
46#define MADV_256K_PAGES 18 /* Use 256K pages */
47#define MADV_1M_PAGES 20 /* Use 1 Megabyte pages */
48#define MADV_4M_PAGES 22 /* Use 4 Megabyte pages */
49#define MADV_16M_PAGES 24 /* Use 16 Megabyte pages */
50#define MADV_64M_PAGES 26 /* Use 64 Megabyte pages */
51
52/* compatibility flags */
53#define MAP_ANON MAP_ANONYMOUS
54#define MAP_FILE 0
55#define MAP_VARIABLE 0
56
57#endif /* __PARISC_MMAN_H__ */
diff --git a/include/asm-parisc/mmu.h b/include/asm-parisc/mmu.h
new file mode 100644
index 000000000000..6a310cf8b734
--- /dev/null
+++ b/include/asm-parisc/mmu.h
@@ -0,0 +1,7 @@
1#ifndef _PARISC_MMU_H_
2#define _PARISC_MMU_H_
3
4/* On parisc, we store the space id here */
5typedef unsigned long mm_context_t;
6
7#endif /* _PARISC_MMU_H_ */
diff --git a/include/asm-parisc/mmu_context.h b/include/asm-parisc/mmu_context.h
new file mode 100644
index 000000000000..9c05836239a2
--- /dev/null
+++ b/include/asm-parisc/mmu_context.h
@@ -0,0 +1,73 @@
1#ifndef __PARISC_MMU_CONTEXT_H
2#define __PARISC_MMU_CONTEXT_H
3
4#include <linux/mm.h>
5#include <asm/atomic.h>
6#include <asm/pgalloc.h>
7#include <asm/pgtable.h>
8
9static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
10{
11}
12
13/* on PA-RISC, we actually have enough contexts to justify an allocator
14 * for them. prumpf */
15
16extern unsigned long alloc_sid(void);
17extern void free_sid(unsigned long);
18
19static inline int
20init_new_context(struct task_struct *tsk, struct mm_struct *mm)
21{
22 BUG_ON(atomic_read(&mm->mm_users) != 1);
23
24 mm->context = alloc_sid();
25 return 0;
26}
27
28static inline void
29destroy_context(struct mm_struct *mm)
30{
31 free_sid(mm->context);
32 mm->context = 0;
33}
34
35static inline void load_context(mm_context_t context)
36{
37 mtsp(context, 3);
38#if SPACEID_SHIFT == 0
39 mtctl(context << 1,8);
40#else
41 mtctl(context >> (SPACEID_SHIFT - 1),8);
42#endif
43}
44
45static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
46{
47
48 if (prev != next) {
49 mtctl(__pa(next->pgd), 25);
50 load_context(next->context);
51 }
52}
53
54#define deactivate_mm(tsk,mm) do { } while (0)
55
56static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
57{
58 /*
59 * Activate_mm is our one chance to allocate a space id
60 * for a new mm created in the exec path. There's also
61 * some lazy tlb stuff, which is currently dead code, but
62 * we only allocate a space id if one hasn't been allocated
63 * already, so we should be OK.
64 */
65
66 BUG_ON(next == &init_mm); /* Should never happen */
67
68 if (next->context == 0)
69 next->context = alloc_sid();
70
71 switch_mm(prev,next,current);
72}
73#endif
diff --git a/include/asm-parisc/mmzone.h b/include/asm-parisc/mmzone.h
new file mode 100644
index 000000000000..928bf50c4693
--- /dev/null
+++ b/include/asm-parisc/mmzone.h
@@ -0,0 +1,102 @@
1#ifndef _PARISC_MMZONE_H
2#define _PARISC_MMZONE_H
3
4#ifdef CONFIG_DISCONTIGMEM
5
6#define MAX_PHYSMEM_RANGES 8 /* Fix the size for now (current known max is 3) */
7extern int npmem_ranges;
8
9struct node_map_data {
10 pg_data_t pg_data;
11};
12
13extern struct node_map_data node_data[];
14
15#define NODE_DATA(nid) (&node_data[nid].pg_data)
16
17/*
18 * Given a kernel address, find the home node of the underlying memory.
19 */
20#define kvaddr_to_nid(kaddr) pfn_to_nid(__pa(kaddr) >> PAGE_SHIFT)
21
22#define node_mem_map(nid) (NODE_DATA(nid)->node_mem_map)
23#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
24#define node_end_pfn(nid) \
25({ \
26 pg_data_t *__pgdat = NODE_DATA(nid); \
27 __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \
28})
29#define node_localnr(pfn, nid) ((pfn) - node_start_pfn(nid))
30
31#define local_mapnr(kvaddr) \
32({ \
33 unsigned long __pfn = __pa(kvaddr) >> PAGE_SHIFT; \
34 (__pfn - node_start_pfn(pfn_to_nid(__pfn))); \
35})
36
37#define pfn_to_page(pfn) \
38({ \
39 unsigned long __pfn = (pfn); \
40 int __node = pfn_to_nid(__pfn); \
41 &node_mem_map(__node)[node_localnr(__pfn,__node)]; \
42})
43
44#define page_to_pfn(pg) \
45({ \
46 struct page *__page = pg; \
47 struct zone *__zone = page_zone(__page); \
48 BUG_ON(__zone == NULL); \
49 (unsigned long)(__page - __zone->zone_mem_map) \
50 + __zone->zone_start_pfn; \
51})
52
53/* We have these possible memory map layouts:
54 * Astro: 0-3.75, 67.75-68, 4-64
55 * zx1: 0-1, 257-260, 4-256
56 * Stretch (N-class): 0-2, 4-32, 34-xxx
57 */
58
59/* Since each 1GB can only belong to one region (node), we can create
60 * an index table for pfn to nid lookup; each entry in pfnnid_map
61 * represents 1GB, and contains the node that the memory belongs to. */
62
63#define PFNNID_SHIFT (30 - PAGE_SHIFT)
64#define PFNNID_MAP_MAX 512 /* support 512GB */
65extern unsigned char pfnnid_map[PFNNID_MAP_MAX];
66
67#ifndef __LP64__
68#define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT))
69#else
70/* io can be 0xf0f0f0f0f0xxxxxx or 0xfffffffff0000000 */
71#define pfn_is_io(pfn) ((pfn & (0xf000000000000000UL >> PAGE_SHIFT)) == (0xf000000000000000UL >> PAGE_SHIFT))
72#endif
73
74static inline int pfn_to_nid(unsigned long pfn)
75{
76 unsigned int i;
77 unsigned char r;
78
79 if (unlikely(pfn_is_io(pfn)))
80 return 0;
81
82 i = pfn >> PFNNID_SHIFT;
83 BUG_ON(i >= sizeof(pfnnid_map) / sizeof(pfnnid_map[0]));
84 r = pfnnid_map[i];
85 BUG_ON(r == 0xff);
86
87 return (int)r;
88}
89
90static inline int pfn_valid(int pfn)
91{
92 int nid = pfn_to_nid(pfn);
93
94 if (nid >= 0)
95 return (pfn < node_end_pfn(nid));
96 return 0;
97}
98
99#else /* !CONFIG_DISCONTIGMEM */
100#define MAX_PHYSMEM_RANGES 1
101#endif
102#endif /* _PARISC_MMZONE_H */
diff --git a/include/asm-parisc/module.h b/include/asm-parisc/module.h
new file mode 100644
index 000000000000..00f06885f843
--- /dev/null
+++ b/include/asm-parisc/module.h
@@ -0,0 +1,32 @@
1#ifndef _ASM_PARISC_MODULE_H
2#define _ASM_PARISC_MODULE_H
3/*
4 * This file contains the parisc architecture specific module code.
5 */
6#ifdef __LP64__
7#define Elf_Shdr Elf64_Shdr
8#define Elf_Sym Elf64_Sym
9#define Elf_Ehdr Elf64_Ehdr
10#define Elf_Addr Elf64_Addr
11#define Elf_Rela Elf64_Rela
12#else
13#define Elf_Shdr Elf32_Shdr
14#define Elf_Sym Elf32_Sym
15#define Elf_Ehdr Elf32_Ehdr
16#define Elf_Addr Elf32_Addr
17#define Elf_Rela Elf32_Rela
18#endif
19
20struct unwind_table;
21
22struct mod_arch_specific
23{
24 unsigned long got_offset, got_count, got_max;
25 unsigned long fdesc_offset, fdesc_count, fdesc_max;
26 unsigned long stub_offset, stub_count, stub_max;
27 unsigned long init_stub_offset, init_stub_count, init_stub_max;
28 int unwind_section;
29 struct unwind_table *unwind;
30};
31
32#endif /* _ASM_PARISC_MODULE_H */
diff --git a/include/asm-parisc/msgbuf.h b/include/asm-parisc/msgbuf.h
new file mode 100644
index 000000000000..14ffc2782f1e
--- /dev/null
+++ b/include/asm-parisc/msgbuf.h
@@ -0,0 +1,37 @@
1#ifndef _PARISC_MSGBUF_H
2#define _PARISC_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for parisc architecture, copied from sparc.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16#ifndef __LP64__
17 unsigned int __pad1;
18#endif
19 __kernel_time_t msg_stime; /* last msgsnd time */
20#ifndef __LP64__
21 unsigned int __pad2;
22#endif
23 __kernel_time_t msg_rtime; /* last msgrcv time */
24#ifndef __LP64__
25 unsigned int __pad3;
26#endif
27 __kernel_time_t msg_ctime; /* last change time */
28 unsigned int msg_cbytes; /* current number of bytes on queue */
29 unsigned int msg_qnum; /* number of messages in queue */
30 unsigned int msg_qbytes; /* max number of bytes on queue */
31 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
32 __kernel_pid_t msg_lrpid; /* last receive pid */
33 unsigned int __unused1;
34 unsigned int __unused2;
35};
36
37#endif /* _PARISC_MSGBUF_H */
diff --git a/include/asm-parisc/namei.h b/include/asm-parisc/namei.h
new file mode 100644
index 000000000000..8d29b3d9fb33
--- /dev/null
+++ b/include/asm-parisc/namei.h
@@ -0,0 +1,17 @@
1/* $Id: namei.h,v 1.1 1996/12/13 14:48:21 jj Exp $
2 * linux/include/asm-parisc/namei.h
3 *
4 * Included from linux/fs/namei.c
5 */
6
7#ifndef __PARISC_NAMEI_H
8#define __PARISC_NAMEI_H
9
10/* This dummy routine maybe changed to something useful
11 * for /usr/gnemul/ emulation stuff.
12 * Look at asm-sparc/namei.h for details.
13 */
14
15#define __emul_prefix() NULL
16
17#endif /* __PARISC_NAMEI_H */
diff --git a/include/asm-parisc/numnodes.h b/include/asm-parisc/numnodes.h
new file mode 100644
index 000000000000..6c67651efd1c
--- /dev/null
+++ b/include/asm-parisc/numnodes.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_MAX_NUMNODES_H
2#define _ASM_MAX_NUMNODES_H
3
4/* Max 8 Nodes */
5#define NODES_SHIFT 3
6
7#endif /* _ASM_MAX_NUMNODES_H */
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h
new file mode 100644
index 000000000000..4a12692f94b4
--- /dev/null
+++ b/include/asm-parisc/page.h
@@ -0,0 +1,162 @@
1#ifndef _PARISC_PAGE_H
2#define _PARISC_PAGE_H
3
4/* PAGE_SHIFT determines the page size */
5#define PAGE_SHIFT 12
6#define PAGE_SIZE (1UL << PAGE_SHIFT)
7#define PAGE_MASK (~(PAGE_SIZE-1))
8
9#ifdef __KERNEL__
10#include <linux/config.h>
11#ifndef __ASSEMBLY__
12
13#include <asm/types.h>
14#include <asm/cache.h>
15
16#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
17#define copy_page(to,from) copy_user_page_asm((void *)(to), (void *)(from))
18
19struct page;
20
21extern void purge_kernel_dcache_page(unsigned long);
22extern void copy_user_page_asm(void *to, void *from);
23extern void clear_user_page_asm(void *page, unsigned long vaddr);
24
25static inline void
26copy_user_page(void *vto, void *vfrom, unsigned long vaddr, struct page *pg)
27{
28 copy_user_page_asm(vto, vfrom);
29 flush_kernel_dcache_page(vto);
30 /* XXX: ppc flushes icache too, should we? */
31}
32
33static inline void
34clear_user_page(void *page, unsigned long vaddr, struct page *pg)
35{
36 purge_kernel_dcache_page((unsigned long)page);
37 clear_user_page_asm(page, vaddr);
38}
39
40/*
41 * These are used to make use of C type-checking..
42 */
43#ifdef __LP64__
44typedef struct { unsigned long pte; } pte_t;
45#else
46typedef struct {
47 unsigned long pte;
48 unsigned long flags;
49} pte_t;
50#endif
51/* NOTE: even on 64 bits, these entries are __u32 because we allocate
52 * the pmd and pgd in ZONE_DMA (i.e. under 4GB) */
53typedef struct { __u32 pmd; } pmd_t;
54typedef struct { __u32 pgd; } pgd_t;
55typedef struct { unsigned long pgprot; } pgprot_t;
56
57#define pte_val(x) ((x).pte)
58#ifdef __LP64__
59#define pte_flags(x) (*(__u32 *)&((x).pte))
60#else
61#define pte_flags(x) ((x).flags)
62#endif
63
64/* These do not work lvalues, so make sure we don't use them as such. */
65#define pmd_val(x) ((x).pmd + 0)
66#define pgd_val(x) ((x).pgd + 0)
67#define pgprot_val(x) ((x).pgprot)
68
69#define __pmd_val_set(x,n) (x).pmd = (n)
70#define __pgd_val_set(x,n) (x).pgd = (n)
71
72#define __pte(x) ((pte_t) { (x) } )
73#define __pmd(x) ((pmd_t) { (x) } )
74#define __pgd(x) ((pgd_t) { (x) } )
75#define __pgprot(x) ((pgprot_t) { (x) } )
76
77/* Pure 2^n version of get_order */
78extern __inline__ int get_order(unsigned long size)
79{
80 int order;
81
82 size = (size-1) >> (PAGE_SHIFT-1);
83 order = -1;
84 do {
85 size >>= 1;
86 order++;
87 } while (size);
88 return order;
89}
90
91typedef struct __physmem_range {
92 unsigned long start_pfn;
93 unsigned long pages; /* PAGE_SIZE pages */
94} physmem_range_t;
95
96extern physmem_range_t pmem_ranges[];
97extern int npmem_ranges;
98
99#endif /* !__ASSEMBLY__ */
100
101/* WARNING: The definitions below must match exactly to sizeof(pte_t)
102 * etc
103 */
104#ifdef __LP64__
105#define BITS_PER_PTE_ENTRY 3
106#define BITS_PER_PMD_ENTRY 2
107#define BITS_PER_PGD_ENTRY 2
108#else
109#define BITS_PER_PTE_ENTRY 3
110#define BITS_PER_PMD_ENTRY 2
111#define BITS_PER_PGD_ENTRY BITS_PER_PMD_ENTRY
112#endif
113#define PGD_ENTRY_SIZE (1UL << BITS_PER_PGD_ENTRY)
114#define PMD_ENTRY_SIZE (1UL << BITS_PER_PMD_ENTRY)
115#define PTE_ENTRY_SIZE (1UL << BITS_PER_PTE_ENTRY)
116
117/* to align the pointer to the (next) page boundary */
118#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
119
120
121#define LINUX_GATEWAY_SPACE 0
122
123/* This governs the relationship between virtual and physical addresses.
124 * If you alter it, make sure to take care of our various fixed mapping
125 * segments in fixmap.h */
126#define __PAGE_OFFSET (0x10000000)
127
128#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
129
130/* The size of the gateway page (we leave lots of room for expansion) */
131#define GATEWAY_PAGE_SIZE 0x4000
132
133/* The start of the actual kernel binary---used in vmlinux.lds.S
134 * Leave some space after __PAGE_OFFSET for detecting kernel null
135 * ptr derefs */
136#define KERNEL_BINARY_TEXT_START (__PAGE_OFFSET + 0x100000)
137
138/* These macros don't work for 64-bit C code -- don't allow in C at all */
139#ifdef __ASSEMBLY__
140# define PA(x) ((x)-__PAGE_OFFSET)
141# define VA(x) ((x)+__PAGE_OFFSET)
142#endif
143#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
144#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
145
146#ifndef CONFIG_DISCONTIGMEM
147#define pfn_to_page(pfn) (mem_map + (pfn))
148#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
149#define pfn_valid(pfn) ((pfn) < max_mapnr)
150#endif /* CONFIG_DISCONTIGMEM */
151
152#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
153
154#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
155#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
156
157#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
158 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
159
160#endif /* __KERNEL__ */
161
162#endif /* _PARISC_PAGE_H */
diff --git a/include/asm-parisc/param.h b/include/asm-parisc/param.h
new file mode 100644
index 000000000000..f4694d452dd6
--- /dev/null
+++ b/include/asm-parisc/param.h
@@ -0,0 +1,27 @@
1#ifndef _ASMPARISC_PARAM_H
2#define _ASMPARISC_PARAM_H
3
4#ifdef __KERNEL__
5#include <linux/config.h>
6# ifdef CONFIG_PA20
7# define HZ 1000 /* Faster machines */
8# else
9# define HZ 100 /* Internal kernel timer frequency */
10# endif
11# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
12# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
13#endif
14
15#ifndef HZ
16#define HZ 100
17#endif
18
19#define EXEC_PAGESIZE 4096
20
21#ifndef NOGROUP
22#define NOGROUP (-1)
23#endif
24
25#define MAXHOSTNAMELEN 64 /* max length of hostname */
26
27#endif
diff --git a/include/asm-parisc/parisc-device.h b/include/asm-parisc/parisc-device.h
new file mode 100644
index 000000000000..ef69ab4b17a9
--- /dev/null
+++ b/include/asm-parisc/parisc-device.h
@@ -0,0 +1,54 @@
1#include <linux/device.h>
2
3struct parisc_device {
4 unsigned long hpa; /* Hard Physical Address */
5 struct parisc_device_id id;
6 struct parisc_driver *driver; /* Driver for this device */
7 char name[80]; /* The hardware description */
8 int irq;
9 int aux_irq; /* Some devices have a second IRQ */
10
11 char hw_path; /* The module number on this bus */
12 unsigned int num_addrs; /* some devices have additional address ranges. */
13 unsigned long *addr; /* which will be stored here */
14
15#ifdef __LP64__
16 /* parms for pdc_pat_cell_module() call */
17 unsigned long pcell_loc; /* Physical Cell location */
18 unsigned long mod_index; /* PAT specific - Misc Module info */
19
20 /* generic info returned from pdc_pat_cell_module() */
21 unsigned long mod_info; /* PAT specific - Misc Module info */
22 unsigned long pmod_loc; /* physical Module location */
23#endif
24 u64 dma_mask; /* DMA mask for I/O */
25 struct device dev;
26};
27
28struct parisc_driver {
29 struct parisc_driver *next;
30 char *name;
31 const struct parisc_device_id *id_table;
32 int (*probe) (struct parisc_device *dev); /* New device discovered */
33 int (*remove) (struct parisc_device *dev);
34 struct device_driver drv;
35};
36
37
38#define to_parisc_device(d) container_of(d, struct parisc_device, dev)
39#define to_parisc_driver(d) container_of(d, struct parisc_driver, drv)
40#define parisc_parent(d) to_parisc_device(d->dev.parent)
41
42static inline void
43parisc_set_drvdata(struct parisc_device *d, void *p)
44{
45 dev_set_drvdata(&d->dev, p);
46}
47
48static inline void *
49parisc_get_drvdata(struct parisc_device *d)
50{
51 return dev_get_drvdata(&d->dev);
52}
53
54extern struct bus_type parisc_bus_type;
diff --git a/include/asm-parisc/parport.h b/include/asm-parisc/parport.h
new file mode 100644
index 000000000000..00d9cc3e7b97
--- /dev/null
+++ b/include/asm-parisc/parport.h
@@ -0,0 +1,18 @@
1/*
2 *
3 * parport.h: ia32-compatible parport initialisation
4 *
5 * This file should only be included by drivers/parport/parport_pc.c.
6 */
7#ifndef _ASM_PARPORT_H
8#define _ASM_PARPORT_H 1
9
10
11static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
12{
13 /* nothing ! */
14 return 0;
15}
16
17
18#endif /* !(_ASM_PARPORT_H) */
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h
new file mode 100644
index 000000000000..0763c2982fb0
--- /dev/null
+++ b/include/asm-parisc/pci.h
@@ -0,0 +1,241 @@
1#ifndef __ASM_PARISC_PCI_H
2#define __ASM_PARISC_PCI_H
3
4#include <linux/config.h>
5#include <asm/scatterlist.h>
6
7
8
9/*
10** HP PCI platforms generally support multiple bus adapters.
11** (workstations 1-~4, servers 2-~32)
12**
13** Newer platforms number the busses across PCI bus adapters *sparsely*.
14** E.g. 0, 8, 16, ...
15**
16** Under a PCI bus, most HP platforms support PPBs up to two or three
17** levels deep. See "Bit3" product line.
18*/
19#define PCI_MAX_BUSSES 256
20
21/*
22** pci_hba_data (aka H2P_OBJECT in HP/UX)
23**
24** This is the "common" or "base" data structure which HBA drivers
25** (eg Dino or LBA) are required to place at the top of their own
26** platform_data structure. I've heard this called "C inheritance" too.
27**
28** Data needed by pcibios layer belongs here.
29*/
30struct pci_hba_data {
31 void __iomem *base_addr; /* aka Host Physical Address */
32 const struct parisc_device *dev; /* device from PA bus walk */
33 struct pci_bus *hba_bus; /* primary PCI bus below HBA */
34 int hba_num; /* I/O port space access "key" */
35 struct resource bus_num; /* PCI bus numbers */
36 struct resource io_space; /* PIOP */
37 struct resource lmmio_space; /* bus addresses < 4Gb */
38 struct resource elmmio_space; /* additional bus addresses < 4Gb */
39 struct resource gmmio_space; /* bus addresses > 4Gb */
40
41 /* NOTE: Dino code assumes it can use *all* of the lmmio_space,
42 * elmmio_space and gmmio_space as a contiguous array of
43 * resources. This #define represents the array size */
44 #define DINO_MAX_LMMIO_RESOURCES 3
45
46 unsigned long lmmio_space_offset; /* CPU view - PCI view */
47 void * iommu; /* IOMMU this device is under */
48 /* REVISIT - spinlock to protect resources? */
49
50 #define HBA_NAME_SIZE 16
51 char io_name[HBA_NAME_SIZE];
52 char lmmio_name[HBA_NAME_SIZE];
53 char elmmio_name[HBA_NAME_SIZE];
54 char gmmio_name[HBA_NAME_SIZE];
55};
56
57#define HBA_DATA(d) ((struct pci_hba_data *) (d))
58
59/*
60** We support 2^16 I/O ports per HBA. These are set up in the form
61** 0xbbxxxx, where bb is the bus number and xxxx is the I/O port
62** space address.
63*/
64#define HBA_PORT_SPACE_BITS 16
65
66#define HBA_PORT_BASE(h) ((h) << HBA_PORT_SPACE_BITS)
67#define HBA_PORT_SPACE_SIZE (1UL << HBA_PORT_SPACE_BITS)
68
69#define PCI_PORT_HBA(a) ((a) >> HBA_PORT_SPACE_BITS)
70#define PCI_PORT_ADDR(a) ((a) & (HBA_PORT_SPACE_SIZE - 1))
71
72#if CONFIG_64BIT
73#define PCI_F_EXTEND 0xffffffff00000000UL
74#define PCI_IS_LMMIO(hba,a) pci_is_lmmio(hba,a)
75
76/* We need to know if an address is LMMMIO or GMMIO.
77 * LMMIO requires mangling and GMMIO we must use as-is.
78 */
79static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a)
80{
81 return(((a) & PCI_F_EXTEND) == PCI_F_EXTEND);
82}
83
84/*
85** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
86** See pcibios.c for more conversions used by Generic PCI code.
87*/
88#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \
89 ? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \
90 : (a)) /* GMMIO */
91#define PCI_HOST_ADDR(hba,a) ((a) + hba->lmmio_space_offset)
92
93#else /* !CONFIG_64BIT */
94
95#define PCI_BUS_ADDR(hba,a) (a)
96#define PCI_HOST_ADDR(hba,a) (a)
97#define PCI_F_EXTEND 0UL
98#define PCI_IS_LMMIO(hba,a) (1) /* 32-bit doesn't support GMMIO */
99
100#endif /* !CONFIG_64BIT */
101
102/*
103** KLUGE: linux/pci.h include asm/pci.h BEFORE declaring struct pci_bus
104** (This eliminates some of the warnings).
105*/
106struct pci_bus;
107struct pci_dev;
108
109/*
110 * If the PCI device's view of memory is the same as the CPU's view of memory,
111 * PCI_DMA_BUS_IS_PHYS is true. The networking and block device layers use
112 * this boolean for bounce buffer decisions.
113 */
114#ifdef CONFIG_PA20
115/* All PA-2.0 machines have an IOMMU. */
116#define PCI_DMA_BUS_IS_PHYS 0
117#define parisc_has_iommu() do { } while (0)
118#else
119
120#if defined(CONFIG_IOMMU_CCIO) || defined(CONFIG_IOMMU_SBA)
121extern int parisc_bus_is_phys; /* in arch/parisc/kernel/setup.c */
122#define PCI_DMA_BUS_IS_PHYS parisc_bus_is_phys
123#define parisc_has_iommu() do { parisc_bus_is_phys = 0; } while (0)
124#else
125#define PCI_DMA_BUS_IS_PHYS 1
126#define parisc_has_iommu() do { } while (0)
127#endif
128
129#endif /* !CONFIG_PA20 */
130
131
132/*
133** Most PCI devices (eg Tulip, NCR720) also export the same registers
134** to both MMIO and I/O port space. Due to poor performance of I/O Port
135** access under HP PCI bus adapters, strongly reccomend use of MMIO
136** address space.
137**
138** While I'm at it more PA programming notes:
139**
140** 1) MMIO stores (writes) are posted operations. This means the processor
141** gets an "ACK" before the write actually gets to the device. A read
142** to the same device (or typically the bus adapter above it) will
143** force in-flight write transaction(s) out to the targeted device
144** before the read can complete.
145**
146** 2) The Programmed I/O (PIO) data may not always be strongly ordered with
147** respect to DMA on all platforms. Ie PIO data can reach the processor
148** before in-flight DMA reaches memory. Since most SMP PA platforms
149** are I/O coherent, it generally doesn't matter...but sometimes
150** it does.
151**
152** I've helped device driver writers debug both types of problems.
153*/
154struct pci_port_ops {
155 u8 (*inb) (struct pci_hba_data *hba, u16 port);
156 u16 (*inw) (struct pci_hba_data *hba, u16 port);
157 u32 (*inl) (struct pci_hba_data *hba, u16 port);
158 void (*outb) (struct pci_hba_data *hba, u16 port, u8 data);
159 void (*outw) (struct pci_hba_data *hba, u16 port, u16 data);
160 void (*outl) (struct pci_hba_data *hba, u16 port, u32 data);
161};
162
163
164struct pci_bios_ops {
165 void (*init)(void);
166 void (*fixup_bus)(struct pci_bus *bus);
167};
168
169/* pci_unmap_{single,page} is not a nop, thus... */
170#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
171 dma_addr_t ADDR_NAME;
172#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
173 __u32 LEN_NAME;
174#define pci_unmap_addr(PTR, ADDR_NAME) \
175 ((PTR)->ADDR_NAME)
176#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
177 (((PTR)->ADDR_NAME) = (VAL))
178#define pci_unmap_len(PTR, LEN_NAME) \
179 ((PTR)->LEN_NAME)
180#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
181 (((PTR)->LEN_NAME) = (VAL))
182
183/*
184** Stuff declared in arch/parisc/kernel/pci.c
185*/
186extern struct pci_port_ops *pci_port;
187extern struct pci_bios_ops *pci_bios;
188extern int pci_post_reset_delay; /* delay after de-asserting #RESET */
189extern int pci_hba_count;
190extern struct pci_hba_data *parisc_pci_hba[];
191
192#ifdef CONFIG_PCI
193extern void pcibios_register_hba(struct pci_hba_data *);
194extern void pcibios_set_master(struct pci_dev *);
195#else
196extern inline void pcibios_register_hba(struct pci_hba_data *x)
197{
198}
199#endif
200
201/*
202 * pcibios_assign_all_busses() is used in drivers/pci/pci.c:pci_do_scan_bus()
203 * 0 == check if bridge is numbered before re-numbering.
204 * 1 == pci_do_scan_bus() should automatically number all PCI-PCI bridges.
205 *
206 * We *should* set this to zero for "legacy" platforms and one
207 * for PAT platforms.
208 *
209 * But legacy platforms also need to renumber the busses below a Host
210 * Bus controller. Adding a 4-port Tulip card on the first PCI root
211 * bus of a C200 resulted in the secondary bus being numbered as 1.
212 * The second PCI host bus controller's root bus had already been
213 * assigned bus number 1 by firmware and sysfs complained.
214 *
215 * Firmware isn't doing anything wrong here since each controller
216 * is its own PCI domain. It's simpler and easier for us to renumber
217 * the busses rather than treat each Dino as a separate PCI domain.
218 * Eventually, we may want to introduce PCI domains for Superdome or
219 * rp7420/8420 boxes and then revisit this issue.
220 */
221#define pcibios_assign_all_busses() (1)
222#define pcibios_scan_all_fns(a, b) (0)
223
224#define PCIBIOS_MIN_IO 0x10
225#define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */
226
227/* Don't support DAC yet. */
228#define pci_dac_dma_supported(pci_dev, mask) (0)
229
230/* export the pci_ DMA API in terms of the dma_ one */
231#include <asm-generic/pci-dma-compat.h>
232
233extern void
234pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
235 struct resource *res);
236
237static inline void pcibios_add_platform_entries(struct pci_dev *dev)
238{
239}
240
241#endif /* __ASM_PARISC_PCI_H */
diff --git a/include/asm-parisc/pdc.h b/include/asm-parisc/pdc.h
new file mode 100644
index 000000000000..8e23e4c674f6
--- /dev/null
+++ b/include/asm-parisc/pdc.h
@@ -0,0 +1,781 @@
1#ifndef _PARISC_PDC_H
2#define _PARISC_PDC_H
3
4#include <linux/config.h>
5
6/*
7 * PDC return values ...
8 * All PDC calls return a subset of these errors.
9 */
10
11#define PDC_WARN 3 /* Call completed with a warning */
12#define PDC_REQ_ERR_1 2 /* See above */
13#define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */
14#define PDC_OK 0 /* Call completed successfully */
15#define PDC_BAD_PROC -1 /* Called non-existent procedure*/
16#define PDC_BAD_OPTION -2 /* Called with non-existent option */
17#define PDC_ERROR -3 /* Call could not complete without an error */
18#define PDC_NE_MOD -5 /* Module not found */
19#define PDC_NE_CELL_MOD -7 /* Cell module not found */
20#define PDC_INVALID_ARG -10 /* Called with an invalid argument */
21#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
22#define PDC_NOT_NARROW -17 /* Narrow mode not supported */
23
24
25/*
26 * PDC entry points...
27 */
28
29#define PDC_POW_FAIL 1 /* perform a power-fail */
30#define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */
31
32#define PDC_CHASSIS 2 /* PDC-chassis functions */
33#define PDC_CHASSIS_DISP 0 /* update chassis display */
34#define PDC_CHASSIS_WARN 1 /* return chassis warnings */
35#define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */
36#define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */
37
38#define PDC_PIM 3 /* Get PIM data */
39#define PDC_PIM_HPMC 0 /* Transfer HPMC data */
40#define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/
41#define PDC_PIM_LPMC 2 /* Transfer HPMC data */
42#define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */
43#define PDC_PIM_TOC 4 /* Transfer TOC data */
44
45#define PDC_MODEL 4 /* PDC model information call */
46#define PDC_MODEL_INFO 0 /* returns information */
47#define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */
48#define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/
49#define PDC_MODEL_SYSMODEL 3 /* return system model info */
50#define PDC_MODEL_ENSPEC 4 /* enable specific option */
51#define PDC_MODEL_DISPEC 5 /* disable specific option */
52#define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */
53#define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */
54#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
55#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
56
57#define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */
58#define PA90_INSTRUCTION_SET 0x8
59
60#define PDC_CACHE 5 /* return/set cache (& TLB) info*/
61#define PDC_CACHE_INFO 0 /* returns information */
62#define PDC_CACHE_SET_COH 1 /* set coherence state */
63#define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */
64
65#define PDC_HPA 6 /* return HPA of processor */
66#define PDC_HPA_PROCESSOR 0
67#define PDC_HPA_MODULES 1
68
69#define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */
70#define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */
71
72#define PDC_IODC 8 /* talk to IODC */
73#define PDC_IODC_READ 0 /* read IODC entry point */
74/* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */
75#define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */
76/* 1, 2 obsolete - HVERSION dependent*/
77#define PDC_IODC_RI_INIT 3 /* Initialize module */
78#define PDC_IODC_RI_IO 4 /* Module input/output */
79#define PDC_IODC_RI_SPA 5 /* Module input/output */
80#define PDC_IODC_RI_CONFIG 6 /* Module input/output */
81/* 7 obsolete - HVERSION dependent */
82#define PDC_IODC_RI_TEST 8 /* Module input/output */
83#define PDC_IODC_RI_TLB 9 /* Module input/output */
84#define PDC_IODC_NINIT 2 /* non-destructive init */
85#define PDC_IODC_DINIT 3 /* destructive init */
86#define PDC_IODC_MEMERR 4 /* check for memory errors */
87#define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */
88#define PDC_IODC_BUS_ERROR -4 /* bus error return value */
89#define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */
90#define PDC_IODC_COUNT -6 /* count is too small */
91
92#define PDC_TOD 9 /* time-of-day clock (TOD) */
93#define PDC_TOD_READ 0 /* read TOD */
94#define PDC_TOD_WRITE 1 /* write TOD */
95#define PDC_TOD_ITIMER 2 /* calibrate Interval Timer (CR16) */
96
97#define PDC_STABLE 10 /* stable storage (sprockets) */
98#define PDC_STABLE_READ 0
99#define PDC_STABLE_WRITE 1
100#define PDC_STABLE_RETURN_SIZE 2
101#define PDC_STABLE_VERIFY_CONTENTS 3
102#define PDC_STABLE_INITIALIZE 4
103
104#define PDC_NVOLATILE 11 /* often not implemented */
105
106#define PDC_ADD_VALID 12 /* Memory validation PDC call */
107#define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */
108
109#define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */
110
111#define PDC_PROC 16 /* (sprockets) */
112
113#define PDC_CONFIG 16 /* (sprockets) */
114#define PDC_CONFIG_DECONFIG 0
115#define PDC_CONFIG_DRECONFIG 1
116#define PDC_CONFIG_DRETURN_CONFIG 2
117
118#define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */
119#define PDC_BTLB_INFO 0 /* returns parameter */
120#define PDC_BTLB_INSERT 1 /* insert BTLB entry */
121#define PDC_BTLB_PURGE 2 /* purge BTLB entries */
122#define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */
123
124#define PDC_TLB 19 /* manage hardware TLB miss handling */
125#define PDC_TLB_INFO 0 /* returns parameter */
126#define PDC_TLB_SETUP 1 /* set up miss handling */
127
128#define PDC_MEM 20 /* Manage memory */
129#define PDC_MEM_MEMINFO 0
130#define PDC_MEM_ADD_PAGE 1
131#define PDC_MEM_CLEAR_PDT 2
132#define PDC_MEM_READ_PDT 3
133#define PDC_MEM_RESET_CLEAR 4
134#define PDC_MEM_GOODMEM 5
135#define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */
136#define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE
137#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131
138#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132
139#define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
140
141#define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */
142#define PDC_MEM_RET_DUPLICATE_ENTRY 4
143#define PDC_MEM_RET_BUF_SIZE_SMALL 1
144#define PDC_MEM_RET_PDT_FULL -11
145#define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
146
147#ifndef __ASSEMBLY__
148typedef struct {
149 unsigned long long baseAddr;
150 unsigned int pages;
151 unsigned int reserved;
152} MemAddrTable_t;
153#endif
154
155
156#define PDC_PSW 21 /* Get/Set default System Mask */
157#define PDC_PSW_MASK 0 /* Return mask */
158#define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */
159#define PDC_PSW_SET_DEFAULTS 2 /* Set default */
160#define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */
161#define PDC_PSW_WIDE_BIT 2 /* set for wide mode */
162
163#define PDC_SYSTEM_MAP 22 /* find system modules */
164#define PDC_FIND_MODULE 0
165#define PDC_FIND_ADDRESS 1
166#define PDC_TRANSLATE_PATH 2
167
168#define PDC_SOFT_POWER 23 /* soft power switch */
169#define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */
170#define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */
171
172
173/* HVERSION dependent */
174
175/* The PDC_MEM_MAP calls */
176#define PDC_MEM_MAP 128 /* on s700: return page info */
177#define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */
178
179#define PDC_EEPROM 129 /* EEPROM access */
180#define PDC_EEPROM_READ_WORD 0
181#define PDC_EEPROM_WRITE_WORD 1
182#define PDC_EEPROM_READ_BYTE 2
183#define PDC_EEPROM_WRITE_BYTE 3
184#define PDC_EEPROM_EEPROM_PASSWORD -1000
185
186#define PDC_NVM 130 /* NVM (non-volatile memory) access */
187#define PDC_NVM_READ_WORD 0
188#define PDC_NVM_WRITE_WORD 1
189#define PDC_NVM_READ_BYTE 2
190#define PDC_NVM_WRITE_BYTE 3
191
192#define PDC_SEED_ERROR 132 /* (sprockets) */
193
194#define PDC_IO 135 /* log error info, reset IO system */
195#define PDC_IO_READ_AND_CLEAR_ERRORS 0
196#define PDC_IO_RESET 1
197#define PDC_IO_RESET_DEVICES 2
198/* sets bits 6&7 (little endian) of the HcControl Register */
199#define PDC_IO_USB_SUSPEND 0xC000000000000000
200#define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */
201#define PDC_IO_NO_SUSPEND -6 /* return value */
202
203#define PDC_BROADCAST_RESET 136 /* reset all processors */
204#define PDC_DO_RESET 0 /* option: perform a broadcast reset */
205#define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */
206#define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */
207#define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */
208
209#define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */
210#define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */
211
212#define PDC_LAN_STATION_ID_SIZE 6
213
214#define PDC_CHECK_RANGES 139 /* (sprockets) */
215
216#define PDC_NV_SECTIONS 141 /* (sprockets) */
217
218#define PDC_PERFORMANCE 142 /* performance monitoring */
219
220#define PDC_SYSTEM_INFO 143 /* system information */
221#define PDC_SYSINFO_RETURN_INFO_SIZE 0
222#define PDC_SYSINFO_RRETURN_SYS_INFO 1
223#define PDC_SYSINFO_RRETURN_ERRORS 2
224#define PDC_SYSINFO_RRETURN_WARNINGS 3
225#define PDC_SYSINFO_RETURN_REVISIONS 4
226#define PDC_SYSINFO_RRETURN_DIAGNOSE 5
227#define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
228
229#define PDC_RDR 144 /* (sprockets) */
230#define PDC_RDR_READ_BUFFER 0
231#define PDC_RDR_READ_SINGLE 1
232#define PDC_RDR_WRITE_SINGLE 2
233
234#define PDC_INTRIGUE 145 /* (sprockets) */
235#define PDC_INTRIGUE_WRITE_BUFFER 0
236#define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
237#define PDC_INTRIGUE_START_CPU_COUNTERS 2
238#define PDC_INTRIGUE_STOP_CPU_COUNTERS 3
239
240#define PDC_STI 146 /* STI access */
241/* same as PDC_PCI_XXX values (see below) */
242
243/* Legacy PDC definitions for same stuff */
244#define PDC_PCI_INDEX 147
245#define PDC_PCI_INTERFACE_INFO 0
246#define PDC_PCI_SLOT_INFO 1
247#define PDC_PCI_INFLIGHT_BYTES 2
248#define PDC_PCI_READ_CONFIG 3
249#define PDC_PCI_WRITE_CONFIG 4
250#define PDC_PCI_READ_PCI_IO 5
251#define PDC_PCI_WRITE_PCI_IO 6
252#define PDC_PCI_READ_CONFIG_DELAY 7
253#define PDC_PCI_UPDATE_CONFIG_DELAY 8
254#define PDC_PCI_PCI_PATH_TO_PCI_HPA 9
255#define PDC_PCI_PCI_HPA_TO_PCI_PATH 10
256#define PDC_PCI_PCI_PATH_TO_PCI_BUS 11
257#define PDC_PCI_PCI_RESERVED 12
258#define PDC_PCI_PCI_INT_ROUTE_SIZE 13
259#define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE
260#define PDC_PCI_PCI_INT_ROUTE 14
261#define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE
262#define PDC_PCI_READ_MON_TYPE 15
263#define PDC_PCI_WRITE_MON_TYPE 16
264
265
266/* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */
267#define PDC_INITIATOR 163
268#define PDC_GET_INITIATOR 0
269#define PDC_SET_INITIATOR 1
270#define PDC_DELETE_INITIATOR 2
271#define PDC_RETURN_TABLE_SIZE 3
272#define PDC_RETURN_TABLE 4
273
274#define PDC_LINK 165 /* (sprockets) */
275#define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */
276#define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */
277
278
279/* constants for OS (NVM...) */
280#define OS_ID_NONE 0 /* Undefined OS ID */
281#define OS_ID_HPUX 1 /* HP-UX OS */
282#define OS_ID_LINUX OS_ID_HPUX /* just use the same value as hpux */
283#define OS_ID_MPEXL 2 /* MPE XL OS */
284#define OS_ID_OSF 3 /* OSF OS */
285#define OS_ID_HPRT 4 /* HP-RT OS */
286#define OS_ID_NOVEL 5 /* NOVELL OS */
287#define OS_ID_NT 6 /* NT OS */
288
289
290/* constants for PDC_CHASSIS */
291#define OSTAT_OFF 0
292#define OSTAT_FLT 1
293#define OSTAT_TEST 2
294#define OSTAT_INIT 3
295#define OSTAT_SHUT 4
296#define OSTAT_WARN 5
297#define OSTAT_RUN 6
298#define OSTAT_ON 7
299
300#ifndef __ASSEMBLY__
301
302#include <linux/types.h>
303
304extern int pdc_type;
305
306/* Values for pdc_type */
307#define PDC_TYPE_ILLEGAL -1
308#define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
309#define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
310#define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
311
312struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
313 unsigned long actcnt; /* actual number of bytes returned */
314 unsigned long maxcnt; /* maximum number of bytes that could be returned */
315};
316
317struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
318 unsigned long ccr_functional;
319 unsigned long ccr_present;
320 unsigned long revision;
321 unsigned long model;
322};
323
324struct pdc_model { /* for PDC_MODEL */
325 unsigned long hversion;
326 unsigned long sversion;
327 unsigned long hw_id;
328 unsigned long boot_id;
329 unsigned long sw_id;
330 unsigned long sw_cap;
331 unsigned long arch_rev;
332 unsigned long pot_key;
333 unsigned long curr_key;
334};
335
336/* Values for PDC_MODEL_CAPABILITES non-equivalent virtual aliasing support */
337
338#define PDC_MODEL_IOPDIR_FDC (1 << 2) /* see sba_iommu.c */
339#define PDC_MODEL_NVA_MASK (3 << 4)
340#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
341#define PDC_MODEL_NVA_SLOW (1 << 4)
342#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
343
344struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
345 unsigned long
346#ifdef __LP64__
347 cc_padW:32,
348#endif
349 cc_alias: 4, /* alias boundaries for virtual addresses */
350 cc_block: 4, /* to determine most efficient stride */
351 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
352 cc_shift: 2, /* how much to shift cc_block left */
353 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
354 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
355 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
356 cc_pad1 : 5, /* reserved */
357 cc_assoc: 8; /* associativity of I/D-cache */
358};
359
360struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
361 unsigned long tc_pad0:12, /* reserved */
362#ifdef __LP64__
363 tc_padW:32,
364#endif
365 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
366 tc_hv : 1, /* HV */
367 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
368 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
369 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
370 tc_pad1 : 8; /* ITLB: width of space-registers (encoded) */
371};
372
373struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
374 /* I-cache */
375 unsigned long ic_size; /* size in bytes */
376 struct pdc_cache_cf ic_conf; /* configuration */
377 unsigned long ic_base; /* base-addr */
378 unsigned long ic_stride;
379 unsigned long ic_count;
380 unsigned long ic_loop;
381 /* D-cache */
382 unsigned long dc_size; /* size in bytes */
383 struct pdc_cache_cf dc_conf; /* configuration */
384 unsigned long dc_base; /* base-addr */
385 unsigned long dc_stride;
386 unsigned long dc_count;
387 unsigned long dc_loop;
388 /* Instruction-TLB */
389 unsigned long it_size; /* number of entries in I-TLB */
390 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
391 unsigned long it_sp_base;
392 unsigned long it_sp_stride;
393 unsigned long it_sp_count;
394 unsigned long it_off_base;
395 unsigned long it_off_stride;
396 unsigned long it_off_count;
397 unsigned long it_loop;
398 /* data-TLB */
399 unsigned long dt_size; /* number of entries in D-TLB */
400 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
401 unsigned long dt_sp_base;
402 unsigned long dt_sp_stride;
403 unsigned long dt_sp_count;
404 unsigned long dt_off_base;
405 unsigned long dt_off_stride;
406 unsigned long dt_off_count;
407 unsigned long dt_loop;
408};
409
410#if 0
411/* If you start using the next struct, you'll have to adjust it to
412 * work with 64-bit firmware I think -PB
413 */
414struct pdc_iodc { /* PDC_IODC */
415 unsigned char hversion_model;
416 unsigned char hversion;
417 unsigned char spa;
418 unsigned char type;
419 unsigned int sversion_rev:4;
420 unsigned int sversion_model:19;
421 unsigned int sversion_opt:8;
422 unsigned char rev;
423 unsigned char dep;
424 unsigned char features;
425 unsigned char pad1;
426 unsigned int checksum:16;
427 unsigned int length:16;
428 unsigned int pad[15];
429} __attribute__((aligned(8))) ;
430#endif
431
432#ifndef CONFIG_PA20
433/* no BLTBs in pa2.0 processors */
434struct pdc_btlb_info_range {
435 __u8 res00;
436 __u8 num_i;
437 __u8 num_d;
438 __u8 num_comb;
439};
440
441struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
442 unsigned int min_size; /* minimum size of BTLB in pages */
443 unsigned int max_size; /* maximum size of BTLB in pages */
444 struct pdc_btlb_info_range fixed_range_info;
445 struct pdc_btlb_info_range variable_range_info;
446};
447
448#endif /* !CONFIG_PA20 */
449
450#ifdef __LP64__
451struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
452 unsigned long entries_returned;
453 unsigned long entries_total;
454};
455
456struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
457 unsigned long paddr;
458 unsigned int pages;
459 unsigned int reserved;
460};
461#endif /* __LP64__ */
462
463struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
464 unsigned long mod_addr;
465 unsigned long mod_pgs;
466 unsigned long add_addrs;
467};
468
469struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
470 unsigned long mod_addr;
471 unsigned long mod_pgs;
472};
473
474struct pdc_initiator { /* PDC_INITIATOR */
475 int host_id;
476 int factor;
477 int width;
478 int mode;
479};
480
481struct hardware_path {
482 char flags; /* see bit definitions below */
483 char bc[6]; /* Bus Converter routing info to a specific */
484 /* I/O adaptor (< 0 means none, > 63 resvd) */
485 char mod; /* fixed field of specified module */
486};
487
488/*
489 * Device path specifications used by PDC.
490 */
491struct pdc_module_path {
492 struct hardware_path path;
493 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
494};
495
496#ifndef CONFIG_PA20
497/* Only used on some pre-PA2.0 boxes */
498struct pdc_memory_map { /* PDC_MEMORY_MAP */
499 unsigned long hpa; /* mod's register set address */
500 unsigned long more_pgs; /* number of additional I/O pgs */
501};
502#endif
503
504struct pdc_tod {
505 unsigned long tod_sec;
506 unsigned long tod_usec;
507};
508
509/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
510
511struct pdc_hpmc_pim_11 { /* PDC_PIM */
512 __u32 gr[32];
513 __u32 cr[32];
514 __u32 sr[8];
515 __u32 iasq_back;
516 __u32 iaoq_back;
517 __u32 check_type;
518 __u32 cpu_state;
519 __u32 rsvd1;
520 __u32 cache_check;
521 __u32 tlb_check;
522 __u32 bus_check;
523 __u32 assists_check;
524 __u32 rsvd2;
525 __u32 assist_state;
526 __u32 responder_addr;
527 __u32 requestor_addr;
528 __u32 path_info;
529 __u64 fr[32];
530};
531
532/*
533 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
534 *
535 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
536 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
537 *
538 * Note also that there are unarchitected results available, which
539 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
540 * the firmware is probably the best way of printing hversion dependent
541 * data.
542 */
543
544struct pdc_hpmc_pim_20 { /* PDC_PIM */
545 __u64 gr[32];
546 __u64 cr[32];
547 __u64 sr[8];
548 __u64 iasq_back;
549 __u64 iaoq_back;
550 __u32 check_type;
551 __u32 cpu_state;
552 __u32 cache_check;
553 __u32 tlb_check;
554 __u32 bus_check;
555 __u32 assists_check;
556 __u32 assist_state;
557 __u32 path_info;
558 __u64 responder_addr;
559 __u64 requestor_addr;
560 __u64 fr[32];
561};
562
563#endif /* __ASSEMBLY__ */
564
565/* flags of the device_path (see below) */
566#define PF_AUTOBOOT 0x80
567#define PF_AUTOSEARCH 0x40
568#define PF_TIMER 0x0F
569
570#ifndef __ASSEMBLY__
571
572struct device_path { /* page 1-69 */
573 unsigned char flags; /* flags see above! */
574 unsigned char bc[6]; /* bus converter routing info */
575 unsigned char mod;
576 unsigned int layers[6];/* device-specific layer-info */
577} __attribute__((aligned(8))) ;
578
579struct pz_device {
580 struct device_path dp; /* see above */
581 /* struct iomod *hpa; */
582 unsigned int hpa; /* HPA base address */
583 /* char *spa; */
584 unsigned int spa; /* SPA base address */
585 /* int (*iodc_io)(struct iomod*, ...); */
586 unsigned int iodc_io; /* device entry point */
587 short pad; /* reserved */
588 unsigned short cl_class;/* see below */
589} __attribute__((aligned(8))) ;
590
591#endif /* __ASSEMBLY__ */
592
593/* cl_class
594 * page 3-33 of IO-Firmware ARS
595 * IODC ENTRY_INIT(Search first) RET[1]
596 */
597#define CL_NULL 0 /* invalid */
598#define CL_RANDOM 1 /* random access (as disk) */
599#define CL_SEQU 2 /* sequential access (as tape) */
600#define CL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */
601#define CL_KEYBD 8 /* half-duplex console (HIL Keyboard) */
602#define CL_DISPL 9 /* half-duplex console (display) */
603#define CL_FC 10 /* FiberChannel access media */
604
605#if 0
606/* FIXME: DEVCLASS_* duplicates CL_* (above). Delete DEVCLASS_*? */
607#define DEVCLASS_RANDOM 1
608#define DEVCLASS_SEQU 2
609#define DEVCLASS_DUPLEX 7
610#define DEVCLASS_KEYBD 8
611#define DEVCLASS_DISP 9
612#endif
613
614/* IODC ENTRY_INIT() */
615#define ENTRY_INIT_SRCH_FRST 2
616#define ENTRY_INIT_SRCH_NEXT 3
617#define ENTRY_INIT_MOD_DEV 4
618#define ENTRY_INIT_DEV 5
619#define ENTRY_INIT_MOD 6
620#define ENTRY_INIT_MSG 9
621
622/* IODC ENTRY_IO() */
623#define ENTRY_IO_BOOTIN 0
624#define ENTRY_IO_BOOTOUT 1
625#define ENTRY_IO_CIN 2
626#define ENTRY_IO_COUT 3
627#define ENTRY_IO_CLOSE 4
628#define ENTRY_IO_GETMSG 9
629#define ENTRY_IO_BBLOCK_IN 16
630#define ENTRY_IO_BBLOCK_OUT 17
631
632/* IODC ENTRY_SPA() */
633
634/* IODC ENTRY_CONFIG() */
635
636/* IODC ENTRY_TEST() */
637
638/* IODC ENTRY_TLB() */
639
640
641/* DEFINITION OF THE ZERO-PAGE (PAG0) */
642/* based on work by Jason Eckhardt (jason@equator.com) */
643
644#ifndef __ASSEMBLY__
645
646#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
647
648struct zeropage {
649 /* [0x000] initialize vectors (VEC) */
650 unsigned int vec_special; /* must be zero */
651 /* int (*vec_pow_fail)(void);*/
652 unsigned int vec_pow_fail; /* power failure handler */
653 /* int (*vec_toc)(void); */
654 unsigned int vec_toc;
655 unsigned int vec_toclen;
656 /* int (*vec_rendz)(void); */
657 unsigned int vec_rendz;
658 int vec_pow_fail_flen;
659 int vec_pad[10];
660
661 /* [0x040] reserved processor dependent */
662 int pad0[112];
663
664 /* [0x200] reserved */
665 int pad1[84];
666
667 /* [0x350] memory configuration (MC) */
668 int memc_cont; /* contiguous mem size (bytes) */
669 int memc_phsize; /* physical memory size */
670 int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */
671 unsigned int mem_pdc_hi; /* used for 64-bit */
672
673 /* [0x360] various parameters for the boot-CPU */
674 /* unsigned int *mem_booterr[8]; */
675 unsigned int mem_booterr[8]; /* ptr to boot errors */
676 unsigned int mem_free; /* first location, where OS can be loaded */
677 /* struct iomod *mem_hpa; */
678 unsigned int mem_hpa; /* HPA of the boot-CPU */
679 /* int (*mem_pdc)(int, ...); */
680 unsigned int mem_pdc; /* PDC entry point */
681 unsigned int mem_10msec; /* number of clock ticks in 10msec */
682
683 /* [0x390] initial memory module (IMM) */
684 /* struct iomod *imm_hpa; */
685 unsigned int imm_hpa; /* HPA of the IMM */
686 int imm_soft_boot; /* 0 = was hard boot, 1 = was soft boot */
687 unsigned int imm_spa_size; /* SPA size of the IMM in bytes */
688 unsigned int imm_max_mem; /* bytes of mem in IMM */
689
690 /* [0x3A0] boot console, display device and keyboard */
691 struct pz_device mem_cons; /* description of console device */
692 struct pz_device mem_boot; /* description of boot device */
693 struct pz_device mem_kbd; /* description of keyboard device */
694
695 /* [0x430] reserved */
696 int pad430[116];
697
698 /* [0x600] processor dependent */
699 __u32 pad600[1];
700 __u32 proc_sti; /* pointer to STI ROM */
701 __u32 pad608[126];
702};
703
704#endif /* __ASSEMBLY__ */
705
706/* Page Zero constant offsets used by the HPMC handler */
707
708#define BOOT_CONSOLE_HPA_OFFSET 0x3c0
709#define BOOT_CONSOLE_SPA_OFFSET 0x3c4
710#define BOOT_CONSOLE_PATH_OFFSET 0x3a8
711
712#ifndef __ASSEMBLY__
713void pdc_console_init(void); /* in pdc_console.c */
714void pdc_console_restart(void);
715
716void setup_pdc(void); /* in inventory.c */
717
718/* wrapper-functions from pdc.c */
719
720int pdc_add_valid(unsigned long address);
721int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
722int pdc_chassis_disp(unsigned long disp);
723int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
724int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
725 void *iodc_data, unsigned int iodc_data_size);
726int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
727 struct pdc_module_path *mod_path, long mod_index);
728int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
729 long mod_index, long addr_index);
730int pdc_model_info(struct pdc_model *model);
731int pdc_model_sysmodel(char *name);
732int pdc_model_cpuid(unsigned long *cpu_id);
733int pdc_model_versions(unsigned long *versions, int id);
734int pdc_model_capabilities(unsigned long *capabilities);
735int pdc_cache_info(struct pdc_cache_info *cache);
736#ifndef CONFIG_PA20
737int pdc_btlb_info(struct pdc_btlb_info *btlb);
738int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
739#endif /* !CONFIG_PA20 */
740int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
741
742int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
743int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
744int pdc_stable_get_size(unsigned long *size);
745int pdc_stable_verify_contents(void);
746int pdc_stable_initialize(void);
747
748int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
749int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
750
751int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
752int pdc_tod_read(struct pdc_tod *tod);
753int pdc_tod_set(unsigned long sec, unsigned long usec);
754
755#ifdef __LP64__
756int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
757 struct pdc_memory_table *tbl, unsigned long entries);
758#endif
759
760void set_firmware_width(void);
761int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
762int pdc_do_reset(void);
763int pdc_soft_power_info(unsigned long *power_reg);
764int pdc_soft_power_button(int sw_control);
765void pdc_io_reset(void);
766void pdc_io_reset_devices(void);
767int pdc_iodc_getc(void);
768void pdc_iodc_putc(unsigned char c);
769void pdc_iodc_outc(unsigned char c);
770void pdc_printf(const char *fmt, ...);
771
772void pdc_emergency_unlock(void);
773int pdc_sti_call(unsigned long func, unsigned long flags,
774 unsigned long inptr, unsigned long outputr,
775 unsigned long glob_cfg);
776
777extern void pdc_init(void);
778
779#endif /* __ASSEMBLY__ */
780
781#endif /* _PARISC_PDC_H */
diff --git a/include/asm-parisc/pdc_chassis.h b/include/asm-parisc/pdc_chassis.h
new file mode 100644
index 000000000000..adac9ac2743f
--- /dev/null
+++ b/include/asm-parisc/pdc_chassis.h
@@ -0,0 +1,382 @@
1/*
2 * include/asm-parisc/pdc_chassis.h
3 *
4 * Copyright (C) 2002 Laurent Canet <canetl@esiee.fr>
5 * Copyright (C) 2002 Thibaut Varene <varenet@parisc-linux.org>
6 *
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * TODO: - handle processor number on SMP systems (Reporting Entity ID)
23 * - handle message ID
24 * - handle timestamps
25 */
26
27
28#ifndef _PARISC_PDC_CHASSIS_H
29#define _PARISC_PDC_CHASSIS_H
30
31/*
32 * ----------
33 * Prototypes
34 * ----------
35 */
36
37int pdc_chassis_send_status(int message);
38void parisc_pdc_chassis_init(void);
39
40
41/*
42 * -----------------
43 * Direct call names
44 * -----------------
45 * They setup everything for you, the Log message and the corresponding LED state
46 */
47
48#define PDC_CHASSIS_DIRECT_BSTART 0
49#define PDC_CHASSIS_DIRECT_BCOMPLETE 1
50#define PDC_CHASSIS_DIRECT_SHUTDOWN 2
51#define PDC_CHASSIS_DIRECT_PANIC 3
52#define PDC_CHASSIS_DIRECT_HPMC 4
53#define PDC_CHASSIS_DIRECT_LPMC 5
54#define PDC_CHASSIS_DIRECT_DUMP 6 /* not yet implemented */
55#define PDC_CHASSIS_DIRECT_OOPS 7 /* not yet implemented */
56
57
58/*
59 * ------------
60 * LEDs control
61 * ------------
62 * Set the three LEDs -- Run, Attn, and Fault.
63 */
64
65/* Old PDC LED control */
66#define PDC_CHASSIS_DISP_DATA(v) ((unsigned long)(v) << 17)
67
68/*
69 * Available PDC PAT LED states
70 */
71
72#define PDC_CHASSIS_LED_RUN_OFF (0ULL << 4)
73#define PDC_CHASSIS_LED_RUN_FLASH (1ULL << 4)
74#define PDC_CHASSIS_LED_RUN_ON (2ULL << 4)
75#define PDC_CHASSIS_LED_RUN_NC (3ULL << 4)
76#define PDC_CHASSIS_LED_ATTN_OFF (0ULL << 6)
77#define PDC_CHASSIS_LED_ATTN_FLASH (1ULL << 6)
78#define PDC_CHASSIS_LED_ATTN_NC (3ULL << 6) /* ATTN ON is invalid */
79#define PDC_CHASSIS_LED_FAULT_OFF (0ULL << 8)
80#define PDC_CHASSIS_LED_FAULT_FLASH (1ULL << 8)
81#define PDC_CHASSIS_LED_FAULT_ON (2ULL << 8)
82#define PDC_CHASSIS_LED_FAULT_NC (3ULL << 8)
83#define PDC_CHASSIS_LED_VALID (1ULL << 10)
84
85/*
86 * Valid PDC PAT LED states combinations
87 */
88
89/* System running normally */
90#define PDC_CHASSIS_LSTATE_RUN_NORMAL (PDC_CHASSIS_LED_RUN_ON | \
91 PDC_CHASSIS_LED_ATTN_OFF | \
92 PDC_CHASSIS_LED_FAULT_OFF | \
93 PDC_CHASSIS_LED_VALID )
94/* System crashed and rebooted itself successfully */
95#define PDC_CHASSIS_LSTATE_RUN_CRASHREC (PDC_CHASSIS_LED_RUN_ON | \
96 PDC_CHASSIS_LED_ATTN_OFF | \
97 PDC_CHASSIS_LED_FAULT_FLASH | \
98 PDC_CHASSIS_LED_VALID )
99/* There was a system interruption that did not take the system down */
100#define PDC_CHASSIS_LSTATE_RUN_SYSINT (PDC_CHASSIS_LED_RUN_ON | \
101 PDC_CHASSIS_LED_ATTN_FLASH | \
102 PDC_CHASSIS_LED_FAULT_OFF | \
103 PDC_CHASSIS_LED_VALID )
104/* System running and unexpected reboot or non-critical error detected */
105#define PDC_CHASSIS_LSTATE_RUN_NCRIT (PDC_CHASSIS_LED_RUN_ON | \
106 PDC_CHASSIS_LED_ATTN_FLASH | \
107 PDC_CHASSIS_LED_FAULT_FLASH | \
108 PDC_CHASSIS_LED_VALID )
109/* Executing non-OS code */
110#define PDC_CHASSIS_LSTATE_NONOS (PDC_CHASSIS_LED_RUN_FLASH | \
111 PDC_CHASSIS_LED_ATTN_OFF | \
112 PDC_CHASSIS_LED_FAULT_OFF | \
113 PDC_CHASSIS_LED_VALID )
114/* Boot failed - Executing non-OS code */
115#define PDC_CHASSIS_LSTATE_NONOS_BFAIL (PDC_CHASSIS_LED_RUN_FLASH | \
116 PDC_CHASSIS_LED_ATTN_OFF | \
117 PDC_CHASSIS_LED_FAULT_ON | \
118 PDC_CHASSIS_LED_VALID )
119/* Unexpected reboot occurred - Executing non-OS code */
120#define PDC_CHASSIS_LSTATE_NONOS_UNEXP (PDC_CHASSIS_LED_RUN_FLASH | \
121 PDC_CHASSIS_LED_ATTN_OFF | \
122 PDC_CHASSIS_LED_FAULT_FLASH | \
123 PDC_CHASSIS_LED_VALID )
124/* Executing non-OS code - Non-critical error detected */
125#define PDC_CHASSIS_LSTATE_NONOS_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
126 PDC_CHASSIS_LED_ATTN_FLASH | \
127 PDC_CHASSIS_LED_FAULT_OFF | \
128 PDC_CHASSIS_LED_VALID )
129/* Boot failed - Executing non-OS code - Non-critical error detected */
130#define PDC_CHASSIS_LSTATE_BFAIL_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
131 PDC_CHASSIS_LED_ATTN_FLASH | \
132 PDC_CHASSIS_LED_FAULT_ON | \
133 PDC_CHASSIS_LED_VALID )
134/* Unexpected reboot/recovering - Executing non-OS code - Non-critical error detected */
135#define PDC_CHASSIS_LSTATE_UNEXP_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
136 PDC_CHASSIS_LED_ATTN_FLASH | \
137 PDC_CHASSIS_LED_FAULT_FLASH | \
138 PDC_CHASSIS_LED_VALID )
139/* Cannot execute PDC */
140#define PDC_CHASSIS_LSTATE_CANNOT_PDC (PDC_CHASSIS_LED_RUN_OFF | \
141 PDC_CHASSIS_LED_ATTN_OFF | \
142 PDC_CHASSIS_LED_FAULT_OFF | \
143 PDC_CHASSIS_LED_VALID )
144/* Boot failed - OS not up - PDC has detected a failure that prevents boot */
145#define PDC_CHASSIS_LSTATE_FATAL_BFAIL (PDC_CHASSIS_LED_RUN_OFF | \
146 PDC_CHASSIS_LED_ATTN_OFF | \
147 PDC_CHASSIS_LED_FAULT_ON | \
148 PDC_CHASSIS_LED_VALID )
149/* No code running - Non-critical error detected (double fault situation) */
150#define PDC_CHASSIS_LSTATE_NOCODE_NCRIT (PDC_CHASSIS_LED_RUN_OFF | \
151 PDC_CHASSIS_LED_ATTN_FLASH | \
152 PDC_CHASSIS_LED_FAULT_OFF | \
153 PDC_CHASSIS_LED_VALID )
154/* Boot failed - OS not up - Fatal failure detected - Non-critical error detected */
155#define PDC_CHASSIS_LSTATE_FATAL_NCRIT (PDC_CHASSIS_LED_RUN_OFF | \
156 PDC_CHASSIS_LED_ATTN_FLASH | \
157 PDC_CHASSIS_LED_FAULT_ON | \
158 PDC_CHASSIS_LED_VALID )
159/* All other states are invalid */
160
161
162/*
163 * --------------
164 * PDC Log events
165 * --------------
166 * Here follows bits needed to fill up the log event sent to PDC_CHASSIS
167 * The log message contains: Alert level, Source, Source detail,
168 * Source ID, Problem detail, Caller activity, Activity status,
169 * Caller subactivity, Reporting entity type, Reporting entity ID,
170 * Data type, Unique message ID and EOM.
171 */
172
173/* Alert level */
174#define PDC_CHASSIS_ALERT_FORWARD (0ULL << 36) /* no failure detected */
175#define PDC_CHASSIS_ALERT_SERPROC (1ULL << 36) /* service proc - no failure */
176#define PDC_CHASSIS_ALERT_NURGENT (2ULL << 36) /* non-urgent operator attn */
177#define PDC_CHASSIS_ALERT_BLOCKED (3ULL << 36) /* system blocked */
178#define PDC_CHASSIS_ALERT_CONF_CHG (4ULL << 36) /* unexpected configuration change */
179#define PDC_CHASSIS_ALERT_ENV_PB (5ULL << 36) /* boot possible, environmental pb */
180#define PDC_CHASSIS_ALERT_PENDING (6ULL << 36) /* boot possible, pending failure */
181#define PDC_CHASSIS_ALERT_PERF_IMP (8ULL << 36) /* boot possible, performance impaired */
182#define PDC_CHASSIS_ALERT_FUNC_IMP (10ULL << 36) /* boot possible, functionality impaired */
183#define PDC_CHASSIS_ALERT_SOFT_FAIL (12ULL << 36) /* software failure */
184#define PDC_CHASSIS_ALERT_HANG (13ULL << 36) /* system hang */
185#define PDC_CHASSIS_ALERT_ENV_FATAL (14ULL << 36) /* fatal power or environmental pb */
186#define PDC_CHASSIS_ALERT_HW_FATAL (15ULL << 36) /* fatal hardware problem */
187
188/* Source */
189#define PDC_CHASSIS_SRC_NONE (0ULL << 28) /* unknown, no source stated */
190#define PDC_CHASSIS_SRC_PROC (1ULL << 28) /* processor */
191/* For later use ? */
192#define PDC_CHASSIS_SRC_PROC_CACHE (2ULL << 28) /* processor cache*/
193#define PDC_CHASSIS_SRC_PDH (3ULL << 28) /* processor dependent hardware */
194#define PDC_CHASSIS_SRC_PWR (4ULL << 28) /* power */
195#define PDC_CHASSIS_SRC_FAB (5ULL << 28) /* fabric connector */
196#define PDC_CHASSIS_SRC_PLATi (6ULL << 28) /* platform */
197#define PDC_CHASSIS_SRC_MEM (7ULL << 28) /* memory */
198#define PDC_CHASSIS_SRC_IO (8ULL << 28) /* I/O */
199#define PDC_CHASSIS_SRC_CELL (9ULL << 28) /* cell */
200#define PDC_CHASSIS_SRC_PD (10ULL << 28) /* protected domain */
201
202/* Source detail field */
203#define PDC_CHASSIS_SRC_D_PROC (1ULL << 24) /* processor general */
204
205/* Source ID - platform dependent */
206#define PDC_CHASSIS_SRC_ID_UNSPEC (0ULL << 16)
207
208/* Problem detail - problem source dependent */
209#define PDC_CHASSIS_PB_D_PROC_NONE (0ULL << 32) /* no problem detail */
210#define PDC_CHASSIS_PB_D_PROC_TIMEOUT (4ULL << 32) /* timeout */
211
212/* Caller activity */
213#define PDC_CHASSIS_CALL_ACT_HPUX_BL (7ULL << 12) /* Boot Loader */
214#define PDC_CHASSIS_CALL_ACT_HPUX_PD (8ULL << 12) /* SAL_PD activities */
215#define PDC_CHASSIS_CALL_ACT_HPUX_EVENT (9ULL << 12) /* SAL_EVENTS activities */
216#define PDC_CHASSIS_CALL_ACT_HPUX_IO (10ULL << 12) /* SAL_IO activities */
217#define PDC_CHASSIS_CALL_ACT_HPUX_PANIC (11ULL << 12) /* System panic */
218#define PDC_CHASSIS_CALL_ACT_HPUX_INIT (12ULL << 12) /* System initialization */
219#define PDC_CHASSIS_CALL_ACT_HPUX_SHUT (13ULL << 12) /* System shutdown */
220#define PDC_CHASSIS_CALL_ACT_HPUX_WARN (14ULL << 12) /* System warning */
221#define PDC_CHASSIS_CALL_ACT_HPUX_DU (15ULL << 12) /* Display_Activity() update */
222
223/* Activity status - implementation dependent */
224#define PDC_CHASSIS_ACT_STATUS_UNSPEC (0ULL << 0)
225
226/* Caller subactivity - implementation dependent */
227/* FIXME: other subactivities ? */
228#define PDC_CHASSIS_CALL_SACT_UNSPEC (0ULL << 4) /* implementation dependent */
229
230/* Reporting entity type */
231#define PDC_CHASSIS_RET_GENERICOS (12ULL << 52) /* generic OSes */
232#define PDC_CHASSIS_RET_IA64_NT (13ULL << 52) /* IA-64 NT */
233#define PDC_CHASSIS_RET_HPUX (14ULL << 52) /* HP-UX */
234#define PDC_CHASSIS_RET_DIAG (15ULL << 52) /* offline diagnostics & utilities */
235
236/* Reporting entity ID */
237#define PDC_CHASSIS_REID_UNSPEC (0ULL << 44)
238
239/* Data type */
240#define PDC_CHASSIS_DT_NONE (0ULL << 59) /* data field unused */
241/* For later use ? Do we need these ? */
242#define PDC_CHASSIS_DT_PHYS_ADDR (1ULL << 59) /* physical address */
243#define PDC_CHASSIS_DT_DATA_EXPECT (2ULL << 59) /* expected data */
244#define PDC_CHASSIS_DT_ACTUAL (3ULL << 59) /* actual data */
245#define PDC_CHASSIS_DT_PHYS_LOC (4ULL << 59) /* physical location */
246#define PDC_CHASSIS_DT_PHYS_LOC_EXT (5ULL << 59) /* physical location extension */
247#define PDC_CHASSIS_DT_TAG (6ULL << 59) /* tag */
248#define PDC_CHASSIS_DT_SYNDROME (7ULL << 59) /* syndrome */
249#define PDC_CHASSIS_DT_CODE_ADDR (8ULL << 59) /* code address */
250#define PDC_CHASSIS_DT_ASCII_MSG (9ULL << 59) /* ascii message */
251#define PDC_CHASSIS_DT_POST (10ULL << 59) /* POST code */
252#define PDC_CHASSIS_DT_TIMESTAMP (11ULL << 59) /* timestamp */
253#define PDC_CHASSIS_DT_DEV_STAT (12ULL << 59) /* device status */
254#define PDC_CHASSIS_DT_DEV_TYPE (13ULL << 59) /* device type */
255#define PDC_CHASSIS_DT_PB_DET (14ULL << 59) /* problem detail */
256#define PDC_CHASSIS_DT_ACT_LEV (15ULL << 59) /* activity level/timeout */
257#define PDC_CHASSIS_DT_SER_NUM (16ULL << 59) /* serial number */
258#define PDC_CHASSIS_DT_REV_NUM (17ULL << 59) /* revision number */
259#define PDC_CHASSIS_DT_INTERRUPT (18ULL << 59) /* interruption information */
260#define PDC_CHASSIS_DT_TEST_NUM (19ULL << 59) /* test number */
261#define PDC_CHASSIS_DT_STATE_CHG (20ULL << 59) /* major changes in system state */
262#define PDC_CHASSIS_DT_PROC_DEALLOC (21ULL << 59) /* processor deallocate */
263#define PDC_CHASSIS_DT_RESET (30ULL << 59) /* reset type and cause */
264#define PDC_CHASSIS_DT_PA_LEGACY (31ULL << 59) /* legacy PA hex chassis code */
265
266/* System states - part of major changes in system state data field */
267#define PDC_CHASSIS_SYSTATE_BSTART (0ULL << 0) /* boot start */
268#define PDC_CHASSIS_SYSTATE_BCOMP (1ULL << 0) /* boot complete */
269#define PDC_CHASSIS_SYSTATE_CHANGE (2ULL << 0) /* major change */
270#define PDC_CHASSIS_SYSTATE_LED (3ULL << 0) /* LED change */
271#define PDC_CHASSIS_SYSTATE_PANIC (9ULL << 0) /* OS Panic */
272#define PDC_CHASSIS_SYSTATE_DUMP (10ULL << 0) /* memory dump */
273#define PDC_CHASSIS_SYSTATE_HPMC (11ULL << 0) /* processing HPMC */
274#define PDC_CHASSIS_SYSTATE_HALT (15ULL << 0) /* system halted */
275
276/* Message ID */
277#define PDC_CHASSIS_MSG_ID (0ULL << 40) /* we do not handle msg IDs atm */
278
279/* EOM - separates log entries */
280#define PDC_CHASSIS_EOM_CLEAR (0ULL << 43)
281#define PDC_CHASSIS_EOM_SET (1ULL << 43)
282
283/*
284 * Preformated well known messages
285 */
286
287/* Boot started */
288#define PDC_CHASSIS_PMSG_BSTART (PDC_CHASSIS_ALERT_SERPROC | \
289 PDC_CHASSIS_SRC_PROC | \
290 PDC_CHASSIS_SRC_D_PROC | \
291 PDC_CHASSIS_SRC_ID_UNSPEC | \
292 PDC_CHASSIS_PB_D_PROC_NONE | \
293 PDC_CHASSIS_CALL_ACT_HPUX_INIT | \
294 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
295 PDC_CHASSIS_CALL_SACT_UNSPEC | \
296 PDC_CHASSIS_RET_HPUX | \
297 PDC_CHASSIS_REID_UNSPEC | \
298 PDC_CHASSIS_DT_STATE_CHG | \
299 PDC_CHASSIS_SYSTATE_BSTART | \
300 PDC_CHASSIS_MSG_ID | \
301 PDC_CHASSIS_EOM_SET )
302
303/* Boot complete */
304#define PDC_CHASSIS_PMSG_BCOMPLETE (PDC_CHASSIS_ALERT_SERPROC | \
305 PDC_CHASSIS_SRC_PROC | \
306 PDC_CHASSIS_SRC_D_PROC | \
307 PDC_CHASSIS_SRC_ID_UNSPEC | \
308 PDC_CHASSIS_PB_D_PROC_NONE | \
309 PDC_CHASSIS_CALL_ACT_HPUX_INIT | \
310 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
311 PDC_CHASSIS_CALL_SACT_UNSPEC | \
312 PDC_CHASSIS_RET_HPUX | \
313 PDC_CHASSIS_REID_UNSPEC | \
314 PDC_CHASSIS_DT_STATE_CHG | \
315 PDC_CHASSIS_SYSTATE_BCOMP | \
316 PDC_CHASSIS_MSG_ID | \
317 PDC_CHASSIS_EOM_SET )
318
319/* Shutdown */
320#define PDC_CHASSIS_PMSG_SHUTDOWN (PDC_CHASSIS_ALERT_SERPROC | \
321 PDC_CHASSIS_SRC_PROC | \
322 PDC_CHASSIS_SRC_D_PROC | \
323 PDC_CHASSIS_SRC_ID_UNSPEC | \
324 PDC_CHASSIS_PB_D_PROC_NONE | \
325 PDC_CHASSIS_CALL_ACT_HPUX_SHUT | \
326 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
327 PDC_CHASSIS_CALL_SACT_UNSPEC | \
328 PDC_CHASSIS_RET_HPUX | \
329 PDC_CHASSIS_REID_UNSPEC | \
330 PDC_CHASSIS_DT_STATE_CHG | \
331 PDC_CHASSIS_SYSTATE_HALT | \
332 PDC_CHASSIS_MSG_ID | \
333 PDC_CHASSIS_EOM_SET )
334
335/* Panic */
336#define PDC_CHASSIS_PMSG_PANIC (PDC_CHASSIS_ALERT_SOFT_FAIL | \
337 PDC_CHASSIS_SRC_PROC | \
338 PDC_CHASSIS_SRC_D_PROC | \
339 PDC_CHASSIS_SRC_ID_UNSPEC | \
340 PDC_CHASSIS_PB_D_PROC_NONE | \
341 PDC_CHASSIS_CALL_ACT_HPUX_PANIC| \
342 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
343 PDC_CHASSIS_CALL_SACT_UNSPEC | \
344 PDC_CHASSIS_RET_HPUX | \
345 PDC_CHASSIS_REID_UNSPEC | \
346 PDC_CHASSIS_DT_STATE_CHG | \
347 PDC_CHASSIS_SYSTATE_PANIC | \
348 PDC_CHASSIS_MSG_ID | \
349 PDC_CHASSIS_EOM_SET )
350
351// FIXME: extrapolated data
352/* HPMC */
353#define PDC_CHASSIS_PMSG_HPMC (PDC_CHASSIS_ALERT_CONF_CHG /*?*/ | \
354 PDC_CHASSIS_SRC_PROC | \
355 PDC_CHASSIS_SRC_D_PROC | \
356 PDC_CHASSIS_SRC_ID_UNSPEC | \
357 PDC_CHASSIS_PB_D_PROC_NONE | \
358 PDC_CHASSIS_CALL_ACT_HPUX_WARN | \
359 PDC_CHASSIS_RET_HPUX | \
360 PDC_CHASSIS_DT_STATE_CHG | \
361 PDC_CHASSIS_SYSTATE_HPMC | \
362 PDC_CHASSIS_MSG_ID | \
363 PDC_CHASSIS_EOM_SET )
364
365/* LPMC */
366#define PDC_CHASSIS_PMSG_LPMC (PDC_CHASSIS_ALERT_BLOCKED /*?*/| \
367 PDC_CHASSIS_SRC_PROC | \
368 PDC_CHASSIS_SRC_D_PROC | \
369 PDC_CHASSIS_SRC_ID_UNSPEC | \
370 PDC_CHASSIS_PB_D_PROC_NONE | \
371 PDC_CHASSIS_CALL_ACT_HPUX_WARN | \
372 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
373 PDC_CHASSIS_CALL_SACT_UNSPEC | \
374 PDC_CHASSIS_RET_HPUX | \
375 PDC_CHASSIS_REID_UNSPEC | \
376 PDC_CHASSIS_DT_STATE_CHG | \
377 PDC_CHASSIS_SYSTATE_CHANGE | \
378 PDC_CHASSIS_MSG_ID | \
379 PDC_CHASSIS_EOM_SET )
380
381#endif /* _PARISC_PDC_CHASSIS_H */
382/* vim: set ts=8 */
diff --git a/include/asm-parisc/pdcpat.h b/include/asm-parisc/pdcpat.h
new file mode 100644
index 000000000000..b4b34c0e8c1a
--- /dev/null
+++ b/include/asm-parisc/pdcpat.h
@@ -0,0 +1,337 @@
1#ifndef __PARISC_PATPDC_H
2#define __PARISC_PATPDC_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright 2000 (c) Hewlett Packard (Paul Bame <bame()spam.parisc-linux.org>)
10 * Copyright 2000,2004 (c) Grant Grundler <grundler()nahspam.parisc-linux.org>
11 */
12
13
14#define PDC_PAT_CELL 64L /* Interface for gaining and
15 * manipulatin g cell state within PD */
16#define PDC_PAT_CELL_GET_NUMBER 0L /* Return Cell number */
17#define PDC_PAT_CELL_GET_INFO 1L /* Returns info about Cell */
18#define PDC_PAT_CELL_MODULE 2L /* Returns info about Module */
19#define PDC_PAT_CELL_SET_ATTENTION 9L /* Set Cell Attention indicator */
20#define PDC_PAT_CELL_NUMBER_TO_LOC 10L /* Cell Number -> Location */
21#define PDC_PAT_CELL_WALK_FABRIC 11L /* Walk the Fabric */
22#define PDC_PAT_CELL_GET_RDT_SIZE 12L /* Return Route Distance Table Sizes */
23#define PDC_PAT_CELL_GET_RDT 13L /* Return Route Distance Tables */
24#define PDC_PAT_CELL_GET_LOCAL_PDH_SZ 14L /* Read Local PDH Buffer Size */
25#define PDC_PAT_CELL_SET_LOCAL_PDH 15L /* Write Local PDH Buffer */
26#define PDC_PAT_CELL_GET_REMOTE_PDH_SZ 16L /* Return Remote PDH Buffer Size */
27#define PDC_PAT_CELL_GET_REMOTE_PDH 17L /* Read Remote PDH Buffer */
28#define PDC_PAT_CELL_GET_DBG_INFO 128L /* Return DBG Buffer Info */
29#define PDC_PAT_CELL_CHANGE_ALIAS 129L /* Change Non-Equivalent Alias Chacking */
30
31
32/*
33** Arg to PDC_PAT_CELL_MODULE memaddr[4]
34**
35** Addresses on the Merced Bus != all Runway Bus addresses.
36** This is intended for programming SBA/LBA chips range registers.
37*/
38#define IO_VIEW 0UL
39#define PA_VIEW 1UL
40
41/* PDC_PAT_CELL_MODULE entity type values */
42#define PAT_ENTITY_CA 0 /* central agent */
43#define PAT_ENTITY_PROC 1 /* processor */
44#define PAT_ENTITY_MEM 2 /* memory controller */
45#define PAT_ENTITY_SBA 3 /* system bus adapter */
46#define PAT_ENTITY_LBA 4 /* local bus adapter */
47#define PAT_ENTITY_PBC 5 /* processor bus converter */
48#define PAT_ENTITY_XBC 6 /* crossbar fabric connect */
49#define PAT_ENTITY_RC 7 /* fabric interconnect */
50
51/* PDC_PAT_CELL_MODULE address range type values */
52#define PAT_PBNUM 0 /* PCI Bus Number */
53#define PAT_LMMIO 1 /* < 4G MMIO Space */
54#define PAT_GMMIO 2 /* > 4G MMIO Space */
55#define PAT_NPIOP 3 /* Non Postable I/O Port Space */
56#define PAT_PIOP 4 /* Postable I/O Port Space */
57#define PAT_AHPA 5 /* Addional HPA Space */
58#define PAT_UFO 6 /* HPA Space (UFO for Mariposa) */
59#define PAT_GNIP 7 /* GNI Reserved Space */
60
61
62
63/* PDC PAT CHASSIS LOG -- Platform logging & forward progress functions */
64
65#define PDC_PAT_CHASSIS_LOG 65L
66#define PDC_PAT_CHASSIS_WRITE_LOG 0L /* Write Log Entry */
67#define PDC_PAT_CHASSIS_READ_LOG 1L /* Read Log Entry */
68
69
70/* PDC PAT CPU -- CPU configuration within the protection domain */
71
72#define PDC_PAT_CPU 67L
73#define PDC_PAT_CPU_INFO 0L /* Return CPU config info */
74#define PDC_PAT_CPU_DELETE 1L /* Delete CPU */
75#define PDC_PAT_CPU_ADD 2L /* Add CPU */
76#define PDC_PAT_CPU_GET_NUMBER 3L /* Return CPU Number */
77#define PDC_PAT_CPU_GET_HPA 4L /* Return CPU HPA */
78#define PDC_PAT_CPU_STOP 5L /* Stop CPU */
79#define PDC_PAT_CPU_RENDEZVOUS 6L /* Rendezvous CPU */
80#define PDC_PAT_CPU_GET_CLOCK_INFO 7L /* Return CPU Clock info */
81#define PDC_PAT_CPU_GET_RENDEZVOUS_STATE 8L /* Return Rendezvous State */
82#define PDC_PAT_CPU_PLUNGE_FABRIC 128L /* Plunge Fabric */
83#define PDC_PAT_CPU_UPDATE_CACHE_CLEANSING 129L /* Manipulate Cache
84 * Cleansing Mode */
85/* PDC PAT EVENT -- Platform Events */
86
87#define PDC_PAT_EVENT 68L
88#define PDC_PAT_EVENT_GET_CAPS 0L /* Get Capabilities */
89#define PDC_PAT_EVENT_SET_MODE 1L /* Set Notification Mode */
90#define PDC_PAT_EVENT_SCAN 2L /* Scan Event */
91#define PDC_PAT_EVENT_HANDLE 3L /* Handle Event */
92#define PDC_PAT_EVENT_GET_NB_CALL 4L /* Get Non-Blocking call Args */
93
94/* PDC PAT HPMC -- Cause processor to go into spin loop, and wait
95 * for wake up from Monarch Processor.
96 */
97
98#define PDC_PAT_HPMC 70L
99#define PDC_PAT_HPMC_RENDEZ_CPU 0L /* go into spin loop */
100#define PDC_PAT_HPMC_SET_PARAMS 1L /* Allows OS to specify intr which PDC
101 * will use to interrupt OS during
102 * machine check rendezvous */
103
104/* parameters for PDC_PAT_HPMC_SET_PARAMS: */
105#define HPMC_SET_PARAMS_INTR 1L /* Rendezvous Interrupt */
106#define HPMC_SET_PARAMS_WAKE 2L /* Wake up processor */
107
108
109/* PDC PAT IO -- On-line services for I/O modules */
110
111#define PDC_PAT_IO 71L
112#define PDC_PAT_IO_GET_SLOT_STATUS 5L /* Get Slot Status Info*/
113#define PDC_PAT_IO_GET_LOC_FROM_HARDWARE 6L /* Get Physical Location from */
114 /* Hardware Path */
115#define PDC_PAT_IO_GET_HARDWARE_FROM_LOC 7L /* Get Hardware Path from
116 * Physical Location */
117#define PDC_PAT_IO_GET_PCI_CONFIG_FROM_HW 11L /* Get PCI Configuration
118 * Address from Hardware Path */
119#define PDC_PAT_IO_GET_HW_FROM_PCI_CONFIG 12L /* Get Hardware Path
120 * from PCI Configuration Address */
121#define PDC_PAT_IO_READ_HOST_BRIDGE_INFO 13L /* Read Host Bridge State Info */
122#define PDC_PAT_IO_CLEAR_HOST_BRIDGE_INFO 14L /* Clear Host Bridge State Info*/
123#define PDC_PAT_IO_GET_PCI_ROUTING_TABLE_SIZE 15L /* Get PCI INT Routing Table
124 * Size */
125#define PDC_PAT_IO_GET_PCI_ROUTING_TABLE 16L /* Get PCI INT Routing Table */
126#define PDC_PAT_IO_GET_HINT_TABLE_SIZE 17L /* Get Hint Table Size */
127#define PDC_PAT_IO_GET_HINT_TABLE 18L /* Get Hint Table */
128#define PDC_PAT_IO_PCI_CONFIG_READ 19L /* PCI Config Read */
129#define PDC_PAT_IO_PCI_CONFIG_WRITE 20L /* PCI Config Write */
130#define PDC_PAT_IO_GET_NUM_IO_SLOTS 21L /* Get Number of I/O Bay Slots in
131 * Cabinet */
132#define PDC_PAT_IO_GET_LOC_IO_SLOTS 22L /* Get Physical Location of I/O */
133 /* Bay Slots in Cabinet */
134#define PDC_PAT_IO_BAY_STATUS_INFO 28L /* Get I/O Bay Slot Status Info */
135#define PDC_PAT_IO_GET_PROC_VIEW 29L /* Get Processor view of IO address */
136#define PDC_PAT_IO_PROG_SBA_DIR_RANGE 30L /* Program directed range */
137
138
139/* PDC PAT MEM -- Manage memory page deallocation */
140
141#define PDC_PAT_MEM 72L
142#define PDC_PAT_MEM_PD_INFO 0L /* Return PDT info for PD */
143#define PDC_PAT_MEM_PD_CLEAR 1L /* Clear PDT for PD */
144#define PDC_PAT_MEM_PD_READ 2L /* Read PDT entries for PD */
145#define PDC_PAT_MEM_PD_RESET 3L /* Reset clear bit for PD */
146#define PDC_PAT_MEM_CELL_INFO 5L /* Return PDT info For Cell */
147#define PDC_PAT_MEM_CELL_CLEAR 6L /* Clear PDT For Cell */
148#define PDC_PAT_MEM_CELL_READ 7L /* Read PDT entries For Cell */
149#define PDC_PAT_MEM_CELL_RESET 8L /* Reset clear bit For Cell */
150#define PDC_PAT_MEM_SETGM 9L /* Set Golden Memory value */
151#define PDC_PAT_MEM_ADD_PAGE 10L /* ADDs a page to the cell */
152#define PDC_PAT_MEM_ADDRESS 11L /* Get Physical Location From */
153 /* Memory Address */
154#define PDC_PAT_MEM_GET_TXT_SIZE 12L /* Get Formatted Text Size */
155#define PDC_PAT_MEM_GET_PD_TXT 13L /* Get PD Formatted Text */
156#define PDC_PAT_MEM_GET_CELL_TXT 14L /* Get Cell Formatted Text */
157#define PDC_PAT_MEM_RD_STATE_INFO 15L /* Read Mem Module State Info*/
158#define PDC_PAT_MEM_CLR_STATE_INFO 16L /*Clear Mem Module State Info*/
159#define PDC_PAT_MEM_CLEAN_RANGE 128L /*Clean Mem in specific range*/
160#define PDC_PAT_MEM_GET_TBL_SIZE 131L /* Get Memory Table Size */
161#define PDC_PAT_MEM_GET_TBL 132L /* Get Memory Table */
162
163
164/* PDC PAT NVOLATILE -- Access Non-Volatile Memory */
165
166#define PDC_PAT_NVOLATILE 73L
167#define PDC_PAT_NVOLATILE_READ 0L /* Read Non-Volatile Memory */
168#define PDC_PAT_NVOLATILE_WRITE 1L /* Write Non-Volatile Memory */
169#define PDC_PAT_NVOLATILE_GET_SIZE 2L /* Return size of NVM */
170#define PDC_PAT_NVOLATILE_VERIFY 3L /* Verify contents of NVM */
171#define PDC_PAT_NVOLATILE_INIT 4L /* Initialize NVM */
172
173/* PDC PAT PD */
174#define PDC_PAT_PD 74L /* Protection Domain Info */
175#define PDC_PAT_PD_GET_ADDR_MAP 0L /* Get Address Map */
176
177/* PDC_PAT_PD_GET_ADDR_MAP entry types */
178#define PAT_MEMORY_DESCRIPTOR 1
179
180/* PDC_PAT_PD_GET_ADDR_MAP memory types */
181#define PAT_MEMTYPE_MEMORY 0
182#define PAT_MEMTYPE_FIRMWARE 4
183
184/* PDC_PAT_PD_GET_ADDR_MAP memory usage */
185#define PAT_MEMUSE_GENERAL 0
186#define PAT_MEMUSE_GI 128
187#define PAT_MEMUSE_GNI 129
188
189
190#ifndef __ASSEMBLY__
191#include <linux/types.h>
192
193#ifdef CONFIG_64BIT
194#define is_pdc_pat() (PDC_TYPE_PAT == pdc_type)
195extern int pdc_pat_get_irt_size(unsigned long *num_entries, unsigned long cell_num);
196extern int pdc_pat_get_irt(void *r_addr, unsigned long cell_num);
197#else /* ! CONFIG_64BIT */
198/* No PAT support for 32-bit kernels...sorry */
199#define is_pdc_pat() (0)
200#define pdc_pat_get_irt_size(num_entries, cell_numn) PDC_BAD_PROC
201#define pdc_pat_get_irt(r_addr, cell_num) PDC_BAD_PROC
202#endif /* ! CONFIG_64BIT */
203
204
205struct pdc_pat_cell_num {
206 unsigned long cell_num;
207 unsigned long cell_loc;
208};
209
210struct pdc_pat_cpu_num {
211 unsigned long cpu_num;
212 unsigned long cpu_loc;
213};
214
215struct pdc_pat_pd_addr_map_entry {
216 unsigned char entry_type; /* 1 = Memory Descriptor Entry Type */
217 unsigned char reserve1[5];
218 unsigned char memory_type;
219 unsigned char memory_usage;
220 unsigned long paddr;
221 unsigned int pages; /* Length in 4K pages */
222 unsigned int reserve2;
223 unsigned long cell_map;
224};
225
226/********************************************************************
227* PDC_PAT_CELL[Return Cell Module] memaddr[0] conf_base_addr
228* ----------------------------------------------------------
229* Bit 0 to 51 - conf_base_addr
230* Bit 52 to 62 - reserved
231* Bit 63 - endianess bit
232********************************************************************/
233#define PAT_GET_CBA(value) ((value) & 0xfffffffffffff000UL)
234
235/********************************************************************
236* PDC_PAT_CELL[Return Cell Module] memaddr[1] mod_info
237* ----------------------------------------------------
238* Bit 0 to 7 - entity type
239* 0 = central agent, 1 = processor,
240* 2 = memory controller, 3 = system bus adapter,
241* 4 = local bus adapter, 5 = processor bus converter,
242* 6 = crossbar fabric connect, 7 = fabric interconnect,
243* 8 to 254 reserved, 255 = unknown.
244* Bit 8 to 15 - DVI
245* Bit 16 to 23 - IOC functions
246* Bit 24 to 39 - reserved
247* Bit 40 to 63 - mod_pages
248* number of 4K pages a module occupies starting at conf_base_addr
249********************************************************************/
250#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
251#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
252#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
253#define PAT_GET_MOD_PAGES(value)(((value) & 0xffffffUL)
254
255
256/*
257** PDC_PAT_CELL_GET_INFO return block
258*/
259typedef struct pdc_pat_cell_info_rtn_block {
260 unsigned long cpu_info;
261 unsigned long cell_info;
262 unsigned long cell_location;
263 unsigned long reo_location;
264 unsigned long mem_size;
265 unsigned long dimm_status;
266 unsigned long pdc_rev;
267 unsigned long fabric_info0;
268 unsigned long fabric_info1;
269 unsigned long fabric_info2;
270 unsigned long fabric_info3;
271 unsigned long reserved[21];
272} pdc_pat_cell_info_rtn_block_t;
273
274
275/* FIXME: mod[508] should really be a union of the various mod components */
276struct pdc_pat_cell_mod_maddr_block { /* PDC_PAT_CELL_MODULE */
277 unsigned long cba; /* func 0 cfg space address */
278 unsigned long mod_info; /* module information */
279 unsigned long mod_location; /* physical location of the module */
280 struct hardware_path mod_path; /* module path (device path - layers) */
281 unsigned long mod[508]; /* PAT cell module components */
282} __attribute__((aligned(8))) ;
283
284typedef struct pdc_pat_cell_mod_maddr_block pdc_pat_cell_mod_maddr_block_t;
285
286
287extern int pdc_pat_chassis_send_log(unsigned long status, unsigned long data);
288extern int pdc_pat_cell_get_number(struct pdc_pat_cell_num *cell_info);
289extern int pdc_pat_cell_module(unsigned long *actcnt, unsigned long ploc, unsigned long mod, unsigned long view_type, void *mem_addr);
290extern int pdc_pat_cell_num_to_loc(void *, unsigned long);
291
292extern int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, void *hpa);
293
294extern int pdc_pat_pd_get_addr_map(unsigned long *actual_len, void *mem_addr, unsigned long count, unsigned long offset);
295
296
297extern int pdc_pat_io_pci_cfg_read(unsigned long pci_addr, int pci_size, u32 *val);
298extern int pdc_pat_io_pci_cfg_write(unsigned long pci_addr, int pci_size, u32 val);
299
300
301/* Flag to indicate this is a PAT box...don't use this unless you
302** really have to...it might go away some day.
303*/
304extern int pdc_pat; /* arch/parisc/kernel/inventory.c */
305
306/********************************************************************
307* PDC_PAT_CELL[Return Cell Module] memaddr[0] conf_base_addr
308* ----------------------------------------------------------
309* Bit 0 to 51 - conf_base_addr
310* Bit 52 to 62 - reserved
311* Bit 63 - endianess bit
312********************************************************************/
313#define PAT_GET_CBA(value) ((value) & 0xfffffffffffff000UL)
314
315/********************************************************************
316* PDC_PAT_CELL[Return Cell Module] memaddr[1] mod_info
317* ----------------------------------------------------
318* Bit 0 to 7 - entity type
319* 0 = central agent, 1 = processor,
320* 2 = memory controller, 3 = system bus adapter,
321* 4 = local bus adapter, 5 = processor bus converter,
322* 6 = crossbar fabric connect, 7 = fabric interconnect,
323* 8 to 254 reserved, 255 = unknown.
324* Bit 8 to 15 - DVI
325* Bit 16 to 23 - IOC functions
326* Bit 24 to 39 - reserved
327* Bit 40 to 63 - mod_pages
328* number of 4K pages a module occupies starting at conf_base_addr
329********************************************************************/
330#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
331#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
332#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
333#define PAT_GET_MOD_PAGES(value)(((value) & 0xffffffUL)
334
335#endif /* __ASSEMBLY__ */
336
337#endif /* ! __PARISC_PATPDC_H */
diff --git a/include/asm-parisc/percpu.h b/include/asm-parisc/percpu.h
new file mode 100644
index 000000000000..a0dcd1970128
--- /dev/null
+++ b/include/asm-parisc/percpu.h
@@ -0,0 +1,7 @@
1#ifndef _PARISC_PERCPU_H
2#define _PARISC_PERCPU_H
3
4#include <asm-generic/percpu.h>
5
6#endif
7
diff --git a/include/asm-parisc/perf.h b/include/asm-parisc/perf.h
new file mode 100644
index 000000000000..a18e11972c09
--- /dev/null
+++ b/include/asm-parisc/perf.h
@@ -0,0 +1,74 @@
1#ifndef _ASM_PERF_H_
2#define _ASM_PERF_H_
3
4/* ioctls */
5#define PA_PERF_ON _IO('p', 1)
6#define PA_PERF_OFF _IOR('p', 2, unsigned int)
7#define PA_PERF_VERSION _IOR('p', 3, int)
8
9#define PA_PERF_DEV "perf"
10#define PA_PERF_MINOR 146
11
12/* Interface types */
13#define UNKNOWN_INTF 255
14#define ONYX_INTF 0
15#define CUDA_INTF 1
16
17/* Common Onyx and Cuda images */
18#define CPI 0
19#define BUSUTIL 1
20#define TLBMISS 2
21#define TLBHANDMISS 3
22#define PTKN 4
23#define PNTKN 5
24#define IMISS 6
25#define DMISS 7
26#define DMISS_ACCESS 8
27#define BIG_CPI 9
28#define BIG_LS 10
29#define BR_ABORT 11
30#define ISNT 12
31#define QUADRANT 13
32#define RW_PDFET 14
33#define RW_WDFET 15
34#define SHLIB_CPI 16
35
36/* Cuda only Images */
37#define FLOPS 17
38#define CACHEMISS 18
39#define BRANCHES 19
40#define CRSTACK 20
41#define I_CACHE_SPEC 21
42#define MAX_CUDA_IMAGES 22
43
44/* Onyx only Images */
45#define ADDR_INV_ABORT_ALU 17
46#define BRAD_STALL 18
47#define CNTL_IN_PIPEL 19
48#define DSNT_XFH 20
49#define FET_SIG1 21
50#define FET_SIG2 22
51#define G7_1 23
52#define G7_2 24
53#define G7_3 25
54#define G7_4 26
55#define MPB_LABORT 27
56#define PANIC 28
57#define RARE_INST 29
58#define RW_DFET 30
59#define RW_IFET 31
60#define RW_SDFET 32
61#define SPEC_IFET 33
62#define ST_COND0 34
63#define ST_COND1 35
64#define ST_COND2 36
65#define ST_COND3 37
66#define ST_COND4 38
67#define ST_UNPRED0 39
68#define ST_UNPRED1 40
69#define UNPRED 41
70#define GO_STORE 42
71#define SHLIB_CALL 43
72#define MAX_ONYX_IMAGES 44
73
74#endif
diff --git a/include/asm-parisc/pgalloc.h b/include/asm-parisc/pgalloc.h
new file mode 100644
index 000000000000..6291d6692e5d
--- /dev/null
+++ b/include/asm-parisc/pgalloc.h
@@ -0,0 +1,143 @@
1#ifndef _ASM_PGALLOC_H
2#define _ASM_PGALLOC_H
3
4#include <linux/gfp.h>
5#include <linux/mm.h>
6#include <linux/threads.h>
7#include <asm/processor.h>
8#include <asm/fixmap.h>
9
10#include <asm/cache.h>
11
12/* Allocate the top level pgd (page directory)
13 *
14 * Here (for 64 bit kernels) we implement a Hybrid L2/L3 scheme: we
15 * allocate the first pmd adjacent to the pgd. This means that we can
16 * subtract a constant offset to get to it. The pmd and pgd sizes are
17 * arranged so that a single pmd covers 4GB (giving a full LP64
18 * process access to 8TB) so our lookups are effectively L2 for the
19 * first 4GB of the kernel (i.e. for all ILP32 processes and all the
20 * kernel for machines with under 4GB of memory) */
21static inline pgd_t *pgd_alloc(struct mm_struct *mm)
22{
23 pgd_t *pgd = (pgd_t *)__get_free_pages(GFP_KERNEL,
24 PGD_ALLOC_ORDER);
25 pgd_t *actual_pgd = pgd;
26
27 if (likely(pgd != NULL)) {
28 memset(pgd, 0, PAGE_SIZE<<PGD_ALLOC_ORDER);
29#ifdef __LP64__
30 actual_pgd += PTRS_PER_PGD;
31 /* Populate first pmd with allocated memory. We mark it
32 * with PxD_FLAG_ATTACHED as a signal to the system that this
33 * pmd entry may not be cleared. */
34 __pgd_val_set(*actual_pgd, (PxD_FLAG_PRESENT |
35 PxD_FLAG_VALID |
36 PxD_FLAG_ATTACHED)
37 + (__u32)(__pa((unsigned long)pgd) >> PxD_VALUE_SHIFT));
38 /* The first pmd entry also is marked with _PAGE_GATEWAY as
39 * a signal that this pmd may not be freed */
40 __pgd_val_set(*pgd, PxD_FLAG_ATTACHED);
41#endif
42 }
43 return actual_pgd;
44}
45
46static inline void pgd_free(pgd_t *pgd)
47{
48#ifdef __LP64__
49 pgd -= PTRS_PER_PGD;
50#endif
51 free_pages((unsigned long)pgd, PGD_ALLOC_ORDER);
52}
53
54#if PT_NLEVELS == 3
55
56/* Three Level Page Table Support for pmd's */
57
58static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmd)
59{
60 __pgd_val_set(*pgd, (PxD_FLAG_PRESENT | PxD_FLAG_VALID) +
61 (__u32)(__pa((unsigned long)pmd) >> PxD_VALUE_SHIFT));
62}
63
64static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
65{
66 pmd_t *pmd = (pmd_t *)__get_free_pages(GFP_KERNEL|__GFP_REPEAT,
67 PMD_ORDER);
68 if (pmd)
69 memset(pmd, 0, PAGE_SIZE<<PMD_ORDER);
70 return pmd;
71}
72
73static inline void pmd_free(pmd_t *pmd)
74{
75#ifdef __LP64__
76 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
77 /* This is the permanent pmd attached to the pgd;
78 * cannot free it */
79 return;
80#endif
81 free_pages((unsigned long)pmd, PMD_ORDER);
82}
83
84#else
85
86/* Two Level Page Table Support for pmd's */
87
88/*
89 * allocating and freeing a pmd is trivial: the 1-entry pmd is
90 * inside the pgd, so has no extra memory associated with it.
91 */
92
93#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
94#define pmd_free(x) do { } while (0)
95#define pgd_populate(mm, pmd, pte) BUG()
96
97#endif
98
99static inline void
100pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)
101{
102#ifdef __LP64__
103 /* preserve the gateway marker if this is the beginning of
104 * the permanent pmd */
105 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
106 __pmd_val_set(*pmd, (PxD_FLAG_PRESENT |
107 PxD_FLAG_VALID |
108 PxD_FLAG_ATTACHED)
109 + (__u32)(__pa((unsigned long)pte) >> PxD_VALUE_SHIFT));
110 else
111#endif
112 __pmd_val_set(*pmd, (PxD_FLAG_PRESENT | PxD_FLAG_VALID)
113 + (__u32)(__pa((unsigned long)pte) >> PxD_VALUE_SHIFT));
114}
115
116#define pmd_populate(mm, pmd, pte_page) \
117 pmd_populate_kernel(mm, pmd, page_address(pte_page))
118
119static inline struct page *
120pte_alloc_one(struct mm_struct *mm, unsigned long address)
121{
122 struct page *page = alloc_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
123 return page;
124}
125
126static inline pte_t *
127pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
128{
129 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
130 return pte;
131}
132
133static inline void pte_free_kernel(pte_t *pte)
134{
135 free_page((unsigned long)pte);
136}
137
138#define pte_free(page) pte_free_kernel(page_address(page))
139
140extern int do_check_pgt_cache(int, int);
141#define check_pgt_cache() do { } while (0)
142
143#endif
diff --git a/include/asm-parisc/pgtable.h b/include/asm-parisc/pgtable.h
new file mode 100644
index 000000000000..af353a9bce21
--- /dev/null
+++ b/include/asm-parisc/pgtable.h
@@ -0,0 +1,522 @@
1#ifndef _PARISC_PGTABLE_H
2#define _PARISC_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6#include <linux/config.h>
7#include <asm/fixmap.h>
8
9#ifndef __ASSEMBLY__
10/*
11 * we simulate an x86-style page table for the linux mm code
12 */
13
14#include <linux/spinlock.h>
15#include <asm/processor.h>
16#include <asm/cache.h>
17#include <asm/bitops.h>
18
19/*
20 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
21 * memory. For the return value to be meaningful, ADDR must be >=
22 * PAGE_OFFSET. This operation can be relatively expensive (e.g.,
23 * require a hash-, or multi-level tree-lookup or something of that
24 * sort) but it guarantees to return TRUE only if accessing the page
25 * at that address does not cause an error. Note that there may be
26 * addresses for which kern_addr_valid() returns FALSE even though an
27 * access would not cause an error (e.g., this is typically true for
28 * memory mapped I/O regions.
29 *
30 * XXX Need to implement this for parisc.
31 */
32#define kern_addr_valid(addr) (1)
33
34/* Certain architectures need to do special things when PTEs
35 * within a page table are directly modified. Thus, the following
36 * hook is made available.
37 */
38#define set_pte(pteptr, pteval) \
39 do{ \
40 *(pteptr) = (pteval); \
41 } while(0)
42#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
43
44#endif /* !__ASSEMBLY__ */
45
46#define pte_ERROR(e) \
47 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
48#define pmd_ERROR(e) \
49 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
50#define pgd_ERROR(e) \
51 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
52
53 /* Note: If you change ISTACK_SIZE, you need to change the corresponding
54 * values in vmlinux.lds and vmlinux64.lds (init_istack section). Also,
55 * the "order" and size need to agree.
56 */
57
58#define ISTACK_SIZE 32768 /* Interrupt Stack Size */
59#define ISTACK_ORDER 3
60
61/* This is the size of the initially mapped kernel memory (i.e. currently
62 * 0 to 1<<23 == 8MB */
63#ifdef CONFIG_64BIT
64#define KERNEL_INITIAL_ORDER 24
65#else
66#define KERNEL_INITIAL_ORDER 23
67#endif
68#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
69
70#ifdef CONFIG_64BIT
71#define PT_NLEVELS 3
72#define PGD_ORDER 1 /* Number of pages per pgd */
73#define PMD_ORDER 1 /* Number of pages per pmd */
74#define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
75#else
76#define PT_NLEVELS 2
77#define PGD_ORDER 1 /* Number of pages per pgd */
78#define PGD_ALLOC_ORDER PGD_ORDER
79#endif
80
81/* Definitions for 3rd level (we use PLD here for Page Lower directory
82 * because PTE_SHIFT is used lower down to mean shift that has to be
83 * done to get usable bits out of the PTE) */
84#define PLD_SHIFT PAGE_SHIFT
85#define PLD_SIZE PAGE_SIZE
86#define BITS_PER_PTE (PAGE_SHIFT - BITS_PER_PTE_ENTRY)
87#define PTRS_PER_PTE (1UL << BITS_PER_PTE)
88
89/* Definitions for 2nd level */
90#define pgtable_cache_init() do { } while (0)
91
92#define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE)
93#define PMD_SIZE (1UL << PMD_SHIFT)
94#define PMD_MASK (~(PMD_SIZE-1))
95#if PT_NLEVELS == 3
96#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
97#else
98#define BITS_PER_PMD 0
99#endif
100#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
101
102/* Definitions for 1st level */
103#define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD)
104#define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
105#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
106#define PGDIR_MASK (~(PGDIR_SIZE-1))
107#define PTRS_PER_PGD (1UL << BITS_PER_PGD)
108#define USER_PTRS_PER_PGD PTRS_PER_PGD
109
110#define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
111#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
112
113#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
114
115/* This calculates the number of initial pages we need for the initial
116 * page tables */
117#define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
118
119/*
120 * pgd entries used up by user/kernel:
121 */
122
123#define FIRST_USER_PGD_NR 0
124
125#ifndef __ASSEMBLY__
126extern void *vmalloc_start;
127#define PCXL_DMA_MAP_SIZE (8*1024*1024)
128#define VMALLOC_START ((unsigned long)vmalloc_start)
129/* this is a fixmap remnant, see fixmap.h */
130#define VMALLOC_END (KERNEL_MAP_END)
131#endif
132
133/* NB: The tlb miss handlers make certain assumptions about the order */
134/* of the following bits, so be careful (One example, bits 25-31 */
135/* are moved together in one instruction). */
136
137#define _PAGE_READ_BIT 31 /* (0x001) read access allowed */
138#define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */
139#define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */
140#define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */
141#define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */
142#define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */
143#define _PAGE_FILE_BIT _PAGE_DIRTY_BIT /* overload this bit */
144#define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */
145#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
146#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
147#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
148#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */
149 /* for cache flushing only */
150#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
151
152/* N.B. The bits are defined in terms of a 32 bit word above, so the */
153/* following macro is ok for both 32 and 64 bit. */
154
155#define xlate_pabit(x) (31 - x)
156
157/* this defines the shift to the usable bits in the PTE it is set so
158 * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
159 * to zero */
160#define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT)
161
162/* this is how many bits may be used by the file functions */
163#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
164
165#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
166#define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
167
168#define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT))
169#define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT))
170#define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
171#define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT))
172#define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
173#define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT))
174#define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT))
175#define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
176#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
177#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
178#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
179#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
180#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
181#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
182
183#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
184#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
185#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
186
187/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
188 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
189 * for a few meta-information bits, so we shift the address to be
190 * able to effectively address 40-bits of physical address space. */
191#define _PxD_PRESENT_BIT 31
192#define _PxD_ATTACHED_BIT 30
193#define _PxD_VALID_BIT 29
194
195#define PxD_FLAG_PRESENT (1 << xlate_pabit(_PxD_PRESENT_BIT))
196#define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT))
197#define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT))
198#define PxD_FLAG_MASK (0xf)
199#define PxD_FLAG_SHIFT (4)
200#define PxD_VALUE_SHIFT (8)
201
202#ifndef __ASSEMBLY__
203
204#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
205#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
206/* Others seem to make this executable, I don't know if that's correct
207 or not. The stack is mapped this way though so this is necessary
208 in the short term - dhd@linuxcare.com, 2000-08-08 */
209#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
210#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
211#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
212#define PAGE_COPY PAGE_EXECREAD
213#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
214#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
215#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_DIRTY | _PAGE_ACCESSED)
216#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
217#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
218#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
219
220
221/*
222 * We could have an execute only page using "gateway - promote to priv
223 * level 3", but that is kind of silly. So, the way things are defined
224 * now, we must always have read permission for pages with execute
225 * permission. For the fun of it we'll go ahead and support write only
226 * pages.
227 */
228
229 /*xwr*/
230#define __P000 PAGE_NONE
231#define __P001 PAGE_READONLY
232#define __P010 __P000 /* copy on write */
233#define __P011 __P001 /* copy on write */
234#define __P100 PAGE_EXECREAD
235#define __P101 PAGE_EXECREAD
236#define __P110 __P100 /* copy on write */
237#define __P111 __P101 /* copy on write */
238
239#define __S000 PAGE_NONE
240#define __S001 PAGE_READONLY
241#define __S010 PAGE_WRITEONLY
242#define __S011 PAGE_SHARED
243#define __S100 PAGE_EXECREAD
244#define __S101 PAGE_EXECREAD
245#define __S110 PAGE_RWX
246#define __S111 PAGE_RWX
247
248extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
249
250/* initial page tables for 0-8MB for kernel */
251
252extern pte_t pg0[];
253
254/* zero page used for uninitialized stuff */
255
256extern unsigned long *empty_zero_page;
257
258/*
259 * ZERO_PAGE is a global shared page that is always zero: used
260 * for zero-mapped memory areas etc..
261 */
262
263#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
264
265#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
266#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
267#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
268
269#define pmd_flag(x) (pmd_val(x) & PxD_FLAG_MASK)
270#define pmd_address(x) ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
271#define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK)
272#define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
273
274#ifdef CONFIG_64BIT
275/* The first entry of the permanent pmd is not there if it contains
276 * the gateway marker */
277#define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
278#else
279#define pmd_none(x) (!pmd_val(x))
280#endif
281#define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID))
282#define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT)
283static inline void pmd_clear(pmd_t *pmd) {
284#ifdef CONFIG_64BIT
285 if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
286 /* This is the entry pointing to the permanent pmd
287 * attached to the pgd; cannot clear it */
288 __pmd_val_set(*pmd, PxD_FLAG_ATTACHED);
289 else
290#endif
291 __pmd_val_set(*pmd, 0);
292}
293
294
295
296#if PT_NLEVELS == 3
297#define pgd_page(pgd) ((unsigned long) __va(pgd_address(pgd)))
298
299/* For 64 bit we have three level tables */
300
301#define pgd_none(x) (!pgd_val(x))
302#define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID))
303#define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT)
304static inline void pgd_clear(pgd_t *pgd) {
305#ifdef CONFIG_64BIT
306 if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
307 /* This is the permanent pmd attached to the pgd; cannot
308 * free it */
309 return;
310#endif
311 __pgd_val_set(*pgd, 0);
312}
313#else
314/*
315 * The "pgd_xxx()" functions here are trivial for a folded two-level
316 * setup: the pgd is never bad, and a pmd always exists (as it's folded
317 * into the pgd entry)
318 */
319extern inline int pgd_none(pgd_t pgd) { return 0; }
320extern inline int pgd_bad(pgd_t pgd) { return 0; }
321extern inline int pgd_present(pgd_t pgd) { return 1; }
322extern inline void pgd_clear(pgd_t * pgdp) { }
323#endif
324
325/*
326 * The following only work if pte_present() is true.
327 * Undefined behaviour if not..
328 */
329extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; }
330extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
331extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
332extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
333extern inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
334extern inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
335
336extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_READ; return pte; }
337extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
338extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
339extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
340extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_READ; return pte; }
341extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
342extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
343extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
344
345/*
346 * Conversion functions: convert a page and protection to a page entry,
347 * and a page entry and page directory to the page they refer to.
348 */
349#define __mk_pte(addr,pgprot) \
350({ \
351 pte_t __pte; \
352 \
353 pte_val(__pte) = ((addr)+pgprot_val(pgprot)); \
354 \
355 __pte; \
356})
357
358#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
359
360static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
361{
362 pte_t pte;
363 pte_val(pte) = (pfn << PAGE_SHIFT) | pgprot_val(pgprot);
364 return pte;
365}
366
367/* This takes a physical page address that is used by the remapping functions */
368#define mk_pte_phys(physpage, pgprot) \
369({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; })
370
371extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
372{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
373
374/* Permanent address of a page. On parisc we don't have highmem. */
375
376#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
377
378#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
379
380#define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_address(pmd)))
381
382#define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd)))
383#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
384
385#define pgd_index(address) ((address) >> PGDIR_SHIFT)
386
387/* to find an entry in a page-table-directory */
388#define pgd_offset(mm, address) \
389((mm)->pgd + ((address) >> PGDIR_SHIFT))
390
391/* to find an entry in a kernel page-table-directory */
392#define pgd_offset_k(address) pgd_offset(&init_mm, address)
393
394/* Find an entry in the second-level page table.. */
395
396#if PT_NLEVELS == 3
397#define pmd_offset(dir,address) \
398((pmd_t *) pgd_page(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
399#else
400#define pmd_offset(dir,addr) ((pmd_t *) dir)
401#endif
402
403/* Find an entry in the third-level page table.. */
404#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
405#define pte_offset_kernel(pmd, address) \
406 ((pte_t *) pmd_page_kernel(*(pmd)) + pte_index(address))
407#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
408#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
409#define pte_unmap(pte) do { } while (0)
410#define pte_unmap_nested(pte) do { } while (0)
411
412#define pte_unmap(pte) do { } while (0)
413#define pte_unmap_nested(pte) do { } while (0)
414
415extern void paging_init (void);
416
417/* Used for deferring calls to flush_dcache_page() */
418
419#define PG_dcache_dirty PG_arch_1
420
421struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
422extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
423
424/* Encode and de-code a swap entry */
425
426#define __swp_type(x) ((x).val & 0x1f)
427#define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \
428 (((x).val >> 8) & ~0x7) )
429#define __swp_entry(type, offset) ((swp_entry_t) { (type) | \
430 ((offset & 0x7) << 6) | \
431 ((offset & ~0x7) << 8) })
432#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
433#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
434
435static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
436{
437#ifdef CONFIG_SMP
438 if (!pte_young(*ptep))
439 return 0;
440 return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
441#else
442 pte_t pte = *ptep;
443 if (!pte_young(pte))
444 return 0;
445 set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));
446 return 1;
447#endif
448}
449
450static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
451{
452#ifdef CONFIG_SMP
453 if (!pte_dirty(*ptep))
454 return 0;
455 return test_and_clear_bit(xlate_pabit(_PAGE_DIRTY_BIT), &pte_val(*ptep));
456#else
457 pte_t pte = *ptep;
458 if (!pte_dirty(pte))
459 return 0;
460 set_pte_at(vma->vm_mm, addr, ptep, pte_mkclean(pte));
461 return 1;
462#endif
463}
464
465extern spinlock_t pa_dbit_lock;
466
467static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
468{
469 pte_t old_pte;
470 pte_t pte;
471
472 spin_lock(&pa_dbit_lock);
473 pte = old_pte = *ptep;
474 pte_val(pte) &= ~_PAGE_PRESENT;
475 pte_val(pte) |= _PAGE_FLUSH;
476 set_pte_at(mm,addr,ptep,pte);
477 spin_unlock(&pa_dbit_lock);
478
479 return old_pte;
480}
481
482static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
483{
484#ifdef CONFIG_SMP
485 unsigned long new, old;
486
487 do {
488 old = pte_val(*ptep);
489 new = pte_val(pte_wrprotect(__pte (old)));
490 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
491#else
492 pte_t old_pte = *ptep;
493 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
494#endif
495}
496
497#define pte_same(A,B) (pte_val(A) == pte_val(B))
498
499#endif /* !__ASSEMBLY__ */
500
501#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
502 remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
503
504#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
505 remap_pfn_range(vma, vaddr, pfn, size, prot)
506
507#define MK_IOSPACE_PFN(space, pfn) (pfn)
508#define GET_IOSPACE(pfn) 0
509#define GET_PFN(pfn) (pfn)
510
511/* We provide our own get_unmapped_area to provide cache coherency */
512
513#define HAVE_ARCH_UNMAPPED_AREA
514
515#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
516#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
517#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
518#define __HAVE_ARCH_PTEP_SET_WRPROTECT
519#define __HAVE_ARCH_PTE_SAME
520#include <asm-generic/pgtable.h>
521
522#endif /* _PARISC_PGTABLE_H */
diff --git a/include/asm-parisc/poll.h b/include/asm-parisc/poll.h
new file mode 100644
index 000000000000..1c1da86934cf
--- /dev/null
+++ b/include/asm-parisc/poll.h
@@ -0,0 +1,26 @@
1#ifndef __PARISC_POLL_H
2#define __PARISC_POLL_H
3
4/* These are specified by iBCS2 */
5#define POLLIN 0x0001
6#define POLLPRI 0x0002
7#define POLLOUT 0x0004
8#define POLLERR 0x0008
9#define POLLHUP 0x0010
10#define POLLNVAL 0x0020
11
12/* The rest seem to be more-or-less nonstandard. Check them! */
13#define POLLRDNORM 0x0040
14#define POLLRDBAND 0x0080
15#define POLLWRNORM 0x0100
16#define POLLWRBAND 0x0200
17#define POLLMSG 0x0400
18#define POLLREMOVE 0x1000
19
20struct pollfd {
21 int fd;
22 short events;
23 short revents;
24};
25
26#endif
diff --git a/include/asm-parisc/posix_types.h b/include/asm-parisc/posix_types.h
new file mode 100644
index 000000000000..9b19970de619
--- /dev/null
+++ b/include/asm-parisc/posix_types.h
@@ -0,0 +1,133 @@
1#ifndef __ARCH_PARISC_POSIX_TYPES_H
2#define __ARCH_PARISC_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9typedef unsigned long __kernel_ino_t;
10typedef unsigned short __kernel_mode_t;
11typedef unsigned short __kernel_nlink_t;
12typedef long __kernel_off_t;
13typedef int __kernel_pid_t;
14typedef unsigned short __kernel_ipc_pid_t;
15typedef unsigned int __kernel_uid_t;
16typedef unsigned int __kernel_gid_t;
17typedef int __kernel_suseconds_t;
18typedef long __kernel_clock_t;
19typedef int __kernel_timer_t;
20typedef int __kernel_clockid_t;
21typedef int __kernel_daddr_t;
22/* Note these change from narrow to wide kernels */
23#ifdef __LP64__
24typedef unsigned long __kernel_size_t;
25typedef long __kernel_ssize_t;
26typedef long __kernel_ptrdiff_t;
27typedef long __kernel_time_t;
28#else
29typedef unsigned int __kernel_size_t;
30typedef int __kernel_ssize_t;
31typedef int __kernel_ptrdiff_t;
32typedef long __kernel_time_t;
33#endif
34typedef char * __kernel_caddr_t;
35
36typedef unsigned short __kernel_uid16_t;
37typedef unsigned short __kernel_gid16_t;
38typedef unsigned int __kernel_uid32_t;
39typedef unsigned int __kernel_gid32_t;
40
41#ifdef __GNUC__
42typedef long long __kernel_loff_t;
43typedef long long __kernel_off64_t;
44typedef unsigned long long __kernel_ino64_t;
45#endif
46
47typedef unsigned int __kernel_old_dev_t;
48
49typedef struct {
50#if defined(__KERNEL__) || defined(__USE_ALL)
51 int val[2];
52#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
53 int __val[2];
54#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
55} __kernel_fsid_t;
56
57/* compatibility stuff */
58typedef __kernel_uid_t __kernel_old_uid_t;
59typedef __kernel_gid_t __kernel_old_gid_t;
60
61#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
62
63#undef __FD_SET
64static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
65{
66 unsigned long __tmp = __fd / __NFDBITS;
67 unsigned long __rem = __fd % __NFDBITS;
68 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
69}
70
71#undef __FD_CLR
72static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
73{
74 unsigned long __tmp = __fd / __NFDBITS;
75 unsigned long __rem = __fd % __NFDBITS;
76 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
77}
78
79#undef __FD_ISSET
80static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
81{
82 unsigned long __tmp = __fd / __NFDBITS;
83 unsigned long __rem = __fd % __NFDBITS;
84 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
85}
86
87/*
88 * This will unroll the loop for the normal constant case (8 ints,
89 * for a 256-bit fd_set)
90 */
91#undef __FD_ZERO
92static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
93{
94 unsigned long *__tmp = __p->fds_bits;
95 int __i;
96
97 if (__builtin_constant_p(__FDSET_LONGS)) {
98 switch (__FDSET_LONGS) {
99 case 16:
100 __tmp[ 0] = 0; __tmp[ 1] = 0;
101 __tmp[ 2] = 0; __tmp[ 3] = 0;
102 __tmp[ 4] = 0; __tmp[ 5] = 0;
103 __tmp[ 6] = 0; __tmp[ 7] = 0;
104 __tmp[ 8] = 0; __tmp[ 9] = 0;
105 __tmp[10] = 0; __tmp[11] = 0;
106 __tmp[12] = 0; __tmp[13] = 0;
107 __tmp[14] = 0; __tmp[15] = 0;
108 return;
109
110 case 8:
111 __tmp[ 0] = 0; __tmp[ 1] = 0;
112 __tmp[ 2] = 0; __tmp[ 3] = 0;
113 __tmp[ 4] = 0; __tmp[ 5] = 0;
114 __tmp[ 6] = 0; __tmp[ 7] = 0;
115 return;
116
117 case 4:
118 __tmp[ 0] = 0; __tmp[ 1] = 0;
119 __tmp[ 2] = 0; __tmp[ 3] = 0;
120 return;
121 }
122 }
123 __i = __FDSET_LONGS;
124 while (__i) {
125 __i--;
126 *__tmp = 0;
127 __tmp++;
128 }
129}
130
131#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
132
133#endif
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
new file mode 100644
index 000000000000..0b61f51d8467
--- /dev/null
+++ b/include/asm-parisc/processor.h
@@ -0,0 +1,344 @@
1/*
2 * include/asm-parisc/processor.h
3 *
4 * Copyright (C) 1994 Linus Torvalds
5 * Copyright (C) 2001 Grant Grundler
6 */
7
8#ifndef __ASM_PARISC_PROCESSOR_H
9#define __ASM_PARISC_PROCESSOR_H
10
11#ifndef __ASSEMBLY__
12#include <linux/config.h>
13#include <linux/threads.h>
14
15#include <asm/hardware.h>
16#include <asm/page.h>
17#include <asm/pdc.h>
18#include <asm/ptrace.h>
19#include <asm/types.h>
20#include <asm/system.h>
21#endif /* __ASSEMBLY__ */
22
23#define KERNEL_STACK_SIZE (4*PAGE_SIZE)
24
25/*
26 * Default implementation of macro that returns current
27 * instruction pointer ("program counter").
28 */
29
30/* We cannot use MFIA as it was added for PA2.0 - prumpf
31
32 At one point there were no "0f/0b" type local symbols in gas for
33 PA-RISC. This is no longer true, but this still seems like the
34 nicest way to implement this. */
35
36#define current_text_addr() ({ void *pc; __asm__("\n\tblr 0,%0\n\tnop":"=r" (pc)); pc; })
37
38#define TASK_SIZE (current->thread.task_size)
39#define TASK_UNMAPPED_BASE (current->thread.map_base)
40
41#define DEFAULT_TASK_SIZE32 (0xFFF00000UL)
42#define DEFAULT_MAP_BASE32 (0x40000000UL)
43
44#ifdef __LP64__
45#define DEFAULT_TASK_SIZE (MAX_ADDRESS-0xf000000)
46#define DEFAULT_MAP_BASE (0x200000000UL)
47#else
48#define DEFAULT_TASK_SIZE DEFAULT_TASK_SIZE32
49#define DEFAULT_MAP_BASE DEFAULT_MAP_BASE32
50#endif
51
52#ifndef __ASSEMBLY__
53
54/*
55 * Data detected about CPUs at boot time which is the same for all CPU's.
56 * HP boxes are SMP - ie identical processors.
57 *
58 * FIXME: some CPU rev info may be processor specific...
59 */
60struct system_cpuinfo_parisc {
61 unsigned int cpu_count;
62 unsigned int cpu_hz;
63 unsigned int hversion;
64 unsigned int sversion;
65 enum cpu_type cpu_type;
66
67 struct {
68 struct pdc_model model;
69 unsigned long versions;
70 unsigned long cpuid;
71 unsigned long capabilities;
72 char sys_model_name[81]; /* PDC-ROM returnes this model name */
73 } pdc;
74
75 char *cpu_name; /* e.g. "PA7300LC (PCX-L2)" */
76 char *family_name; /* e.g. "1.1e" */
77};
78
79
80/* Per CPU data structure - ie varies per CPU. */
81struct cpuinfo_parisc {
82 unsigned long it_value; /* Interval Timer at last timer Intr */
83 unsigned long it_delta; /* Interval delta (tic_10ms / HZ * 100) */
84 unsigned long irq_count; /* number of IRQ's since boot */
85 unsigned long irq_max_cr16; /* longest time to handle a single IRQ */
86 unsigned long cpuid; /* aka slot_number or set to NO_PROC_ID */
87 unsigned long hpa; /* Host Physical address */
88 unsigned long txn_addr; /* MMIO addr of EIR or id_eid */
89#ifdef CONFIG_SMP
90 spinlock_t lock; /* synchronization for ipi's */
91 unsigned long pending_ipi; /* bitmap of type ipi_message_type */
92 unsigned long ipi_count; /* number ipi Interrupts */
93#endif
94 unsigned long bh_count; /* number of times bh was invoked */
95 unsigned long prof_counter; /* per CPU profiling support */
96 unsigned long prof_multiplier; /* per CPU profiling support */
97 unsigned long fp_rev;
98 unsigned long fp_model;
99 unsigned int state;
100 struct parisc_device *dev;
101 unsigned long loops_per_jiffy;
102};
103
104extern struct system_cpuinfo_parisc boot_cpu_data;
105extern struct cpuinfo_parisc cpu_data[NR_CPUS];
106#define current_cpu_data cpu_data[smp_processor_id()]
107
108#define CPU_HVERSION ((boot_cpu_data.hversion >> 4) & 0x0FFF)
109
110typedef struct {
111 int seg;
112} mm_segment_t;
113
114#define ARCH_MIN_TASKALIGN 8
115
116struct thread_struct {
117 struct pt_regs regs;
118 unsigned long task_size;
119 unsigned long map_base;
120 unsigned long flags;
121};
122
123/* Thread struct flags. */
124#define PARISC_KERNEL_DEATH (1UL << 31) /* see die_if_kernel()... */
125
126#define INIT_THREAD { \
127 regs: { gr: { 0, }, \
128 fr: { 0, }, \
129 sr: { 0, }, \
130 iasq: { 0, }, \
131 iaoq: { 0, }, \
132 cr27: 0, \
133 }, \
134 task_size: DEFAULT_TASK_SIZE, \
135 map_base: DEFAULT_MAP_BASE, \
136 flags: 0 \
137 }
138
139/*
140 * Return saved PC of a blocked thread. This is used by ps mostly.
141 */
142
143unsigned long thread_saved_pc(struct task_struct *t);
144void show_trace(struct task_struct *task, unsigned long *stack);
145
146/*
147 * Start user thread in another space.
148 *
149 * Note that we set both the iaoq and r31 to the new pc. When
150 * the kernel initially calls execve it will return through an
151 * rfi path that will use the values in the iaoq. The execve
152 * syscall path will return through the gateway page, and
153 * that uses r31 to branch to.
154 *
155 * For ELF we clear r23, because the dynamic linker uses it to pass
156 * the address of the finalizer function.
157 *
158 * We also initialize sr3 to an illegal value (illegal for our
159 * implementation, not for the architecture).
160 */
161typedef unsigned int elf_caddr_t;
162
163#define start_thread_som(regs, new_pc, new_sp) do { \
164 unsigned long *sp = (unsigned long *)new_sp; \
165 __u32 spaceid = (__u32)current->mm->context; \
166 unsigned long pc = (unsigned long)new_pc; \
167 /* offset pc for priv. level */ \
168 pc |= 3; \
169 \
170 set_fs(USER_DS); \
171 regs->iasq[0] = spaceid; \
172 regs->iasq[1] = spaceid; \
173 regs->iaoq[0] = pc; \
174 regs->iaoq[1] = pc + 4; \
175 regs->sr[2] = LINUX_GATEWAY_SPACE; \
176 regs->sr[3] = 0xffff; \
177 regs->sr[4] = spaceid; \
178 regs->sr[5] = spaceid; \
179 regs->sr[6] = spaceid; \
180 regs->sr[7] = spaceid; \
181 regs->gr[ 0] = USER_PSW; \
182 regs->gr[30] = ((new_sp)+63)&~63; \
183 regs->gr[31] = pc; \
184 \
185 get_user(regs->gr[26],&sp[0]); \
186 get_user(regs->gr[25],&sp[-1]); \
187 get_user(regs->gr[24],&sp[-2]); \
188 get_user(regs->gr[23],&sp[-3]); \
189} while(0)
190
191/* The ELF abi wants things done a "wee bit" differently than
192 * som does. Supporting this behavior here avoids
193 * having our own version of create_elf_tables.
194 *
195 * Oh, and yes, that is not a typo, we are really passing argc in r25
196 * and argv in r24 (rather than r26 and r25). This is because that's
197 * where __libc_start_main wants them.
198 *
199 * Duplicated from dl-machine.h for the benefit of readers:
200 *
201 * Our initial stack layout is rather different from everyone else's
202 * due to the unique PA-RISC ABI. As far as I know it looks like
203 * this:
204
205 ----------------------------------- (user startup code creates this frame)
206 | 32 bytes of magic |
207 |---------------------------------|
208 | 32 bytes argument/sp save area |
209 |---------------------------------| (bprm->p)
210 | ELF auxiliary info |
211 | (up to 28 words) |
212 |---------------------------------|
213 | NULL |
214 |---------------------------------|
215 | Environment pointers |
216 |---------------------------------|
217 | NULL |
218 |---------------------------------|
219 | Argument pointers |
220 |---------------------------------| <- argv
221 | argc (1 word) |
222 |---------------------------------| <- bprm->exec (HACK!)
223 | N bytes of slack |
224 |---------------------------------|
225 | filename passed to execve |
226 |---------------------------------| (mm->env_end)
227 | env strings |
228 |---------------------------------| (mm->env_start, mm->arg_end)
229 | arg strings |
230 |---------------------------------|
231 | additional faked arg strings if |
232 | we're invoked via binfmt_script |
233 |---------------------------------| (mm->arg_start)
234 stack base is at TASK_SIZE - rlim_max.
235
236on downward growing arches, it looks like this:
237 stack base at TASK_SIZE
238 | filename passed to execve
239 | env strings
240 | arg strings
241 | faked arg strings
242 | slack
243 | ELF
244 | envps
245 | argvs
246 | argc
247
248 * The pleasant part of this is that if we need to skip arguments we
249 * can just decrement argc and move argv, because the stack pointer
250 * is utterly unrelated to the location of the environment and
251 * argument vectors.
252 *
253 * Note that the S/390 people took the easy way out and hacked their
254 * GCC to make the stack grow downwards.
255 *
256 * Final Note: For entry from syscall, the W (wide) bit of the PSW
257 * is stuffed into the lowest bit of the user sp (%r30), so we fill
258 * it in here from the current->personality
259 */
260
261#ifdef __LP64__
262#define USER_WIDE_MODE (personality(current->personality) == PER_LINUX)
263#else
264#define USER_WIDE_MODE 0
265#endif
266
267#define start_thread(regs, new_pc, new_sp) do { \
268 elf_addr_t *sp = (elf_addr_t *)new_sp; \
269 __u32 spaceid = (__u32)current->mm->context; \
270 elf_addr_t pc = (elf_addr_t)new_pc | 3; \
271 elf_caddr_t *argv = (elf_caddr_t *)bprm->exec + 1; \
272 \
273 set_fs(USER_DS); \
274 regs->iasq[0] = spaceid; \
275 regs->iasq[1] = spaceid; \
276 regs->iaoq[0] = pc; \
277 regs->iaoq[1] = pc + 4; \
278 regs->sr[2] = LINUX_GATEWAY_SPACE; \
279 regs->sr[3] = 0xffff; \
280 regs->sr[4] = spaceid; \
281 regs->sr[5] = spaceid; \
282 regs->sr[6] = spaceid; \
283 regs->sr[7] = spaceid; \
284 regs->gr[ 0] = USER_PSW | (USER_WIDE_MODE ? PSW_W : 0); \
285 regs->fr[ 0] = 0LL; \
286 regs->fr[ 1] = 0LL; \
287 regs->fr[ 2] = 0LL; \
288 regs->fr[ 3] = 0LL; \
289 regs->gr[30] = (((unsigned long)sp + 63) &~ 63) | (USER_WIDE_MODE ? 1 : 0); \
290 regs->gr[31] = pc; \
291 \
292 get_user(regs->gr[25], (argv - 1)); \
293 regs->gr[24] = (long) argv; \
294 regs->gr[23] = 0; \
295} while(0)
296
297struct task_struct;
298struct mm_struct;
299
300/* Free all resources held by a thread. */
301extern void release_thread(struct task_struct *);
302extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
303
304/* Prepare to copy thread state - unlazy all lazy status */
305#define prepare_to_copy(tsk) do { } while (0)
306
307extern void map_hpux_gateway_page(struct task_struct *tsk, struct mm_struct *mm);
308
309extern unsigned long get_wchan(struct task_struct *p);
310
311#define KSTK_EIP(tsk) ((tsk)->thread.regs.iaoq[0])
312#define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30])
313
314
315/*
316 * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
317 * In addition, many implementations do hardware prefetching of both
318 * instructions and data.
319 *
320 * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
321 * to gr0 but not in a way that Linux can use. If the load would cause an
322 * interruption (eg due to prefetching 0), it is suppressed on PA2.0
323 * processors, but not on 7300LC.
324 */
325#ifdef CONFIG_PREFETCH
326#define ARCH_HAS_PREFETCH
327#define ARCH_HAS_PREFETCHW
328
329extern inline void prefetch(const void *addr)
330{
331 __asm__("ldw 0(%0), %%r0" : : "r" (addr));
332}
333
334extern inline void prefetchw(const void *addr)
335{
336 __asm__("ldd 0(%0), %%r0" : : "r" (addr));
337}
338#endif
339
340#define cpu_relax() barrier()
341
342#endif /* __ASSEMBLY__ */
343
344#endif /* __ASM_PARISC_PROCESSOR_H */
diff --git a/include/asm-parisc/psw.h b/include/asm-parisc/psw.h
new file mode 100644
index 000000000000..51323029f377
--- /dev/null
+++ b/include/asm-parisc/psw.h
@@ -0,0 +1,62 @@
1#ifndef _PARISC_PSW_H
2#define PSW_I 0x00000001
3#define PSW_D 0x00000002
4#define PSW_P 0x00000004
5#define PSW_Q 0x00000008
6
7#define PSW_R 0x00000010
8#define PSW_F 0x00000020
9#define PSW_G 0x00000040 /* PA1.x only */
10#define PSW_O 0x00000080 /* PA2.0 only */
11
12#define PSW_CB 0x0000ff00
13
14#define PSW_M 0x00010000
15#define PSW_V 0x00020000
16#define PSW_C 0x00040000
17#define PSW_B 0x00080000
18
19#define PSW_X 0x00100000
20#define PSW_N 0x00200000
21#define PSW_L 0x00400000
22#define PSW_H 0x00800000
23
24#define PSW_T 0x01000000
25#define PSW_S 0x02000000
26#define PSW_E 0x04000000
27#define PSW_W 0x08000000 /* PA2.0 only */
28#define PSW_W_BIT 36 /* PA2.0 only */
29
30#define PSW_Z 0x40000000 /* PA1.x only */
31#define PSW_Y 0x80000000 /* PA1.x only */
32
33#ifdef __LP64__
34#define PSW_HI_CB 0x000000ff /* PA2.0 only */
35#endif
36
37/* PSW bits to be used with ssm/rsm */
38#define PSW_SM_I 0x1
39#define PSW_SM_D 0x2
40#define PSW_SM_P 0x4
41#define PSW_SM_Q 0x8
42#define PSW_SM_R 0x10
43#define PSW_SM_F 0x20
44#define PSW_SM_G 0x40
45#define PSW_SM_O 0x80
46#define PSW_SM_E 0x100
47#define PSW_SM_W 0x200
48
49#ifdef __LP64__
50# define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
51# define KERNEL_PSW (PSW_W | PSW_C | PSW_Q | PSW_P | PSW_D)
52# define REAL_MODE_PSW (PSW_W | PSW_Q)
53# define USER_PSW_MASK (PSW_W | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
54# define USER_PSW_HI_MASK (PSW_HI_CB)
55#else
56# define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
57# define KERNEL_PSW (PSW_C | PSW_Q | PSW_P | PSW_D)
58# define REAL_MODE_PSW (PSW_Q)
59# define USER_PSW_MASK (PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
60#endif
61
62#endif
diff --git a/include/asm-parisc/ptrace.h b/include/asm-parisc/ptrace.h
new file mode 100644
index 000000000000..3f428aa371a4
--- /dev/null
+++ b/include/asm-parisc/ptrace.h
@@ -0,0 +1,56 @@
1#ifndef _PARISC_PTRACE_H
2#define _PARISC_PTRACE_H
3
4/* written by Philipp Rumpf, Copyright (C) 1999 SuSE GmbH Nuernberg
5** Copyright (C) 2000 Grant Grundler, Hewlett-Packard
6*/
7
8#include <linux/types.h>
9
10/* This struct defines the way the registers are stored on the
11 * stack during a system call.
12 *
13 * N.B. gdb/strace care about the size and offsets within this
14 * structure. If you change things, you may break object compatibility
15 * for those applications.
16 */
17
18struct pt_regs {
19 unsigned long gr[32]; /* PSW is in gr[0] */
20 __u64 fr[32];
21 unsigned long sr[ 8];
22 unsigned long iasq[2];
23 unsigned long iaoq[2];
24 unsigned long cr27;
25 unsigned long pad0; /* available for other uses */
26 unsigned long orig_r28;
27 unsigned long ksp;
28 unsigned long kpc;
29 unsigned long sar; /* CR11 */
30 unsigned long iir; /* CR19 */
31 unsigned long isr; /* CR20 */
32 unsigned long ior; /* CR21 */
33 unsigned long ipsw; /* CR22 */
34};
35
36#define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS))
37/*
38 * The numbers chosen here are somewhat arbitrary but absolutely MUST
39 * not overlap with any of the number assigned in <linux/ptrace.h>.
40 *
41 * These ones are taken from IA-64 on the assumption that theirs are
42 * the most correct (and we also want to support PTRACE_SINGLEBLOCK
43 * since we have taken branch traps too)
44 */
45#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
46#ifdef __KERNEL__
47
48/* XXX should we use iaoq[1] or iaoq[0] ? */
49#define user_mode(regs) (((regs)->iaoq[0] & 3) ? 1 : 0)
50#define user_space(regs) (((regs)->iasq[1] != 0) ? 1 : 0)
51#define instruction_pointer(regs) ((regs)->iaoq[0] & ~3)
52#define profile_pc(regs) instruction_pointer(regs)
53extern void show_regs(struct pt_regs *);
54#endif
55
56#endif
diff --git a/include/asm-parisc/real.h b/include/asm-parisc/real.h
new file mode 100644
index 000000000000..82acb25db395
--- /dev/null
+++ b/include/asm-parisc/real.h
@@ -0,0 +1,5 @@
1#ifndef _PARISC_REAL_H
2#define _PARISC_REAL_H
3
4
5#endif
diff --git a/include/asm-parisc/resource.h b/include/asm-parisc/resource.h
new file mode 100644
index 000000000000..8b06343b62ed
--- /dev/null
+++ b/include/asm-parisc/resource.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_PARISC_RESOURCE_H
2#define _ASM_PARISC_RESOURCE_H
3
4#define _STK_LIM_MAX 10 * _STK_LIM
5#include <asm-generic/resource.h>
6
7#endif
diff --git a/include/asm-parisc/rt_sigframe.h b/include/asm-parisc/rt_sigframe.h
new file mode 100644
index 000000000000..5623c032b64c
--- /dev/null
+++ b/include/asm-parisc/rt_sigframe.h
@@ -0,0 +1,27 @@
1#ifndef _ASM_PARISC_RT_SIGFRAME_H
2#define _ASM_PARISC_RT_SIGFRAME_H
3
4#ifdef CONFIG_COMPAT
5#include <asm/compat_rt_sigframe.h>
6#endif
7
8#define SIGRETURN_TRAMP 4
9#define SIGRESTARTBLOCK_TRAMP 5
10#define TRAMP_SIZE (SIGRETURN_TRAMP + SIGRESTARTBLOCK_TRAMP)
11
12struct rt_sigframe {
13 /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c
14 Secondary to that it must protect the ERESTART_RESTARTBLOCK
15 trampoline we left on the stack (we were bad and didn't
16 change sp so we could run really fast.) */
17 unsigned int tramp[TRAMP_SIZE];
18 struct siginfo info;
19 struct ucontext uc;
20};
21
22#define SIGFRAME 128
23#define FUNCTIONCALLFRAME 96
24#define PARISC_RT_SIGFRAME_SIZE \
25 (((sizeof(struct rt_sigframe) + FUNCTIONCALLFRAME) + SIGFRAME) & -SIGFRAME)
26
27#endif
diff --git a/include/asm-parisc/rtc.h b/include/asm-parisc/rtc.h
new file mode 100644
index 000000000000..f3d3d6b110ba
--- /dev/null
+++ b/include/asm-parisc/rtc.h
@@ -0,0 +1,131 @@
1/*
2 * inclue/asm-parisc/rtc.h
3 *
4 * Copyright 2002 Randolph CHung <tausq@debian.org>
5 *
6 * Based on: include/asm-ppc/rtc.h and the genrtc driver in the
7 * 2.4 parisc linux tree
8 */
9
10#ifndef __ASM_RTC_H__
11#define __ASM_RTC_H__
12
13#ifdef __KERNEL__
14
15#include <linux/rtc.h>
16
17#include <asm/pdc.h>
18
19#define SECS_PER_HOUR (60 * 60)
20#define SECS_PER_DAY (SECS_PER_HOUR * 24)
21
22
23#define RTC_PIE 0x40 /* periodic interrupt enable */
24#define RTC_AIE 0x20 /* alarm interrupt enable */
25#define RTC_UIE 0x10 /* update-finished interrupt enable */
26
27#define RTC_BATT_BAD 0x100 /* battery bad */
28
29/* some dummy definitions */
30#define RTC_SQWE 0x08 /* enable square-wave output */
31#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
32#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
33#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
34
35# define __isleap(year) \
36 ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
37
38/* How many days come before each month (0-12). */
39static const unsigned short int __mon_yday[2][13] =
40{
41 /* Normal years. */
42 { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 },
43 /* Leap years. */
44 { 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 }
45};
46
47static inline unsigned int get_rtc_time(struct rtc_time *wtime)
48{
49 struct pdc_tod tod_data;
50 long int days, rem, y;
51 const unsigned short int *ip;
52
53 if(pdc_tod_read(&tod_data) < 0)
54 return RTC_24H | RTC_BATT_BAD;
55
56
57 // most of the remainder of this function is:
58// Copyright (C) 1991, 1993, 1997, 1998 Free Software Foundation, Inc.
59// This was originally a part of the GNU C Library.
60// It is distributed under the GPL, and was swiped from offtime.c
61
62
63 days = tod_data.tod_sec / SECS_PER_DAY;
64 rem = tod_data.tod_sec % SECS_PER_DAY;
65
66 wtime->tm_hour = rem / SECS_PER_HOUR;
67 rem %= SECS_PER_HOUR;
68 wtime->tm_min = rem / 60;
69 wtime->tm_sec = rem % 60;
70
71 y = 1970;
72
73#define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
74#define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
75
76 while (days < 0 || days >= (__isleap (y) ? 366 : 365))
77 {
78 /* Guess a corrected year, assuming 365 days per year. */
79 long int yg = y + days / 365 - (days % 365 < 0);
80
81 /* Adjust DAYS and Y to match the guessed year. */
82 days -= ((yg - y) * 365
83 + LEAPS_THRU_END_OF (yg - 1)
84 - LEAPS_THRU_END_OF (y - 1));
85 y = yg;
86 }
87 wtime->tm_year = y - 1900;
88
89 ip = __mon_yday[__isleap(y)];
90 for (y = 11; days < (long int) ip[y]; --y)
91 continue;
92 days -= ip[y];
93 wtime->tm_mon = y;
94 wtime->tm_mday = days + 1;
95
96 return RTC_24H;
97}
98
99static int set_rtc_time(struct rtc_time *wtime)
100{
101 u_int32_t secs;
102
103 secs = mktime(wtime->tm_year + 1900, wtime->tm_mon + 1, wtime->tm_mday,
104 wtime->tm_hour, wtime->tm_min, wtime->tm_sec);
105
106 if(pdc_tod_set(secs, 0) < 0)
107 return -1;
108 else
109 return 0;
110
111}
112
113static inline unsigned int get_rtc_ss(void)
114{
115 struct rtc_time h;
116
117 get_rtc_time(&h);
118 return h.tm_sec;
119}
120
121static inline int get_rtc_pll(struct rtc_pll_info *pll)
122{
123 return -EINVAL;
124}
125static inline int set_rtc_pll(struct rtc_pll_info *pll)
126{
127 return -EINVAL;
128}
129
130#endif /* __KERNEL__ */
131#endif /* __ASM_RTC_H__ */
diff --git a/include/asm-parisc/runway.h b/include/asm-parisc/runway.h
new file mode 100644
index 000000000000..5bea02da7e22
--- /dev/null
+++ b/include/asm-parisc/runway.h
@@ -0,0 +1,12 @@
1#ifndef ASM_PARISC_RUNWAY_H
2#define ASM_PARISC_RUNWAY_H
3#ifdef __KERNEL__
4
5/* declared in arch/parisc/kernel/setup.c */
6extern struct proc_dir_entry * proc_runway_root;
7
8#define RUNWAY_STATUS 0x10
9#define RUNWAY_DEBUG 0x40
10
11#endif /* __KERNEL__ */
12#endif /* ASM_PARISC_RUNWAY_H */
diff --git a/include/asm-parisc/scatterlist.h b/include/asm-parisc/scatterlist.h
new file mode 100644
index 000000000000..236c1d0fba33
--- /dev/null
+++ b/include/asm-parisc/scatterlist.h
@@ -0,0 +1,23 @@
1#ifndef _ASM_PARISC_SCATTERLIST_H
2#define _ASM_PARISC_SCATTERLIST_H
3
4#include <asm/page.h>
5
6struct scatterlist {
7 struct page *page;
8 unsigned int offset;
9
10 unsigned int length;
11
12 /* an IOVA can be 64-bits on some PA-Risc platforms. */
13 dma_addr_t iova; /* I/O Virtual Address */
14 __u32 iova_length; /* bytes mapped */
15};
16
17#define sg_virt_addr(sg) ((unsigned long)(page_address(sg->page) + sg->offset))
18#define sg_dma_address(sg) ((sg)->iova)
19#define sg_dma_len(sg) ((sg)->iova_length)
20
21#define ISA_DMA_THRESHOLD (~0UL)
22
23#endif /* _ASM_PARISC_SCATTERLIST_H */
diff --git a/include/asm-parisc/sections.h b/include/asm-parisc/sections.h
new file mode 100644
index 000000000000..fdd43ec42ec5
--- /dev/null
+++ b/include/asm-parisc/sections.h
@@ -0,0 +1,7 @@
1#ifndef _PARISC_SECTIONS_H
2#define _PARISC_SECTIONS_H
3
4/* nothing to see, move along */
5#include <asm-generic/sections.h>
6
7#endif
diff --git a/include/asm-parisc/segment.h b/include/asm-parisc/segment.h
new file mode 100644
index 000000000000..26794ddb6524
--- /dev/null
+++ b/include/asm-parisc/segment.h
@@ -0,0 +1,6 @@
1#ifndef __PARISC_SEGMENT_H
2#define __PARISC_SEGMENT_H
3
4/* Only here because we have some old header files that expect it.. */
5
6#endif
diff --git a/include/asm-parisc/semaphore-helper.h b/include/asm-parisc/semaphore-helper.h
new file mode 100644
index 000000000000..387f7c1277a2
--- /dev/null
+++ b/include/asm-parisc/semaphore-helper.h
@@ -0,0 +1,89 @@
1#ifndef _ASM_PARISC_SEMAPHORE_HELPER_H
2#define _ASM_PARISC_SEMAPHORE_HELPER_H
3
4/*
5 * SMP- and interrupt-safe semaphores helper functions.
6 *
7 * (C) Copyright 1996 Linus Torvalds
8 * (C) Copyright 1999 Andrea Arcangeli
9 */
10
11/*
12 * These two _must_ execute atomically wrt each other.
13 *
14 * This is trivially done with load_locked/store_cond,
15 * which we have. Let the rest of the losers suck eggs.
16 */
17static __inline__ void wake_one_more(struct semaphore * sem)
18{
19 atomic_inc((atomic_t *)&sem->waking);
20}
21
22static __inline__ int waking_non_zero(struct semaphore *sem)
23{
24 unsigned long flags;
25 int ret = 0;
26
27 spin_lock_irqsave(&semaphore_wake_lock, flags);
28 if (sem->waking > 0) {
29 sem->waking--;
30 ret = 1;
31 }
32 spin_unlock_irqrestore(&semaphore_wake_lock, flags);
33 return ret;
34}
35
36/*
37 * waking_non_zero_interruptible:
38 * 1 got the lock
39 * 0 go to sleep
40 * -EINTR interrupted
41 *
42 * We must undo the sem->count down_interruptible() increment while we are
43 * protected by the spinlock in order to make atomic this atomic_inc() with the
44 * atomic_read() in wake_one_more(), otherwise we can race. -arca
45 */
46static __inline__ int waking_non_zero_interruptible(struct semaphore *sem,
47 struct task_struct *tsk)
48{
49 unsigned long flags;
50 int ret = 0;
51
52 spin_lock_irqsave(&semaphore_wake_lock, flags);
53 if (sem->waking > 0) {
54 sem->waking--;
55 ret = 1;
56 } else if (signal_pending(tsk)) {
57 atomic_inc(&sem->count);
58 ret = -EINTR;
59 }
60 spin_unlock_irqrestore(&semaphore_wake_lock, flags);
61 return ret;
62}
63
64/*
65 * waking_non_zero_trylock:
66 * 1 failed to lock
67 * 0 got the lock
68 *
69 * We must undo the sem->count down_trylock() increment while we are
70 * protected by the spinlock in order to make atomic this atomic_inc() with the
71 * atomic_read() in wake_one_more(), otherwise we can race. -arca
72 */
73static __inline__ int waking_non_zero_trylock(struct semaphore *sem)
74{
75 unsigned long flags;
76 int ret = 1;
77
78 spin_lock_irqsave(&semaphore_wake_lock, flags);
79 if (sem->waking <= 0)
80 atomic_inc(&sem->count);
81 else {
82 sem->waking--;
83 ret = 0;
84 }
85 spin_unlock_irqrestore(&semaphore_wake_lock, flags);
86 return ret;
87}
88
89#endif /* _ASM_PARISC_SEMAPHORE_HELPER_H */
diff --git a/include/asm-parisc/semaphore.h b/include/asm-parisc/semaphore.h
new file mode 100644
index 000000000000..f78bb2e34538
--- /dev/null
+++ b/include/asm-parisc/semaphore.h
@@ -0,0 +1,147 @@
1/* SMP- and interrupt-safe semaphores.
2 * PA-RISC version by Matthew Wilcox
3 *
4 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Copyright (C) 1996 Linus Torvalds
6 * Copyright (C) 1999-2001 Matthew Wilcox < willy at debian d0T org >
7 * Copyright (C) 2000 Grant Grundler < grundler a debian org >
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24#ifndef _ASM_PARISC_SEMAPHORE_H
25#define _ASM_PARISC_SEMAPHORE_H
26
27#include <linux/spinlock.h>
28#include <linux/wait.h>
29#include <linux/rwsem.h>
30
31#include <asm/system.h>
32
33/*
34 * The `count' is initialised to the number of people who are allowed to
35 * take the lock. (Normally we want a mutex, so this is `1'). if
36 * `count' is positive, the lock can be taken. if it's 0, no-one is
37 * waiting on it. if it's -1, at least one task is waiting.
38 */
39struct semaphore {
40 spinlock_t sentry;
41 int count;
42 wait_queue_head_t wait;
43};
44
45#define __SEMAPHORE_INITIALIZER(name, n) \
46{ \
47 .sentry = SPIN_LOCK_UNLOCKED, \
48 .count = n, \
49 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
50}
51
52#define __MUTEX_INITIALIZER(name) \
53 __SEMAPHORE_INITIALIZER(name,1)
54
55#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
56 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
57
58#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
59#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
60
61extern inline void sema_init (struct semaphore *sem, int val)
62{
63 *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val);
64}
65
66static inline void init_MUTEX (struct semaphore *sem)
67{
68 sema_init(sem, 1);
69}
70
71static inline void init_MUTEX_LOCKED (struct semaphore *sem)
72{
73 sema_init(sem, 0);
74}
75
76static inline int sem_getcount(struct semaphore *sem)
77{
78 return sem->count;
79}
80
81asmlinkage void __down(struct semaphore * sem);
82asmlinkage int __down_interruptible(struct semaphore * sem);
83asmlinkage void __up(struct semaphore * sem);
84
85/* Semaphores can be `tried' from irq context. So we have to disable
86 * interrupts while we're messing with the semaphore. Sorry.
87 */
88
89extern __inline__ void down(struct semaphore * sem)
90{
91 might_sleep();
92 spin_lock_irq(&sem->sentry);
93 if (sem->count > 0) {
94 sem->count--;
95 } else {
96 __down(sem);
97 }
98 spin_unlock_irq(&sem->sentry);
99}
100
101extern __inline__ int down_interruptible(struct semaphore * sem)
102{
103 int ret = 0;
104 might_sleep();
105 spin_lock_irq(&sem->sentry);
106 if (sem->count > 0) {
107 sem->count--;
108 } else {
109 ret = __down_interruptible(sem);
110 }
111 spin_unlock_irq(&sem->sentry);
112 return ret;
113}
114
115/*
116 * down_trylock returns 0 on success, 1 if we failed to get the lock.
117 * May not sleep, but must preserve irq state
118 */
119extern __inline__ int down_trylock(struct semaphore * sem)
120{
121 int flags, count;
122
123 spin_lock_irqsave(&sem->sentry, flags);
124 count = sem->count - 1;
125 if (count >= 0)
126 sem->count = count;
127 spin_unlock_irqrestore(&sem->sentry, flags);
128 return (count < 0);
129}
130
131/*
132 * Note! This is subtle. We jump to wake people up only if
133 * the semaphore was negative (== somebody was waiting on it).
134 */
135extern __inline__ void up(struct semaphore * sem)
136{
137 int flags;
138 spin_lock_irqsave(&sem->sentry, flags);
139 if (sem->count < 0) {
140 __up(sem);
141 } else {
142 sem->count++;
143 }
144 spin_unlock_irqrestore(&sem->sentry, flags);
145}
146
147#endif /* _ASM_PARISC_SEMAPHORE_H */
diff --git a/include/asm-parisc/sembuf.h b/include/asm-parisc/sembuf.h
new file mode 100644
index 000000000000..1083368ef8db
--- /dev/null
+++ b/include/asm-parisc/sembuf.h
@@ -0,0 +1,29 @@
1#ifndef _PARISC_SEMBUF_H
2#define _PARISC_SEMBUF_H
3
4/*
5 * The semid64_ds structure for parisc architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16#ifndef __LP64__
17 unsigned int __pad1;
18#endif
19 __kernel_time_t sem_otime; /* last semop time */
20#ifndef __LP64__
21 unsigned int __pad2;
22#endif
23 __kernel_time_t sem_ctime; /* last change time */
24 unsigned int sem_nsems; /* no. of semaphores in array */
25 unsigned int __unused1;
26 unsigned int __unused2;
27};
28
29#endif /* _PARISC_SEMBUF_H */
diff --git a/include/asm-parisc/serial.h b/include/asm-parisc/serial.h
new file mode 100644
index 000000000000..239c5dcab7e6
--- /dev/null
+++ b/include/asm-parisc/serial.h
@@ -0,0 +1,36 @@
1/*
2 * include/asm-parisc/serial.h
3 */
4
5/*
6 * This assumes you have a 7.272727 MHz clock for your UART.
7 * The documentation implies a 40Mhz clock, and elsewhere a 7Mhz clock
8 * Clarified: 7.2727MHz on LASI. Not yet clarified for DINO
9 */
10
11#define LASI_BASE_BAUD ( 7272727 / 16 )
12#define BASE_BAUD LASI_BASE_BAUD
13
14/*
15 * We don't use the ISA probing code, so these entries are just to reserve
16 * space. Some example (maximal) configurations:
17 * - 712 w/ additional Lasi & RJ16 ports: 4
18 * - J5k w/ PCI serial cards: 2 + 4 * card ~= 34
19 * A500 w/ PCI serial cards: 5 + 4 * card ~= 17
20 */
21
22#define STD_SERIAL_PORT_DEFNS \
23 { 0, }, /* ttyS0 */ \
24 { 0, }, /* ttyS1 */ \
25 { 0, }, /* ttyS2 */ \
26 { 0, }, /* ttyS3 */ \
27 { 0, }, /* ttyS4 */ \
28 { 0, }, /* ttyS5 */ \
29 { 0, }, /* ttyS6 */ \
30 { 0, }, /* ttyS7 */ \
31 { 0, }, /* ttyS8 */
32
33
34#define SERIAL_PORT_DFNS \
35 STD_SERIAL_PORT_DEFNS
36
diff --git a/include/asm-parisc/setup.h b/include/asm-parisc/setup.h
new file mode 100644
index 000000000000..7da2e5b8747e
--- /dev/null
+++ b/include/asm-parisc/setup.h
@@ -0,0 +1,6 @@
1#ifndef _PARISC_SETUP_H
2#define _PARISC_SETUP_H
3
4#define COMMAND_LINE_SIZE 1024
5
6#endif /* _PARISC_SETUP_H */
diff --git a/include/asm-parisc/shmbuf.h b/include/asm-parisc/shmbuf.h
new file mode 100644
index 000000000000..623b6c0c49e6
--- /dev/null
+++ b/include/asm-parisc/shmbuf.h
@@ -0,0 +1,58 @@
1#ifndef _PARISC_SHMBUF_H
2#define _PARISC_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for parisc architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16#ifndef __LP64__
17 unsigned int __pad1;
18#endif
19 __kernel_time_t shm_atime; /* last attach time */
20#ifndef __LP64__
21 unsigned int __pad2;
22#endif
23 __kernel_time_t shm_dtime; /* last detach time */
24#ifndef __LP64__
25 unsigned int __pad3;
26#endif
27 __kernel_time_t shm_ctime; /* last change time */
28#ifndef __LP64__
29 unsigned int __pad4;
30#endif
31 size_t shm_segsz; /* size of segment (bytes) */
32 __kernel_pid_t shm_cpid; /* pid of creator */
33 __kernel_pid_t shm_lpid; /* pid of last operator */
34 unsigned int shm_nattch; /* no. of current attaches */
35 unsigned int __unused1;
36 unsigned int __unused2;
37};
38
39#ifdef __LP64__
40/* The 'unsigned int' (formerly 'unsigned long') data types below will
41 * ensure that a 32-bit app calling shmctl(*,IPC_INFO,*) will work on
42 * a wide kernel, but if some of these values are meant to contain pointers
43 * they may need to be 'long long' instead. -PB XXX FIXME
44 */
45#endif
46struct shminfo64 {
47 unsigned int shmmax;
48 unsigned int shmmin;
49 unsigned int shmmni;
50 unsigned int shmseg;
51 unsigned int shmall;
52 unsigned int __unused1;
53 unsigned int __unused2;
54 unsigned int __unused3;
55 unsigned int __unused4;
56};
57
58#endif /* _PARISC_SHMBUF_H */
diff --git a/include/asm-parisc/shmparam.h b/include/asm-parisc/shmparam.h
new file mode 100644
index 000000000000..628ddc22faa8
--- /dev/null
+++ b/include/asm-parisc/shmparam.h
@@ -0,0 +1,8 @@
1#ifndef _ASMPARISC_SHMPARAM_H
2#define _ASMPARISC_SHMPARAM_H
3
4#define __ARCH_FORCE_SHMLBA 1
5
6#define SHMLBA 0x00400000 /* attach addr needs to be 4 Mb aligned */
7
8#endif /* _ASMPARISC_SHMPARAM_H */
diff --git a/include/asm-parisc/sigcontext.h b/include/asm-parisc/sigcontext.h
new file mode 100644
index 000000000000..27ef31bb3b6e
--- /dev/null
+++ b/include/asm-parisc/sigcontext.h
@@ -0,0 +1,20 @@
1#ifndef _ASMPARISC_SIGCONTEXT_H
2#define _ASMPARISC_SIGCONTEXT_H
3
4#define PARISC_SC_FLAG_ONSTACK 1<<0
5#define PARISC_SC_FLAG_IN_SYSCALL 1<<1
6
7/* We will add more stuff here as it becomes necessary, until we know
8 it works. */
9struct sigcontext {
10 unsigned long sc_flags;
11
12 unsigned long sc_gr[32]; /* PSW in sc_gr[0] */
13 unsigned long long sc_fr[32]; /* FIXME, do we need other state info? */
14 unsigned long sc_iasq[2];
15 unsigned long sc_iaoq[2];
16 unsigned long sc_sar; /* cr11 */
17};
18
19
20#endif
diff --git a/include/asm-parisc/siginfo.h b/include/asm-parisc/siginfo.h
new file mode 100644
index 000000000000..d4909f55fe35
--- /dev/null
+++ b/include/asm-parisc/siginfo.h
@@ -0,0 +1,14 @@
1#ifndef _PARISC_SIGINFO_H
2#define _PARISC_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6/*
7 * SIGTRAP si_codes
8 */
9#define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */
10#define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint or watchpoint */
11#undef NSIGTRAP
12#define NSIGTRAP 4
13
14#endif
diff --git a/include/asm-parisc/signal.h b/include/asm-parisc/signal.h
new file mode 100644
index 000000000000..358f577c8eb8
--- /dev/null
+++ b/include/asm-parisc/signal.h
@@ -0,0 +1,166 @@
1#ifndef _ASM_PARISC_SIGNAL_H
2#define _ASM_PARISC_SIGNAL_H
3
4#define SIGHUP 1
5#define SIGINT 2
6#define SIGQUIT 3
7#define SIGILL 4
8#define SIGTRAP 5
9#define SIGABRT 6
10#define SIGIOT 6
11#define SIGEMT 7
12#define SIGFPE 8
13#define SIGKILL 9
14#define SIGBUS 10
15#define SIGSEGV 11
16#define SIGSYS 12 /* Linux doesn't use this */
17#define SIGPIPE 13
18#define SIGALRM 14
19#define SIGTERM 15
20#define SIGUSR1 16
21#define SIGUSR2 17
22#define SIGCHLD 18
23#define SIGPWR 19
24#define SIGVTALRM 20
25#define SIGPROF 21
26#define SIGIO 22
27#define SIGPOLL SIGIO
28#define SIGWINCH 23
29#define SIGSTOP 24
30#define SIGTSTP 25
31#define SIGCONT 26
32#define SIGTTIN 27
33#define SIGTTOU 28
34#define SIGURG 29
35#define SIGLOST 30 /* Linux doesn't use this either */
36#define SIGUNUSED 31
37#define SIGRESERVE SIGUNUSED
38
39#define SIGXCPU 33
40#define SIGXFSZ 34
41#define SIGSTKFLT 36
42
43/* These should not be considered constants from userland. */
44#define SIGRTMIN 37
45#define SIGRTMAX _NSIG /* it's 44 under HP/UX */
46
47/*
48 * SA_FLAGS values:
49 *
50 * SA_ONSTACK indicates that a registered stack_t will be used.
51 * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
52 * SA_RESTART flag to get restarting signals (which were the default long ago)
53 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
54 * SA_RESETHAND clears the handler when the signal is delivered.
55 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
56 * SA_NODEFER prevents the current signal from being masked in the handler.
57 *
58 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
59 * Unix names RESETHAND and NODEFER respectively.
60 */
61#define SA_ONSTACK 0x00000001
62#define SA_RESETHAND 0x00000004
63#define SA_NOCLDSTOP 0x00000008
64#define SA_SIGINFO 0x00000010
65#define SA_NODEFER 0x00000020
66#define SA_RESTART 0x00000040
67#define SA_NOCLDWAIT 0x00000080
68#define _SA_SIGGFAULT 0x00000100 /* HPUX */
69
70#define SA_NOMASK SA_NODEFER
71#define SA_ONESHOT SA_RESETHAND
72#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */
73
74#define SA_RESTORER 0x04000000 /* obsolete -- ignored */
75
76/*
77 * sigaltstack controls
78 */
79#define SS_ONSTACK 1
80#define SS_DISABLE 2
81
82#define MINSIGSTKSZ 2048
83#define SIGSTKSZ 8192
84
85#ifdef __KERNEL__
86
87#define _NSIG 64
88/* bits-per-word, where word apparently means 'long' not 'int' */
89#define _NSIG_BPW BITS_PER_LONG
90#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
91
92/*
93 * These values of sa_flags are used only by the kernel as part of the
94 * irq handling routines.
95 *
96 * SA_INTERRUPT is also used by the irq handling routines.
97 * SA_SHIRQ is for shared interrupt support on PCI and EISA.
98 */
99#define SA_PROBE SA_ONESHOT
100#define SA_SAMPLE_RANDOM SA_RESTART
101#define SA_SHIRQ 0x04000000
102
103#endif /* __KERNEL__ */
104
105#define SIG_BLOCK 0 /* for blocking signals */
106#define SIG_UNBLOCK 1 /* for unblocking signals */
107#define SIG_SETMASK 2 /* for setting the signal mask */
108
109#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
110#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
111#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
112
113# ifndef __ASSEMBLY__
114
115# include <linux/types.h>
116
117/* Avoid too many header ordering problems. */
118struct siginfo;
119
120/* Type of a signal handler. */
121#ifdef __LP64__
122/* function pointers on 64-bit parisc are pointers to little structs and the
123 * compiler doesn't support code which changes or tests the address of
124 * the function in the little struct. This is really ugly -PB
125 */
126typedef char __user *__sighandler_t;
127#else
128typedef void __signalfn_t(int);
129typedef __signalfn_t __user *__sighandler_t;
130#endif
131
132typedef struct sigaltstack {
133 void __user *ss_sp;
134 int ss_flags;
135 size_t ss_size;
136} stack_t;
137
138#ifdef __KERNEL__
139
140/* Most things should be clean enough to redefine this at will, if care
141 is taken to make libc match. */
142
143typedef unsigned long old_sigset_t; /* at least 32 bits */
144
145typedef struct {
146 /* next_signal() assumes this is a long - no choice */
147 unsigned long sig[_NSIG_WORDS];
148} sigset_t;
149
150struct sigaction {
151 __sighandler_t sa_handler;
152 unsigned long sa_flags;
153 sigset_t sa_mask; /* mask last for extensibility */
154};
155
156struct k_sigaction {
157 struct sigaction sa;
158};
159
160#define ptrace_signal_deliver(regs, cookie) do { } while (0)
161
162#include <asm/sigcontext.h>
163
164#endif /* __KERNEL__ */
165#endif /* !__ASSEMBLY */
166#endif /* _ASM_PARISC_SIGNAL_H */
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
new file mode 100644
index 000000000000..fde77ac35463
--- /dev/null
+++ b/include/asm-parisc/smp.h
@@ -0,0 +1,69 @@
1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H
3
4#include <linux/config.h>
5
6#if defined(CONFIG_SMP)
7
8/* Page Zero Location PDC will look for the address to branch to when we poke
9** slave CPUs still in "Icache loop".
10*/
11#define PDC_OS_BOOT_RENDEZVOUS 0x10
12#define PDC_OS_BOOT_RENDEZVOUS_HI 0x28
13
14#ifndef ASSEMBLY
15#include <linux/bitops.h>
16#include <linux/threads.h> /* for NR_CPUS */
17#include <linux/cpumask.h>
18typedef unsigned long address_t;
19
20extern cpumask_t cpu_online_map;
21
22
23/*
24 * Private routines/data
25 *
26 * physical and logical are equivalent until we support CPU hotplug.
27 */
28#define cpu_number_map(cpu) (cpu)
29#define cpu_logical_map(cpu) (cpu)
30
31extern void smp_send_reschedule(int cpu);
32
33#endif /* !ASSEMBLY */
34
35/*
36 * This magic constant controls our willingness to transfer
37 * a process across CPUs. Such a transfer incurs cache and tlb
38 * misses. The current value is inherited from i386. Still needs
39 * to be tuned for parisc.
40 */
41
42#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
43
44#undef ENTRY_SYS_CPUS
45#ifdef ENTRY_SYS_CPUS
46#define STATE_RENDEZVOUS 0
47#define STATE_STOPPED 1
48#define STATE_RUNNING 2
49#define STATE_HALTED 3
50#endif
51
52extern unsigned long cpu_present_mask;
53
54#define smp_processor_id() (current_thread_info()->cpu)
55
56#endif /* CONFIG_SMP */
57
58#define NO_PROC_ID 0xFF /* No processor magic marker */
59#define ANY_PROC_ID 0xFF /* Any processor magic marker */
60static inline int __cpu_disable (void) {
61 return 0;
62}
63static inline void __cpu_die (unsigned int cpu) {
64 while(1)
65 ;
66}
67extern int __cpu_up (unsigned int cpu);
68
69#endif /* __ASM_SMP_H */
diff --git a/include/asm-parisc/socket.h b/include/asm-parisc/socket.h
new file mode 100644
index 000000000000..4a77996c1862
--- /dev/null
+++ b/include/asm-parisc/socket.h
@@ -0,0 +1,50 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 0xffff
8
9#define SO_DEBUG 0x0001
10#define SO_REUSEADDR 0x0004
11#define SO_KEEPALIVE 0x0008
12#define SO_DONTROUTE 0x0010
13#define SO_BROADCAST 0x0020
14#define SO_LINGER 0x0080
15#define SO_OOBINLINE 0x0100
16/* To add :#define SO_REUSEPORT 0x0200 */
17#define SO_SNDBUF 0x1001
18#define SO_RCVBUF 0x1002
19#define SO_SNDLOWAT 0x1003
20#define SO_RCVLOWAT 0x1004
21#define SO_SNDTIMEO 0x1005
22#define SO_RCVTIMEO 0x1006
23#define SO_ERROR 0x1007
24#define SO_TYPE 0x1008
25#define SO_PEERNAME 0x2000
26
27#define SO_NO_CHECK 0x400b
28#define SO_PRIORITY 0x400c
29#define SO_BSDCOMPAT 0x400e
30#define SO_PASSCRED 0x4010
31#define SO_PEERCRED 0x4011
32#define SO_TIMESTAMP 0x4012
33#define SCM_TIMESTAMP SO_TIMESTAMP
34
35/* Security levels - as per NRL IPv6 - don't actually do anything */
36#define SO_SECURITY_AUTHENTICATION 0x4016
37#define SO_SECURITY_ENCRYPTION_TRANSPORT 0x4017
38#define SO_SECURITY_ENCRYPTION_NETWORK 0x4018
39
40#define SO_BINDTODEVICE 0x4019
41
42/* Socket filtering */
43#define SO_ATTACH_FILTER 0x401a
44#define SO_DETACH_FILTER 0x401b
45
46#define SO_ACCEPTCONN 0x401c
47
48#define SO_PEERSEC 0x401d
49
50#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-parisc/sockios.h b/include/asm-parisc/sockios.h
new file mode 100644
index 000000000000..aace49629949
--- /dev/null
+++ b/include/asm-parisc/sockios.h
@@ -0,0 +1,12 @@
1#ifndef __ARCH_PARISC_SOCKIOS__
2#define __ARCH_PARISC_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp */
11
12#endif
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h
new file mode 100644
index 000000000000..679ea1c651ef
--- /dev/null
+++ b/include/asm-parisc/spinlock.h
@@ -0,0 +1,258 @@
1#ifndef __ASM_SPINLOCK_H
2#define __ASM_SPINLOCK_H
3
4#include <asm/system.h>
5
6/* Note that PA-RISC has to use `1' to mean unlocked and `0' to mean locked
7 * since it only has load-and-zero. Moreover, at least on some PA processors,
8 * the semaphore address has to be 16-byte aligned.
9 */
10
11#ifndef CONFIG_DEBUG_SPINLOCK
12
13#define __SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 } }
14#undef SPIN_LOCK_UNLOCKED
15#define SPIN_LOCK_UNLOCKED (spinlock_t) __SPIN_LOCK_UNLOCKED
16
17#define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while(0)
18
19static inline int spin_is_locked(spinlock_t *x)
20{
21 volatile unsigned int *a = __ldcw_align(x);
22 return *a == 0;
23}
24
25#define spin_unlock_wait(x) do { barrier(); } while(spin_is_locked(x))
26#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
27
28static inline void _raw_spin_lock(spinlock_t *x)
29{
30 volatile unsigned int *a;
31
32 mb();
33 a = __ldcw_align(x);
34 while (__ldcw(a) == 0)
35 while (*a == 0);
36 mb();
37}
38
39static inline void _raw_spin_unlock(spinlock_t *x)
40{
41 volatile unsigned int *a;
42 mb();
43 a = __ldcw_align(x);
44 *a = 1;
45 mb();
46}
47
48static inline int _raw_spin_trylock(spinlock_t *x)
49{
50 volatile unsigned int *a;
51 int ret;
52
53 mb();
54 a = __ldcw_align(x);
55 ret = __ldcw(a) != 0;
56 mb();
57
58 return ret;
59}
60
61#define spin_lock_own(LOCK, LOCATION) ((void)0)
62
63#else /* !(CONFIG_DEBUG_SPINLOCK) */
64
65#define SPINLOCK_MAGIC 0x1D244B3C
66
67#define __SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 }, SPINLOCK_MAGIC, 10, __FILE__ , NULL, 0, -1, NULL, NULL }
68#undef SPIN_LOCK_UNLOCKED
69#define SPIN_LOCK_UNLOCKED (spinlock_t) __SPIN_LOCK_UNLOCKED
70
71#define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while(0)
72
73#define CHECK_LOCK(x) \
74 do { \
75 if (unlikely((x)->magic != SPINLOCK_MAGIC)) { \
76 printk(KERN_ERR "%s:%d: spin_is_locked" \
77 " on uninitialized spinlock %p.\n", \
78 __FILE__, __LINE__, (x)); \
79 } \
80 } while(0)
81
82#define spin_is_locked(x) \
83 ({ \
84 CHECK_LOCK(x); \
85 volatile unsigned int *a = __ldcw_align(x); \
86 if (unlikely((*a == 0) && (x)->babble)) { \
87 (x)->babble--; \
88 printk("KERN_WARNING \
89 %s:%d: spin_is_locked(%s/%p) already" \
90 " locked by %s:%d in %s at %p(%d)\n", \
91 __FILE__,__LINE__, (x)->module, (x), \
92 (x)->bfile, (x)->bline, (x)->task->comm,\
93 (x)->previous, (x)->oncpu); \
94 } \
95 *a == 0; \
96 })
97
98#define spin_unlock_wait(x) \
99 do { \
100 CHECK_LOCK(x); \
101 volatile unsigned int *a = __ldcw_align(x); \
102 if (unlikely((*a == 0) && (x)->babble)) { \
103 (x)->babble--; \
104 printk("KERN_WARNING \
105 %s:%d: spin_unlock_wait(%s/%p)" \
106 " owned by %s:%d in %s at %p(%d)\n", \
107 __FILE__,__LINE__, (x)->module, (x), \
108 (x)->bfile, (x)->bline, (x)->task->comm,\
109 (x)->previous, (x)->oncpu); \
110 } \
111 barrier(); \
112 } while (*((volatile unsigned char *)(__ldcw_align(x))) == 0)
113
114extern void _dbg_spin_lock(spinlock_t *lock, const char *base_file, int line_no);
115extern void _dbg_spin_unlock(spinlock_t *lock, const char *, int);
116extern int _dbg_spin_trylock(spinlock_t * lock, const char *, int);
117
118#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
119
120#define _raw_spin_unlock(lock) _dbg_spin_unlock(lock, __FILE__, __LINE__)
121#define _raw_spin_lock(lock) _dbg_spin_lock(lock, __FILE__, __LINE__)
122#define _raw_spin_trylock(lock) _dbg_spin_trylock(lock, __FILE__, __LINE__)
123
124/* just in case we need it */
125#define spin_lock_own(LOCK, LOCATION) \
126do { \
127 volatile unsigned int *a = __ldcw_align(LOCK); \
128 if (!((*a == 0) && ((LOCK)->oncpu == smp_processor_id()))) \
129 printk("KERN_WARNING \
130 %s: called on %d from %p but lock %s on %d\n", \
131 LOCATION, smp_processor_id(), \
132 __builtin_return_address(0), \
133 (*a == 0) ? "taken" : "freed", (LOCK)->on_cpu); \
134} while (0)
135
136#endif /* !(CONFIG_DEBUG_SPINLOCK) */
137
138/*
139 * Read-write spinlocks, allowing multiple readers
140 * but only one writer.
141 */
142typedef struct {
143 spinlock_t lock;
144 volatile int counter;
145#ifdef CONFIG_PREEMPT
146 unsigned int break_lock;
147#endif
148} rwlock_t;
149
150#define RW_LOCK_UNLOCKED (rwlock_t) { __SPIN_LOCK_UNLOCKED, 0 }
151
152#define rwlock_init(lp) do { *(lp) = RW_LOCK_UNLOCKED; } while (0)
153
154#define _raw_read_trylock(lock) generic_raw_read_trylock(lock)
155
156/* read_lock, read_unlock are pretty straightforward. Of course it somehow
157 * sucks we end up saving/restoring flags twice for read_lock_irqsave aso. */
158
159#ifdef CONFIG_DEBUG_RWLOCK
160extern void _dbg_read_lock(rwlock_t * rw, const char *bfile, int bline);
161#define _raw_read_lock(rw) _dbg_read_lock(rw, __FILE__, __LINE__)
162#else
163static __inline__ void _raw_read_lock(rwlock_t *rw)
164{
165 unsigned long flags;
166 local_irq_save(flags);
167 _raw_spin_lock(&rw->lock);
168
169 rw->counter++;
170
171 _raw_spin_unlock(&rw->lock);
172 local_irq_restore(flags);
173}
174#endif /* CONFIG_DEBUG_RWLOCK */
175
176static __inline__ void _raw_read_unlock(rwlock_t *rw)
177{
178 unsigned long flags;
179 local_irq_save(flags);
180 _raw_spin_lock(&rw->lock);
181
182 rw->counter--;
183
184 _raw_spin_unlock(&rw->lock);
185 local_irq_restore(flags);
186}
187
188/* write_lock is less trivial. We optimistically grab the lock and check
189 * if we surprised any readers. If so we release the lock and wait till
190 * they're all gone before trying again
191 *
192 * Also note that we don't use the _irqsave / _irqrestore suffixes here.
193 * If we're called with interrupts enabled and we've got readers (or other
194 * writers) in interrupt handlers someone fucked up and we'd dead-lock
195 * sooner or later anyway. prumpf */
196
197#ifdef CONFIG_DEBUG_RWLOCK
198extern void _dbg_write_lock(rwlock_t * rw, const char *bfile, int bline);
199#define _raw_write_lock(rw) _dbg_write_lock(rw, __FILE__, __LINE__)
200#else
201static __inline__ void _raw_write_lock(rwlock_t *rw)
202{
203retry:
204 _raw_spin_lock(&rw->lock);
205
206 if(rw->counter != 0) {
207 /* this basically never happens */
208 _raw_spin_unlock(&rw->lock);
209
210 while(rw->counter != 0);
211
212 goto retry;
213 }
214
215 /* got it. now leave without unlocking */
216 rw->counter = -1; /* remember we are locked */
217}
218#endif /* CONFIG_DEBUG_RWLOCK */
219
220/* write_unlock is absolutely trivial - we don't have to wait for anything */
221
222static __inline__ void _raw_write_unlock(rwlock_t *rw)
223{
224 rw->counter = 0;
225 _raw_spin_unlock(&rw->lock);
226}
227
228#ifdef CONFIG_DEBUG_RWLOCK
229extern int _dbg_write_trylock(rwlock_t * rw, const char *bfile, int bline);
230#define _raw_write_trylock(rw) _dbg_write_trylock(rw, __FILE__, __LINE__)
231#else
232static __inline__ int _raw_write_trylock(rwlock_t *rw)
233{
234 _raw_spin_lock(&rw->lock);
235 if (rw->counter != 0) {
236 /* this basically never happens */
237 _raw_spin_unlock(&rw->lock);
238
239 return 0;
240 }
241
242 /* got it. now leave without unlocking */
243 rw->counter = -1; /* remember we are locked */
244 return 1;
245}
246#endif /* CONFIG_DEBUG_RWLOCK */
247
248static __inline__ int is_read_locked(rwlock_t *rw)
249{
250 return rw->counter > 0;
251}
252
253static __inline__ int is_write_locked(rwlock_t *rw)
254{
255 return rw->counter < 0;
256}
257
258#endif /* __ASM_SPINLOCK_H */
diff --git a/include/asm-parisc/stat.h b/include/asm-parisc/stat.h
new file mode 100644
index 000000000000..9d5fbbc5c31f
--- /dev/null
+++ b/include/asm-parisc/stat.h
@@ -0,0 +1,100 @@
1#ifndef _PARISC_STAT_H
2#define _PARISC_STAT_H
3
4#include <linux/types.h>
5
6struct stat {
7 unsigned int st_dev; /* dev_t is 32 bits on parisc */
8 ino_t st_ino; /* 32 bits */
9 mode_t st_mode; /* 16 bits */
10 nlink_t st_nlink; /* 16 bits */
11 unsigned short st_reserved1; /* old st_uid */
12 unsigned short st_reserved2; /* old st_gid */
13 unsigned int st_rdev;
14 off_t st_size;
15 time_t st_atime;
16 unsigned int st_atime_nsec;
17 time_t st_mtime;
18 unsigned int st_mtime_nsec;
19 time_t st_ctime;
20 unsigned int st_ctime_nsec;
21 int st_blksize;
22 int st_blocks;
23 unsigned int __unused1; /* ACL stuff */
24 unsigned int __unused2; /* network */
25 ino_t __unused3; /* network */
26 unsigned int __unused4; /* cnodes */
27 unsigned short __unused5; /* netsite */
28 short st_fstype;
29 unsigned int st_realdev;
30 unsigned short st_basemode;
31 unsigned short st_spareshort;
32 uid_t st_uid;
33 gid_t st_gid;
34 unsigned int st_spare4[3];
35};
36
37#define STAT_HAVE_NSEC
38
39typedef __kernel_off64_t off64_t;
40
41struct hpux_stat64 {
42 unsigned int st_dev; /* dev_t is 32 bits on parisc */
43 ino_t st_ino; /* 32 bits */
44 mode_t st_mode; /* 16 bits */
45 nlink_t st_nlink; /* 16 bits */
46 unsigned short st_reserved1; /* old st_uid */
47 unsigned short st_reserved2; /* old st_gid */
48 unsigned int st_rdev;
49 off64_t st_size;
50 time_t st_atime;
51 unsigned int st_spare1;
52 time_t st_mtime;
53 unsigned int st_spare2;
54 time_t st_ctime;
55 unsigned int st_spare3;
56 int st_blksize;
57 __u64 st_blocks;
58 unsigned int __unused1; /* ACL stuff */
59 unsigned int __unused2; /* network */
60 ino_t __unused3; /* network */
61 unsigned int __unused4; /* cnodes */
62 unsigned short __unused5; /* netsite */
63 short st_fstype;
64 unsigned int st_realdev;
65 unsigned short st_basemode;
66 unsigned short st_spareshort;
67 uid_t st_uid;
68 gid_t st_gid;
69 unsigned int st_spare4[3];
70};
71
72/* This is the struct that 32-bit userspace applications are expecting.
73 * How 64-bit apps are going to be compiled, I have no idea. But at least
74 * this way, we don't have a wrapper in the kernel.
75 */
76struct stat64 {
77 unsigned long long st_dev;
78 unsigned int __pad1;
79
80 unsigned int __st_ino; /* Not actually filled in */
81 unsigned int st_mode;
82 unsigned int st_nlink;
83 unsigned int st_uid;
84 unsigned int st_gid;
85 unsigned long long st_rdev;
86 unsigned int __pad2;
87 signed long long st_size;
88 signed int st_blksize;
89
90 signed long long st_blocks;
91 signed int st_atime;
92 unsigned int st_atime_nsec;
93 signed int st_mtime;
94 unsigned int st_mtime_nsec;
95 signed int st_ctime;
96 unsigned int st_ctime_nsec;
97 unsigned long long st_ino;
98};
99
100#endif
diff --git a/include/asm-parisc/statfs.h b/include/asm-parisc/statfs.h
new file mode 100644
index 000000000000..a52d8f93f05c
--- /dev/null
+++ b/include/asm-parisc/statfs.h
@@ -0,0 +1,58 @@
1#ifndef _PARISC_STATFS_H
2#define _PARISC_STATFS_H
3
4#ifndef __KERNEL_STRICT_NAMES
5
6#include <linux/types.h>
7
8typedef __kernel_fsid_t fsid_t;
9
10#endif
11
12/*
13 * It appears that PARISC could be 64 _or_ 32 bit.
14 * 64-bit fields must be explicitly 64-bit in statfs64.
15 */
16struct statfs {
17 long f_type;
18 long f_bsize;
19 long f_blocks;
20 long f_bfree;
21 long f_bavail;
22 long f_files;
23 long f_ffree;
24 __kernel_fsid_t f_fsid;
25 long f_namelen;
26 long f_frsize;
27 long f_spare[5];
28};
29
30struct statfs64 {
31 long f_type;
32 long f_bsize;
33 u64 f_blocks;
34 u64 f_bfree;
35 u64 f_bavail;
36 u64 f_files;
37 u64 f_ffree;
38 __kernel_fsid_t f_fsid;
39 long f_namelen;
40 long f_frsize;
41 long f_spare[5];
42};
43
44struct compat_statfs64 {
45 __u32 f_type;
46 __u32 f_bsize;
47 __u64 f_blocks;
48 __u64 f_bfree;
49 __u64 f_bavail;
50 __u64 f_files;
51 __u64 f_ffree;
52 __kernel_fsid_t f_fsid;
53 __u32 f_namelen;
54 __u32 f_frsize;
55 __u32 f_spare[5];
56};
57
58#endif
diff --git a/include/asm-parisc/string.h b/include/asm-parisc/string.h
new file mode 100644
index 000000000000..eda01be65e35
--- /dev/null
+++ b/include/asm-parisc/string.h
@@ -0,0 +1,10 @@
1#ifndef _PA_STRING_H_
2#define _PA_STRING_H_
3
4#define __HAVE_ARCH_MEMSET
5extern void * memset(void *, int, size_t);
6
7#define __HAVE_ARCH_MEMCPY
8void * memcpy(void * dest,const void *src,size_t count);
9
10#endif
diff --git a/include/asm-parisc/superio.h b/include/asm-parisc/superio.h
new file mode 100644
index 000000000000..6598acb4d46d
--- /dev/null
+++ b/include/asm-parisc/superio.h
@@ -0,0 +1,85 @@
1#ifndef _PARISC_SUPERIO_H
2#define _PARISC_SUPERIO_H
3
4#define IC_PIC1 0x20 /* PCI I/O address of master 8259 */
5#define IC_PIC2 0xA0 /* PCI I/O address of slave */
6
7/* Config Space Offsets to configuration and base address registers */
8#define SIO_CR 0x5A /* Configuration Register */
9#define SIO_ACPIBAR 0x88 /* ACPI BAR */
10#define SIO_FDCBAR 0x90 /* Floppy Disk Controller BAR */
11#define SIO_SP1BAR 0x94 /* Serial 1 BAR */
12#define SIO_SP2BAR 0x98 /* Serial 2 BAR */
13#define SIO_PPBAR 0x9C /* Parallel BAR */
14
15#define TRIGGER_1 0x67 /* Edge/level trigger register 1 */
16#define TRIGGER_2 0x68 /* Edge/level trigger register 2 */
17
18/* Interrupt Routing Control registers */
19#define CFG_IR_SER 0x69 /* Serial 1 [0:3] and Serial 2 [4:7] */
20#define CFG_IR_PFD 0x6a /* Parallel [0:3] and Floppy [4:7] */
21#define CFG_IR_IDE 0x6b /* IDE1 [0:3] and IDE2 [4:7] */
22#define CFG_IR_INTAB 0x6c /* PCI INTA [0:3] and INT B [4:7] */
23#define CFG_IR_INTCD 0x6d /* PCI INTC [0:3] and INT D [4:7] */
24#define CFG_IR_PS2 0x6e /* PS/2 KBINT [0:3] and Mouse [4:7] */
25#define CFG_IR_FXBUS 0x6f /* FXIRQ[0] [0:3] and FXIRQ[1] [4:7] */
26#define CFG_IR_USB 0x70 /* FXIRQ[2] [0:3] and USB [4:7] */
27#define CFG_IR_ACPI 0x71 /* ACPI SCI [0:3] and reserved [4:7] */
28
29#define CFG_IR_LOW CFG_IR_SER /* Lowest interrupt routing reg */
30#define CFG_IR_HIGH CFG_IR_ACPI /* Highest interrupt routing reg */
31
32/* 8259 operational control words */
33#define OCW2_EOI 0x20 /* Non-specific EOI */
34#define OCW2_SEOI 0x60 /* Specific EOI */
35#define OCW3_IIR 0x0A /* Read request register */
36#define OCW3_ISR 0x0B /* Read service register */
37#define OCW3_POLL 0x0C /* Poll the PIC for an interrupt vector */
38
39/* Interrupt lines. Only PIC1 is used */
40#define USB_IRQ 1 /* USB */
41#define SP1_IRQ 3 /* Serial port 1 */
42#define SP2_IRQ 4 /* Serial port 2 */
43#define PAR_IRQ 5 /* Parallel port */
44#define FDC_IRQ 6 /* Floppy controller */
45#define IDE_IRQ 7 /* IDE (pri+sec) */
46
47/* ACPI registers */
48#define USB_REG_CR 0x1f /* USB Regulator Control Register */
49
50#define SUPERIO_NIRQS 8
51
52struct superio_device {
53 u32 fdc_base;
54 u32 sp1_base;
55 u32 sp2_base;
56 u32 pp_base;
57 u32 acpi_base;
58 int suckyio_irq_enabled;
59 struct pci_dev *lio_pdev; /* pci device for legacy IO (fn 1) */
60 struct pci_dev *usb_pdev; /* pci device for USB (fn 2) */
61};
62
63/*
64 * Does NS make a 87415 based plug in PCI card? If so, because of this
65 * macro we currently don't support it being plugged into a machine
66 * that contains a SuperIO chip AND has CONFIG_SUPERIO enabled.
67 *
68 * This could be fixed by checking to see if function 1 exists, and
69 * if it is SuperIO Legacy IO; but really now, is this combination
70 * going to EVER happen?
71 */
72
73#define SUPERIO_IDE_FN 0 /* Function number of IDE controller */
74#define SUPERIO_LIO_FN 1 /* Function number of Legacy IO controller */
75#define SUPERIO_USB_FN 2 /* Function number of USB controller */
76
77#define is_superio_device(x) \
78 (((x)->vendor == PCI_VENDOR_ID_NS) && \
79 ( ((x)->device == PCI_DEVICE_ID_NS_87415) \
80 || ((x)->device == PCI_DEVICE_ID_NS_87560_LIO) \
81 || ((x)->device == PCI_DEVICE_ID_NS_87560_USB) ) )
82
83extern int superio_fixup_irq(struct pci_dev *pcidev); /* called by iosapic */
84
85#endif /* _PARISC_SUPERIO_H */
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
new file mode 100644
index 000000000000..81c543339036
--- /dev/null
+++ b/include/asm-parisc/system.h
@@ -0,0 +1,210 @@
1#ifndef __PARISC_SYSTEM_H
2#define __PARISC_SYSTEM_H
3
4#include <linux/config.h>
5#include <asm/psw.h>
6
7/* The program status word as bitfields. */
8struct pa_psw {
9 unsigned int y:1;
10 unsigned int z:1;
11 unsigned int rv:2;
12 unsigned int w:1;
13 unsigned int e:1;
14 unsigned int s:1;
15 unsigned int t:1;
16
17 unsigned int h:1;
18 unsigned int l:1;
19 unsigned int n:1;
20 unsigned int x:1;
21 unsigned int b:1;
22 unsigned int c:1;
23 unsigned int v:1;
24 unsigned int m:1;
25
26 unsigned int cb:8;
27
28 unsigned int o:1;
29 unsigned int g:1;
30 unsigned int f:1;
31 unsigned int r:1;
32 unsigned int q:1;
33 unsigned int p:1;
34 unsigned int d:1;
35 unsigned int i:1;
36};
37
38#ifdef __LP64__
39#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
40#else
41#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
42#endif
43
44struct task_struct;
45
46extern struct task_struct *_switch_to(struct task_struct *, struct task_struct *);
47
48#define switch_to(prev, next, last) do { \
49 (last) = _switch_to(prev, next); \
50} while(0)
51
52
53
54/* interrupt control */
55#define local_save_flags(x) __asm__ __volatile__("ssm 0, %0" : "=r" (x) : : "memory")
56#define local_irq_disable() __asm__ __volatile__("rsm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
57#define local_irq_enable() __asm__ __volatile__("ssm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
58
59#define local_irq_save(x) \
60 __asm__ __volatile__("rsm %1,%0" : "=r" (x) :"i" (PSW_I) : "memory" )
61#define local_irq_restore(x) \
62 __asm__ __volatile__("mtsm %0" : : "r" (x) : "memory" )
63
64#define irqs_disabled() \
65({ \
66 unsigned long flags; \
67 local_save_flags(flags); \
68 (flags & PSW_I) == 0; \
69})
70
71#define mfctl(reg) ({ \
72 unsigned long cr; \
73 __asm__ __volatile__( \
74 "mfctl " #reg ",%0" : \
75 "=r" (cr) \
76 ); \
77 cr; \
78})
79
80#define mtctl(gr, cr) \
81 __asm__ __volatile__("mtctl %0,%1" \
82 : /* no outputs */ \
83 : "r" (gr), "i" (cr) : "memory")
84
85/* these are here to de-mystefy the calling code, and to provide hooks */
86/* which I needed for debugging EIEM problems -PB */
87#define get_eiem() mfctl(15)
88static inline void set_eiem(unsigned long val)
89{
90 mtctl(val, 15);
91}
92
93#define mfsp(reg) ({ \
94 unsigned long cr; \
95 __asm__ __volatile__( \
96 "mfsp " #reg ",%0" : \
97 "=r" (cr) \
98 ); \
99 cr; \
100})
101
102#define mtsp(gr, cr) \
103 __asm__ __volatile__("mtsp %0,%1" \
104 : /* no outputs */ \
105 : "r" (gr), "i" (cr) : "memory")
106
107
108/*
109** This is simply the barrier() macro from linux/kernel.h but when serial.c
110** uses tqueue.h uses smp_mb() defined using barrier(), linux/kernel.h
111** hasn't yet been included yet so it fails, thus repeating the macro here.
112**
113** PA-RISC architecture allows for weakly ordered memory accesses although
114** none of the processors use it. There is a strong ordered bit that is
115** set in the O-bit of the page directory entry. Operating systems that
116** can not tolerate out of order accesses should set this bit when mapping
117** pages. The O-bit of the PSW should also be set to 1 (I don't believe any
118** of the processor implemented the PSW O-bit). The PCX-W ERS states that
119** the TLB O-bit is not implemented so the page directory does not need to
120** have the O-bit set when mapping pages (section 3.1). This section also
121** states that the PSW Y, Z, G, and O bits are not implemented.
122** So it looks like nothing needs to be done for parisc-linux (yet).
123** (thanks to chada for the above comment -ggg)
124**
125** The __asm__ op below simple prevents gcc/ld from reordering
126** instructions across the mb() "call".
127*/
128#define mb() __asm__ __volatile__("":::"memory") /* barrier() */
129#define rmb() mb()
130#define wmb() mb()
131#define smp_mb() mb()
132#define smp_rmb() mb()
133#define smp_wmb() mb()
134#define smp_read_barrier_depends() do { } while(0)
135#define read_barrier_depends() do { } while(0)
136
137#define set_mb(var, value) do { var = value; mb(); } while (0)
138#define set_wmb(var, value) do { var = value; wmb(); } while (0)
139
140
141/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
142#define __ldcw(a) ({ \
143 unsigned __ret; \
144 __asm__ __volatile__("ldcw 0(%1),%0" : "=r" (__ret) : "r" (a)); \
145 __ret; \
146})
147
148/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
149 and GCC only guarantees 8-byte alignment for stack locals, we can't
150 be assured of 16-byte alignment for atomic lock data even if we
151 specify "__attribute ((aligned(16)))" in the type declaration. So,
152 we use a struct containing an array of four ints for the atomic lock
153 type and dynamically select the 16-byte aligned int from the array
154 for the semaphore. */
155#define __PA_LDCW_ALIGNMENT 16
156#define __ldcw_align(a) ({ \
157 unsigned long __ret = (unsigned long) &(a)->lock[0]; \
158 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \
159 (volatile unsigned int *) __ret; \
160})
161
162#ifdef CONFIG_SMP
163/*
164 * Your basic SMP spinlocks, allowing only a single CPU anywhere
165 */
166
167typedef struct {
168 volatile unsigned int lock[4];
169#ifdef CONFIG_DEBUG_SPINLOCK
170 unsigned long magic;
171 volatile unsigned int babble;
172 const char *module;
173 char *bfile;
174 int bline;
175 int oncpu;
176 void *previous;
177 struct task_struct * task;
178#endif
179#ifdef CONFIG_PREEMPT
180 unsigned int break_lock;
181#endif
182} spinlock_t;
183
184#define __lock_aligned __attribute__((__section__(".data.lock_aligned")))
185
186#endif
187
188#define KERNEL_START (0x10100000 - 0x1000)
189
190/* This is for the serialisation of PxTLB broadcasts. At least on the
191 * N class systems, only one PxTLB inter processor broadcast can be
192 * active at any one time on the Merced bus. This tlb purge
193 * synchronisation is fairly lightweight and harmless so we activate
194 * it on all SMP systems not just the N class. */
195#ifdef CONFIG_SMP
196extern spinlock_t pa_tlb_lock;
197
198#define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
199#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
200
201#else
202
203#define purge_tlb_start(x) do { } while(0)
204#define purge_tlb_end(x) do { } while (0)
205
206#endif
207
208#define arch_align_stack(x) (x)
209
210#endif
diff --git a/include/asm-parisc/termbits.h b/include/asm-parisc/termbits.h
new file mode 100644
index 000000000000..372b634892c9
--- /dev/null
+++ b/include/asm-parisc/termbits.h
@@ -0,0 +1,175 @@
1#ifndef __ARCH_PARISC_TERMBITS_H__
2#define __ARCH_PARISC_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20/* c_cc characters */
21#define VINTR 0
22#define VQUIT 1
23#define VERASE 2
24#define VKILL 3
25#define VEOF 4
26#define VTIME 5
27#define VMIN 6
28#define VSWTC 7
29#define VSTART 8
30#define VSTOP 9
31#define VSUSP 10
32#define VEOL 11
33#define VREPRINT 12
34#define VDISCARD 13
35#define VWERASE 14
36#define VLNEXT 15
37#define VEOL2 16
38
39
40/* c_iflag bits */
41#define IGNBRK 0000001
42#define BRKINT 0000002
43#define IGNPAR 0000004
44#define PARMRK 0000010
45#define INPCK 0000020
46#define ISTRIP 0000040
47#define INLCR 0000100
48#define IGNCR 0000200
49#define ICRNL 0000400
50#define IUCLC 0001000
51#define IXON 0002000
52#define IXANY 0004000
53#define IXOFF 0010000
54#define IMAXBEL 0040000
55#define IUTF8 0100000
56
57/* c_oflag bits */
58#define OPOST 0000001
59#define OLCUC 0000002
60#define ONLCR 0000004
61#define OCRNL 0000010
62#define ONOCR 0000020
63#define ONLRET 0000040
64#define OFILL 0000100
65#define OFDEL 0000200
66#define NLDLY 0000400
67#define NL0 0000000
68#define NL1 0000400
69#define CRDLY 0003000
70#define CR0 0000000
71#define CR1 0001000
72#define CR2 0002000
73#define CR3 0003000
74#define TABDLY 0014000
75#define TAB0 0000000
76#define TAB1 0004000
77#define TAB2 0010000
78#define TAB3 0014000
79#define XTABS 0014000
80#define BSDLY 0020000
81#define BS0 0000000
82#define BS1 0020000
83#define VTDLY 0040000
84#define VT0 0000000
85#define VT1 0040000
86#define FFDLY 0100000
87#define FF0 0000000
88#define FF1 0100000
89
90/* c_cflag bit meaning */
91#define CBAUD 0010017
92#define B0 0000000 /* hang up */
93#define B50 0000001
94#define B75 0000002
95#define B110 0000003
96#define B134 0000004
97#define B150 0000005
98#define B200 0000006
99#define B300 0000007
100#define B600 0000010
101#define B1200 0000011
102#define B1800 0000012
103#define B2400 0000013
104#define B4800 0000014
105#define B9600 0000015
106#define B19200 0000016
107#define B38400 0000017
108#define EXTA B19200
109#define EXTB B38400
110#define CSIZE 0000060
111#define CS5 0000000
112#define CS6 0000020
113#define CS7 0000040
114#define CS8 0000060
115#define CSTOPB 0000100
116#define CREAD 0000200
117#define PARENB 0000400
118#define PARODD 0001000
119#define HUPCL 0002000
120#define CLOCAL 0004000
121#define CBAUDEX 0010000
122#define B57600 0010001
123#define B115200 0010002
124#define B230400 0010003
125#define B460800 0010004
126#define B500000 0010005
127#define B576000 0010006
128#define B921600 0010007
129#define B1000000 0010010
130#define B1152000 0010011
131#define B1500000 0010012
132#define B2000000 0010013
133#define B2500000 0010014
134#define B3000000 0010015
135#define B3500000 0010016
136#define B4000000 0010017
137#define CIBAUD 002003600000 /* input baud rate (not used) */
138#define CMSPAR 010000000000 /* mark or space (stick) parity */
139#define CRTSCTS 020000000000 /* flow control */
140
141
142/* c_lflag bits */
143#define ISIG 0000001
144#define ICANON 0000002
145#define XCASE 0000004
146#define ECHO 0000010
147#define ECHOE 0000020
148#define ECHOK 0000040
149#define ECHONL 0000100
150#define NOFLSH 0000200
151#define TOSTOP 0000400
152#define ECHOCTL 0001000
153#define ECHOPRT 0002000
154#define ECHOKE 0004000
155#define FLUSHO 0010000
156#define PENDIN 0040000
157#define IEXTEN 0100000
158
159/* tcflow() and TCXONC use these */
160#define TCOOFF 0
161#define TCOON 1
162#define TCIOFF 2
163#define TCION 3
164
165/* tcflush() and TCFLSH use these */
166#define TCIFLUSH 0
167#define TCOFLUSH 1
168#define TCIOFLUSH 2
169
170/* tcsetattr uses these */
171#define TCSANOW 0
172#define TCSADRAIN 1
173#define TCSAFLUSH 2
174
175#endif
diff --git a/include/asm-parisc/termios.h b/include/asm-parisc/termios.h
new file mode 100644
index 000000000000..6965e8f6c3e1
--- /dev/null
+++ b/include/asm-parisc/termios.h
@@ -0,0 +1,106 @@
1#ifndef _PARISC_TERMIOS_H
2#define _PARISC_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42/* line disciplines */
43#define N_TTY 0
44#define N_SLIP 1
45#define N_MOUSE 2
46#define N_PPP 3
47#define N_STRIP 4
48#define N_AX25 5
49#define N_X25 6 /* X.25 async */
50#define N_6PACK 7
51#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */
52#define N_R3964 9 /* Reserved for Simatic R3964 module */
53#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */
54#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */
55#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */
56#define N_HDLC 13 /* synchronous HDLC */
57#define N_SYNC_PPP 14
58#define N_HCI 15 /* Bluetooth HCI UART */
59
60#ifdef __KERNEL__
61
62/* intr=^C quit=^\ erase=del kill=^U
63 eof=^D vtime=\0 vmin=\1 sxtc=\0
64 start=^Q stop=^S susp=^Z eol=\0
65 reprint=^R discard=^U werase=^W lnext=^V
66 eol2=\0
67*/
68#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
69
70/*
71 * Translate a "termio" structure into a "termios". Ugh.
72 */
73#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
74 unsigned short __tmp; \
75 get_user(__tmp,&(termio)->x); \
76 *(unsigned short *) &(termios)->x = __tmp; \
77}
78
79#define user_termio_to_kernel_termios(termios, termio) \
80({ \
81 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
82 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
83 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
84 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
85 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
86})
87
88/*
89 * Translate a "termios" structure into a "termio". Ugh.
90 */
91#define kernel_termios_to_user_termio(termio, termios) \
92({ \
93 put_user((termios)->c_iflag, &(termio)->c_iflag); \
94 put_user((termios)->c_oflag, &(termio)->c_oflag); \
95 put_user((termios)->c_cflag, &(termio)->c_cflag); \
96 put_user((termios)->c_lflag, &(termio)->c_lflag); \
97 put_user((termios)->c_line, &(termio)->c_line); \
98 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
99})
100
101#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
102#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
103
104#endif /* __KERNEL__ */
105
106#endif /* _PARISC_TERMIOS_H */
diff --git a/include/asm-parisc/thread_info.h b/include/asm-parisc/thread_info.h
new file mode 100644
index 000000000000..fe9b7f8ae4c6
--- /dev/null
+++ b/include/asm-parisc/thread_info.h
@@ -0,0 +1,80 @@
1#ifndef _ASM_PARISC_THREAD_INFO_H
2#define _ASM_PARISC_THREAD_INFO_H
3
4#ifdef __KERNEL__
5
6#ifndef __ASSEMBLY__
7#include <asm/processor.h>
8
9struct thread_info {
10 struct task_struct *task; /* main task structure */
11 struct exec_domain *exec_domain;/* execution domain */
12 unsigned long flags; /* thread_info flags (see TIF_*) */
13 mm_segment_t addr_limit; /* user-level address space limit */
14 __u32 cpu; /* current CPU */
15 __s32 preempt_count; /* 0=premptable, <0=BUG; will also serve as bh-counter */
16 struct restart_block restart_block;
17};
18
19#define INIT_THREAD_INFO(tsk) \
20{ \
21 .task = &tsk, \
22 .exec_domain = &default_exec_domain, \
23 .flags = 0, \
24 .cpu = 0, \
25 .addr_limit = KERNEL_DS, \
26 .preempt_count = 1, \
27 .restart_block = { \
28 .fn = do_no_restart_syscall \
29 } \
30}
31
32#define init_thread_info (init_thread_union.thread_info)
33#define init_stack (init_thread_union.stack)
34
35/* thread information allocation */
36
37#define THREAD_ORDER 2
38/* Be sure to hunt all references to this down when you change the size of
39 * the kernel stack */
40#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
41#define THREAD_SHIFT (PAGE_SHIFT + THREAD_ORDER)
42
43#define alloc_thread_info(tsk) ((struct thread_info *) \
44 __get_free_pages(GFP_KERNEL, THREAD_ORDER))
45#define free_thread_info(ti) free_pages((unsigned long) (ti), THREAD_ORDER)
46#define get_thread_info(ti) get_task_struct((ti)->task)
47#define put_thread_info(ti) put_task_struct((ti)->task)
48
49
50/* how to get the thread information struct from C */
51#define current_thread_info() ((struct thread_info *)mfctl(30))
52
53#endif /* !__ASSEMBLY */
54
55#define PREEMPT_ACTIVE 0x10000000
56
57/*
58 * thread information flags
59 */
60#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
61#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
62#define TIF_SIGPENDING 2 /* signal pending */
63#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
64#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling TIF_NEED_RESCHED */
65#define TIF_32BIT 5 /* 32 bit binary */
66#define TIF_MEMDIE 6
67
68#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
69#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
70#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
71#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
72#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
73#define _TIF_32BIT (1 << TIF_32BIT)
74
75#define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \
76 _TIF_NEED_RESCHED)
77
78#endif /* __KERNEL__ */
79
80#endif /* _ASM_PARISC_THREAD_INFO_H */
diff --git a/include/asm-parisc/timex.h b/include/asm-parisc/timex.h
new file mode 100644
index 000000000000..3b68d77273d9
--- /dev/null
+++ b/include/asm-parisc/timex.h
@@ -0,0 +1,20 @@
1/*
2 * linux/include/asm-parisc/timex.h
3 *
4 * PARISC architecture timex specifications
5 */
6#ifndef _ASMPARISC_TIMEX_H
7#define _ASMPARISC_TIMEX_H
8
9#include <asm/system.h>
10
11#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
12
13typedef unsigned long cycles_t;
14
15static inline cycles_t get_cycles (void)
16{
17 return mfctl(16);
18}
19
20#endif
diff --git a/include/asm-parisc/tlb.h b/include/asm-parisc/tlb.h
new file mode 100644
index 000000000000..33107a248e1f
--- /dev/null
+++ b/include/asm-parisc/tlb.h
@@ -0,0 +1,27 @@
1#ifndef _PARISC_TLB_H
2#define _PARISC_TLB_H
3
4#define tlb_flush(tlb) \
5do { if ((tlb)->fullmm) \
6 flush_tlb_mm((tlb)->mm);\
7} while (0)
8
9#define tlb_start_vma(tlb, vma) \
10do { if (!(tlb)->fullmm) \
11 flush_cache_range(vma, vma->vm_start, vma->vm_end); \
12} while (0)
13
14#define tlb_end_vma(tlb, vma) \
15do { if (!(tlb)->fullmm) \
16 flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
17} while (0)
18
19#define __tlb_remove_tlb_entry(tlb, pte, address) \
20 do { } while (0)
21
22#include <asm-generic/tlb.h>
23
24#define __pmd_free_tlb(tlb, pmd) pmd_free(pmd)
25#define __pte_free_tlb(tlb, pte) pte_free(pte)
26
27#endif
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
new file mode 100644
index 000000000000..eb27b78930e8
--- /dev/null
+++ b/include/asm-parisc/tlbflush.h
@@ -0,0 +1,95 @@
1#ifndef _PARISC_TLBFLUSH_H
2#define _PARISC_TLBFLUSH_H
3
4/* TLB flushing routines.... */
5
6#include <linux/config.h>
7#include <linux/mm.h>
8#include <asm/mmu_context.h>
9
10extern void flush_tlb_all(void);
11
12/*
13 * flush_tlb_mm()
14 *
15 * XXX This code is NOT valid for HP-UX compatibility processes,
16 * (although it will probably work 99% of the time). HP-UX
17 * processes are free to play with the space id's and save them
18 * over long periods of time, etc. so we have to preserve the
19 * space and just flush the entire tlb. We need to check the
20 * personality in order to do that, but the personality is not
21 * currently being set correctly.
22 *
23 * Of course, Linux processes could do the same thing, but
24 * we don't support that (and the compilers, dynamic linker,
25 * etc. do not do that).
26 */
27
28static inline void flush_tlb_mm(struct mm_struct *mm)
29{
30 BUG_ON(mm == &init_mm); /* Should never happen */
31
32#ifdef CONFIG_SMP
33 flush_tlb_all();
34#else
35 if (mm) {
36 if (mm->context != 0)
37 free_sid(mm->context);
38 mm->context = alloc_sid();
39 if (mm == current->active_mm)
40 load_context(mm->context);
41 }
42#endif
43}
44
45extern __inline__ void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end)
46{
47}
48
49static inline void flush_tlb_page(struct vm_area_struct *vma,
50 unsigned long addr)
51{
52 /* For one page, it's not worth testing the split_tlb variable */
53
54 mb();
55 mtsp(vma->vm_mm->context,1);
56 purge_tlb_start();
57 pdtlb(addr);
58 pitlb(addr);
59 purge_tlb_end();
60}
61
62static inline void flush_tlb_range(struct vm_area_struct *vma,
63 unsigned long start, unsigned long end)
64{
65 unsigned long npages;
66
67
68 npages = ((end - (start & PAGE_MASK)) + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
69 if (npages >= 512) /* XXX arbitrary, should be tuned */
70 flush_tlb_all();
71 else {
72
73 mtsp(vma->vm_mm->context,1);
74 if (split_tlb) {
75 purge_tlb_start();
76 while (npages--) {
77 pdtlb(start);
78 pitlb(start);
79 start += PAGE_SIZE;
80 }
81 purge_tlb_end();
82 } else {
83 purge_tlb_start();
84 while (npages--) {
85 pdtlb(start);
86 start += PAGE_SIZE;
87 }
88 purge_tlb_end();
89 }
90 }
91}
92
93#define flush_tlb_kernel_range(start, end) flush_tlb_all()
94
95#endif
diff --git a/include/asm-parisc/topology.h b/include/asm-parisc/topology.h
new file mode 100644
index 000000000000..d8133eb0b1e7
--- /dev/null
+++ b/include/asm-parisc/topology.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_PARISC_TOPOLOGY_H
2#define _ASM_PARISC_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_PARISC_TOPOLOGY_H */
diff --git a/include/asm-parisc/traps.h b/include/asm-parisc/traps.h
new file mode 100644
index 000000000000..1945f995f2df
--- /dev/null
+++ b/include/asm-parisc/traps.h
@@ -0,0 +1,16 @@
1#ifndef __ASM_TRAPS_H
2#define __ASM_TRAPS_H
3
4#ifdef __KERNEL__
5struct pt_regs;
6
7/* traps.c */
8void parisc_terminate(char *msg, struct pt_regs *regs,
9 int code, unsigned long offset);
10
11/* mm/fault.c */
12void do_page_fault(struct pt_regs *regs, unsigned long code,
13 unsigned long address);
14#endif
15
16#endif
diff --git a/include/asm-parisc/types.h b/include/asm-parisc/types.h
new file mode 100644
index 000000000000..8fe7a44ea205
--- /dev/null
+++ b/include/asm-parisc/types.h
@@ -0,0 +1,65 @@
1#ifndef _PARISC_TYPES_H
2#define _PARISC_TYPES_H
3
4#ifndef __ASSEMBLY__
5
6typedef unsigned short umode_t;
7
8/*
9 * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
10 * header files exported to user space
11 */
12
13typedef __signed__ char __s8;
14typedef unsigned char __u8;
15
16typedef __signed__ short __s16;
17typedef unsigned short __u16;
18
19typedef __signed__ int __s32;
20typedef unsigned int __u32;
21
22#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
23typedef __signed__ long long __s64;
24typedef unsigned long long __u64;
25#endif
26
27#endif /* __ASSEMBLY__ */
28
29/*
30 * These aren't exported outside the kernel to avoid name space clashes
31 */
32#ifdef __KERNEL__
33
34#ifdef __LP64__
35#define BITS_PER_LONG 64
36#else
37#define BITS_PER_LONG 32
38#endif
39
40#ifndef __ASSEMBLY__
41
42typedef signed char s8;
43typedef unsigned char u8;
44
45typedef signed short s16;
46typedef unsigned short u16;
47
48typedef signed int s32;
49typedef unsigned int u32;
50
51typedef signed long long s64;
52typedef unsigned long long u64;
53
54/* Dma addresses are 32-bits wide. */
55
56typedef u32 dma_addr_t;
57typedef u64 dma64_addr_t;
58
59typedef unsigned int kmem_bufctl_t;
60
61#endif /* __ASSEMBLY__ */
62
63#endif /* __KERNEL__ */
64
65#endif
diff --git a/include/asm-parisc/uaccess.h b/include/asm-parisc/uaccess.h
new file mode 100644
index 000000000000..8a08423b7570
--- /dev/null
+++ b/include/asm-parisc/uaccess.h
@@ -0,0 +1,287 @@
1#ifndef __PARISC_UACCESS_H
2#define __PARISC_UACCESS_H
3
4/*
5 * User space memory access functions
6 */
7#include <linux/sched.h>
8#include <asm/page.h>
9#include <asm/system.h>
10#include <asm/cache.h>
11#include <asm-generic/uaccess.h>
12
13#define VERIFY_READ 0
14#define VERIFY_WRITE 1
15
16#define KERNEL_DS ((mm_segment_t){0})
17#define USER_DS ((mm_segment_t){1})
18
19#define segment_eq(a,b) ((a).seg == (b).seg)
20
21#define get_ds() (KERNEL_DS)
22#define get_fs() (current_thread_info()->addr_limit)
23#define set_fs(x) (current_thread_info()->addr_limit = (x))
24
25/*
26 * Note that since kernel addresses are in a separate address space on
27 * parisc, we don't need to do anything for access_ok() or verify_area().
28 * We just let the page fault handler do the right thing. This also means
29 * that put_user is the same as __put_user, etc.
30 */
31
32extern int __get_kernel_bad(void);
33extern int __get_user_bad(void);
34extern int __put_kernel_bad(void);
35extern int __put_user_bad(void);
36
37static inline long access_ok(int type, const void __user * addr,
38 unsigned long size)
39{
40 return 1;
41}
42
43#define verify_area(type,addr,size) (0) /* FIXME: all users should go away soon,
44 * and use access_ok instead, then this
45 * should be removed. */
46
47#define put_user __put_user
48#define get_user __get_user
49
50#if BITS_PER_LONG == 32
51#define LDD_KERNEL(ptr) __get_kernel_bad();
52#define LDD_USER(ptr) __get_user_bad();
53#define STD_KERNEL(x, ptr) __put_kernel_asm64(x,ptr)
54#define STD_USER(x, ptr) __put_user_asm64(x,ptr)
55#else
56#define LDD_KERNEL(ptr) __get_kernel_asm("ldd",ptr)
57#define LDD_USER(ptr) __get_user_asm("ldd",ptr)
58#define STD_KERNEL(x, ptr) __put_kernel_asm("std",x,ptr)
59#define STD_USER(x, ptr) __put_user_asm("std",x,ptr)
60#endif
61
62/*
63 * The exception table contains two values: the first is an address
64 * for an instruction that is allowed to fault, and the second is
65 * the address to the fixup routine.
66 */
67
68struct exception_table_entry {
69 unsigned long insn; /* address of insn that is allowed to fault. */
70 long fixup; /* fixup routine */
71};
72
73/*
74 * The page fault handler stores, in a per-cpu area, the following information
75 * if a fixup routine is available.
76 */
77struct exception_data {
78 unsigned long fault_ip;
79 unsigned long fault_space;
80 unsigned long fault_addr;
81};
82
83#define __get_user(x,ptr) \
84({ \
85 register long __gu_err __asm__ ("r8") = 0; \
86 register long __gu_val __asm__ ("r9") = 0; \
87 \
88 if (segment_eq(get_fs(),KERNEL_DS)) { \
89 switch (sizeof(*(ptr))) { \
90 case 1: __get_kernel_asm("ldb",ptr); break; \
91 case 2: __get_kernel_asm("ldh",ptr); break; \
92 case 4: __get_kernel_asm("ldw",ptr); break; \
93 case 8: LDD_KERNEL(ptr); break; \
94 default: __get_kernel_bad(); break; \
95 } \
96 } \
97 else { \
98 switch (sizeof(*(ptr))) { \
99 case 1: __get_user_asm("ldb",ptr); break; \
100 case 2: __get_user_asm("ldh",ptr); break; \
101 case 4: __get_user_asm("ldw",ptr); break; \
102 case 8: LDD_USER(ptr); break; \
103 default: __get_user_bad(); break; \
104 } \
105 } \
106 \
107 (x) = (__typeof__(*(ptr))) __gu_val; \
108 __gu_err; \
109})
110
111#ifdef __LP64__
112#define __get_kernel_asm(ldx,ptr) \
113 __asm__("\n1:\t" ldx "\t0(%2),%0\n" \
114 "\t.section __ex_table,\"aw\"\n" \
115 "\t.dword\t1b,fixup_get_user_skip_1\n" \
116 "\t.previous" \
117 : "=r"(__gu_val), "=r"(__gu_err) \
118 : "r"(ptr), "1"(__gu_err) \
119 : "r1");
120
121#define __get_user_asm(ldx,ptr) \
122 __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n" \
123 "\t.section __ex_table,\"aw\"\n" \
124 "\t.dword\t1b,fixup_get_user_skip_1\n" \
125 "\t.previous" \
126 : "=r"(__gu_val), "=r"(__gu_err) \
127 : "r"(ptr), "1"(__gu_err) \
128 : "r1");
129#else
130#define __get_kernel_asm(ldx,ptr) \
131 __asm__("\n1:\t" ldx "\t0(%2),%0\n" \
132 "\t.section __ex_table,\"aw\"\n" \
133 "\t.word\t1b,fixup_get_user_skip_1\n" \
134 "\t.previous" \
135 : "=r"(__gu_val), "=r"(__gu_err) \
136 : "r"(ptr), "1"(__gu_err) \
137 : "r1");
138
139#define __get_user_asm(ldx,ptr) \
140 __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n" \
141 "\t.section __ex_table,\"aw\"\n" \
142 "\t.word\t1b,fixup_get_user_skip_1\n" \
143 "\t.previous" \
144 : "=r"(__gu_val), "=r"(__gu_err) \
145 : "r"(ptr), "1"(__gu_err) \
146 : "r1");
147#endif /* !__LP64__ */
148
149#define __put_user(x,ptr) \
150({ \
151 register long __pu_err __asm__ ("r8") = 0; \
152 __typeof__(*(ptr)) __x = (__typeof__(*(ptr)))(x); \
153 \
154 if (segment_eq(get_fs(),KERNEL_DS)) { \
155 switch (sizeof(*(ptr))) { \
156 case 1: __put_kernel_asm("stb",__x,ptr); break; \
157 case 2: __put_kernel_asm("sth",__x,ptr); break; \
158 case 4: __put_kernel_asm("stw",__x,ptr); break; \
159 case 8: STD_KERNEL(__x,ptr); break; \
160 default: __put_kernel_bad(); break; \
161 } \
162 } \
163 else { \
164 switch (sizeof(*(ptr))) { \
165 case 1: __put_user_asm("stb",__x,ptr); break; \
166 case 2: __put_user_asm("sth",__x,ptr); break; \
167 case 4: __put_user_asm("stw",__x,ptr); break; \
168 case 8: STD_USER(__x,ptr); break; \
169 default: __put_user_bad(); break; \
170 } \
171 } \
172 \
173 __pu_err; \
174})
175
176/*
177 * The "__put_user/kernel_asm()" macros tell gcc they read from memory
178 * instead of writing. This is because they do not write to any memory
179 * gcc knows about, so there are no aliasing issues.
180 */
181
182#ifdef __LP64__
183#define __put_kernel_asm(stx,x,ptr) \
184 __asm__ __volatile__ ( \
185 "\n1:\t" stx "\t%2,0(%1)\n" \
186 "\t.section __ex_table,\"aw\"\n" \
187 "\t.dword\t1b,fixup_put_user_skip_1\n" \
188 "\t.previous" \
189 : "=r"(__pu_err) \
190 : "r"(ptr), "r"(x), "0"(__pu_err))
191
192#define __put_user_asm(stx,x,ptr) \
193 __asm__ __volatile__ ( \
194 "\n1:\t" stx "\t%2,0(%%sr3,%1)\n" \
195 "\t.section __ex_table,\"aw\"\n" \
196 "\t.dword\t1b,fixup_put_user_skip_1\n" \
197 "\t.previous" \
198 : "=r"(__pu_err) \
199 : "r"(ptr), "r"(x), "0"(__pu_err) \
200 : "r1")
201#else
202#define __put_kernel_asm(stx,x,ptr) \
203 __asm__ __volatile__ ( \
204 "\n1:\t" stx "\t%2,0(%1)\n" \
205 "\t.section __ex_table,\"aw\"\n" \
206 "\t.word\t1b,fixup_put_user_skip_1\n" \
207 "\t.previous" \
208 : "=r"(__pu_err) \
209 : "r"(ptr), "r"(x), "0"(__pu_err) \
210 : "r1")
211
212#define __put_user_asm(stx,x,ptr) \
213 __asm__ __volatile__ ( \
214 "\n1:\t" stx "\t%2,0(%%sr3,%1)\n" \
215 "\t.section __ex_table,\"aw\"\n" \
216 "\t.word\t1b,fixup_put_user_skip_1\n" \
217 "\t.previous" \
218 : "=r"(__pu_err) \
219 : "r"(ptr), "r"(x), "0"(__pu_err) \
220 : "r1")
221
222#define __put_kernel_asm64(__val,ptr) do { \
223 u64 __val64 = (u64)(__val); \
224 u32 hi = (__val64) >> 32; \
225 u32 lo = (__val64) & 0xffffffff; \
226 __asm__ __volatile__ ( \
227 "\n1:\tstw %2,0(%1)\n" \
228 "\n2:\tstw %3,4(%1)\n" \
229 "\t.section __ex_table,\"aw\"\n" \
230 "\t.word\t1b,fixup_put_user_skip_2\n" \
231 "\t.word\t2b,fixup_put_user_skip_1\n" \
232 "\t.previous" \
233 : "=r"(__pu_err) \
234 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
235 : "r1"); \
236} while (0)
237
238#define __put_user_asm64(__val,ptr) do { \
239 u64 __val64 = (u64)__val; \
240 u32 hi = (__val64) >> 32; \
241 u32 lo = (__val64) & 0xffffffff; \
242 __asm__ __volatile__ ( \
243 "\n1:\tstw %2,0(%%sr3,%1)\n" \
244 "\n2:\tstw %3,4(%%sr3,%1)\n" \
245 "\t.section __ex_table,\"aw\"\n" \
246 "\t.word\t1b,fixup_get_user_skip_2\n" \
247 "\t.word\t2b,fixup_get_user_skip_1\n" \
248 "\t.previous" \
249 : "=r"(__pu_err) \
250 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
251 : "r1"); \
252} while (0)
253
254#endif /* !__LP64__ */
255
256
257/*
258 * Complex access routines -- external declarations
259 */
260
261extern unsigned long lcopy_to_user(void __user *, const void *, unsigned long);
262extern unsigned long lcopy_from_user(void *, const void __user *, unsigned long);
263extern unsigned long lcopy_in_user(void __user *, const void __user *, unsigned long);
264extern long lstrncpy_from_user(char *, const char __user *, long);
265extern unsigned lclear_user(void __user *,unsigned long);
266extern long lstrnlen_user(const char __user *,long);
267
268/*
269 * Complex access routines -- macros
270 */
271
272#define strncpy_from_user lstrncpy_from_user
273#define strnlen_user lstrnlen_user
274#define strlen_user(str) lstrnlen_user(str, 0x7fffffffL)
275#define clear_user lclear_user
276#define __clear_user lclear_user
277
278unsigned long copy_to_user(void __user *dst, const void *src, unsigned long len);
279#define __copy_to_user copy_to_user
280unsigned long copy_from_user(void *dst, const void __user *src, unsigned long len);
281#define __copy_from_user copy_from_user
282unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned long len);
283#define __copy_in_user copy_in_user
284#define __copy_to_user_inatomic __copy_to_user
285#define __copy_from_user_inatomic __copy_from_user
286
287#endif /* __PARISC_UACCESS_H */
diff --git a/include/asm-parisc/ucontext.h b/include/asm-parisc/ucontext.h
new file mode 100644
index 000000000000..6c8883e4b0bd
--- /dev/null
+++ b/include/asm-parisc/ucontext.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_PARISC_UCONTEXT_H
2#define _ASM_PARISC_UCONTEXT_H
3
4struct ucontext {
5 unsigned int uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif /* !_ASM_PARISC_UCONTEXT_H */
diff --git a/include/asm-parisc/unaligned.h b/include/asm-parisc/unaligned.h
new file mode 100644
index 000000000000..53c905838d93
--- /dev/null
+++ b/include/asm-parisc/unaligned.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_PARISC_UNALIGNED_H_
2#define _ASM_PARISC_UNALIGNED_H_
3
4#include <asm-generic/unaligned.h>
5
6#ifdef __KERNEL__
7struct pt_regs;
8void handle_unaligned(struct pt_regs *regs);
9int check_unaligned(struct pt_regs *regs);
10#endif
11
12#endif /* _ASM_PARISC_UNALIGNED_H_ */
diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h
new file mode 100644
index 000000000000..6a9f0cadff58
--- /dev/null
+++ b/include/asm-parisc/unistd.h
@@ -0,0 +1,1029 @@
1#ifndef _ASM_PARISC_UNISTD_H_
2#define _ASM_PARISC_UNISTD_H_
3
4/*
5 * This file contains the system call numbers.
6 */
7
8/*
9 * HP-UX system calls get their native numbers for binary compatibility.
10 */
11
12#define __NR_HPUX_exit 1
13#define __NR_HPUX_fork 2
14#define __NR_HPUX_read 3
15#define __NR_HPUX_write 4
16#define __NR_HPUX_open 5
17#define __NR_HPUX_close 6
18#define __NR_HPUX_wait 7
19#define __NR_HPUX_creat 8
20#define __NR_HPUX_link 9
21#define __NR_HPUX_unlink 10
22#define __NR_HPUX_execv 11
23#define __NR_HPUX_chdir 12
24#define __NR_HPUX_time 13
25#define __NR_HPUX_mknod 14
26#define __NR_HPUX_chmod 15
27#define __NR_HPUX_chown 16
28#define __NR_HPUX_break 17
29#define __NR_HPUX_lchmod 18
30#define __NR_HPUX_lseek 19
31#define __NR_HPUX_getpid 20
32#define __NR_HPUX_mount 21
33#define __NR_HPUX_umount 22
34#define __NR_HPUX_setuid 23
35#define __NR_HPUX_getuid 24
36#define __NR_HPUX_stime 25
37#define __NR_HPUX_ptrace 26
38#define __NR_HPUX_alarm 27
39#define __NR_HPUX_oldfstat 28
40#define __NR_HPUX_pause 29
41#define __NR_HPUX_utime 30
42#define __NR_HPUX_stty 31
43#define __NR_HPUX_gtty 32
44#define __NR_HPUX_access 33
45#define __NR_HPUX_nice 34
46#define __NR_HPUX_ftime 35
47#define __NR_HPUX_sync 36
48#define __NR_HPUX_kill 37
49#define __NR_HPUX_stat 38
50#define __NR_HPUX_setpgrp3 39
51#define __NR_HPUX_lstat 40
52#define __NR_HPUX_dup 41
53#define __NR_HPUX_pipe 42
54#define __NR_HPUX_times 43
55#define __NR_HPUX_profil 44
56#define __NR_HPUX_ki_call 45
57#define __NR_HPUX_setgid 46
58#define __NR_HPUX_getgid 47
59#define __NR_HPUX_sigsys 48
60#define __NR_HPUX_reserved1 49
61#define __NR_HPUX_reserved2 50
62#define __NR_HPUX_acct 51
63#define __NR_HPUX_set_userthreadid 52
64#define __NR_HPUX_oldlock 53
65#define __NR_HPUX_ioctl 54
66#define __NR_HPUX_reboot 55
67#define __NR_HPUX_symlink 56
68#define __NR_HPUX_utssys 57
69#define __NR_HPUX_readlink 58
70#define __NR_HPUX_execve 59
71#define __NR_HPUX_umask 60
72#define __NR_HPUX_chroot 61
73#define __NR_HPUX_fcntl 62
74#define __NR_HPUX_ulimit 63
75#define __NR_HPUX_getpagesize 64
76#define __NR_HPUX_mremap 65
77#define __NR_HPUX_vfork 66
78#define __NR_HPUX_vread 67
79#define __NR_HPUX_vwrite 68
80#define __NR_HPUX_sbrk 69
81#define __NR_HPUX_sstk 70
82#define __NR_HPUX_mmap 71
83#define __NR_HPUX_vadvise 72
84#define __NR_HPUX_munmap 73
85#define __NR_HPUX_mprotect 74
86#define __NR_HPUX_madvise 75
87#define __NR_HPUX_vhangup 76
88#define __NR_HPUX_swapoff 77
89#define __NR_HPUX_mincore 78
90#define __NR_HPUX_getgroups 79
91#define __NR_HPUX_setgroups 80
92#define __NR_HPUX_getpgrp2 81
93#define __NR_HPUX_setpgrp2 82
94#define __NR_HPUX_setitimer 83
95#define __NR_HPUX_wait3 84
96#define __NR_HPUX_swapon 85
97#define __NR_HPUX_getitimer 86
98#define __NR_HPUX_gethostname42 87
99#define __NR_HPUX_sethostname42 88
100#define __NR_HPUX_getdtablesize 89
101#define __NR_HPUX_dup2 90
102#define __NR_HPUX_getdopt 91
103#define __NR_HPUX_fstat 92
104#define __NR_HPUX_select 93
105#define __NR_HPUX_setdopt 94
106#define __NR_HPUX_fsync 95
107#define __NR_HPUX_setpriority 96
108#define __NR_HPUX_socket_old 97
109#define __NR_HPUX_connect_old 98
110#define __NR_HPUX_accept_old 99
111#define __NR_HPUX_getpriority 100
112#define __NR_HPUX_send_old 101
113#define __NR_HPUX_recv_old 102
114#define __NR_HPUX_socketaddr_old 103
115#define __NR_HPUX_bind_old 104
116#define __NR_HPUX_setsockopt_old 105
117#define __NR_HPUX_listen_old 106
118#define __NR_HPUX_vtimes_old 107
119#define __NR_HPUX_sigvector 108
120#define __NR_HPUX_sigblock 109
121#define __NR_HPUX_siggetmask 110
122#define __NR_HPUX_sigpause 111
123#define __NR_HPUX_sigstack 112
124#define __NR_HPUX_recvmsg_old 113
125#define __NR_HPUX_sendmsg_old 114
126#define __NR_HPUX_vtrace_old 115
127#define __NR_HPUX_gettimeofday 116
128#define __NR_HPUX_getrusage 117
129#define __NR_HPUX_getsockopt_old 118
130#define __NR_HPUX_resuba_old 119
131#define __NR_HPUX_readv 120
132#define __NR_HPUX_writev 121
133#define __NR_HPUX_settimeofday 122
134#define __NR_HPUX_fchown 123
135#define __NR_HPUX_fchmod 124
136#define __NR_HPUX_recvfrom_old 125
137#define __NR_HPUX_setresuid 126
138#define __NR_HPUX_setresgid 127
139#define __NR_HPUX_rename 128
140#define __NR_HPUX_truncate 129
141#define __NR_HPUX_ftruncate 130
142#define __NR_HPUX_flock_old 131
143#define __NR_HPUX_sysconf 132
144#define __NR_HPUX_sendto_old 133
145#define __NR_HPUX_shutdown_old 134
146#define __NR_HPUX_socketpair_old 135
147#define __NR_HPUX_mkdir 136
148#define __NR_HPUX_rmdir 137
149#define __NR_HPUX_utimes_old 138
150#define __NR_HPUX_sigcleanup_old 139
151#define __NR_HPUX_setcore 140
152#define __NR_HPUX_getpeername_old 141
153#define __NR_HPUX_gethostid 142
154#define __NR_HPUX_sethostid 143
155#define __NR_HPUX_getrlimit 144
156#define __NR_HPUX_setrlimit 145
157#define __NR_HPUX_killpg_old 146
158#define __NR_HPUX_cachectl 147
159#define __NR_HPUX_quotactl 148
160#define __NR_HPUX_get_sysinfo 149
161#define __NR_HPUX_getsockname_old 150
162#define __NR_HPUX_privgrp 151
163#define __NR_HPUX_rtprio 152
164#define __NR_HPUX_plock 153
165#define __NR_HPUX_reserved3 154
166#define __NR_HPUX_lockf 155
167#define __NR_HPUX_semget 156
168#define __NR_HPUX_osemctl 157
169#define __NR_HPUX_semop 158
170#define __NR_HPUX_msgget 159
171#define __NR_HPUX_omsgctl 160
172#define __NR_HPUX_msgsnd 161
173#define __NR_HPUX_msgrecv 162
174#define __NR_HPUX_shmget 163
175#define __NR_HPUX_oshmctl 164
176#define __NR_HPUX_shmat 165
177#define __NR_HPUX_shmdt 166
178#define __NR_HPUX_m68020_advise 167
179/* [168,189] are for Discless/DUX */
180#define __NR_HPUX_csp 168
181#define __NR_HPUX_cluster 169
182#define __NR_HPUX_mkrnod 170
183#define __NR_HPUX_test 171
184#define __NR_HPUX_unsp_open 172
185#define __NR_HPUX_reserved4 173
186#define __NR_HPUX_getcontext_old 174
187#define __NR_HPUX_osetcontext 175
188#define __NR_HPUX_bigio 176
189#define __NR_HPUX_pipenode 177
190#define __NR_HPUX_lsync 178
191#define __NR_HPUX_getmachineid 179
192#define __NR_HPUX_cnodeid 180
193#define __NR_HPUX_cnodes 181
194#define __NR_HPUX_swapclients 182
195#define __NR_HPUX_rmt_process 183
196#define __NR_HPUX_dskless_stats 184
197#define __NR_HPUX_sigprocmask 185
198#define __NR_HPUX_sigpending 186
199#define __NR_HPUX_sigsuspend 187
200#define __NR_HPUX_sigaction 188
201#define __NR_HPUX_reserved5 189
202#define __NR_HPUX_nfssvc 190
203#define __NR_HPUX_getfh 191
204#define __NR_HPUX_getdomainname 192
205#define __NR_HPUX_setdomainname 193
206#define __NR_HPUX_async_daemon 194
207#define __NR_HPUX_getdirentries 195
208#define __NR_HPUX_statfs 196
209#define __NR_HPUX_fstatfs 197
210#define __NR_HPUX_vfsmount 198
211#define __NR_HPUX_reserved6 199
212#define __NR_HPUX_waitpid 200
213/* 201 - 223 missing */
214#define __NR_HPUX_sigsetreturn 224
215#define __NR_HPUX_sigsetstatemask 225
216/* 226 missing */
217#define __NR_HPUX_cs 227
218#define __NR_HPUX_cds 228
219#define __NR_HPUX_set_no_trunc 229
220#define __NR_HPUX_pathconf 230
221#define __NR_HPUX_fpathconf 231
222/* 232, 233 missing */
223#define __NR_HPUX_nfs_fcntl 234
224#define __NR_HPUX_ogetacl 235
225#define __NR_HPUX_ofgetacl 236
226#define __NR_HPUX_osetacl 237
227#define __NR_HPUX_ofsetacl 238
228#define __NR_HPUX_pstat 239
229#define __NR_HPUX_getaudid 240
230#define __NR_HPUX_setaudid 241
231#define __NR_HPUX_getaudproc 242
232#define __NR_HPUX_setaudproc 243
233#define __NR_HPUX_getevent 244
234#define __NR_HPUX_setevent 245
235#define __NR_HPUX_audwrite 246
236#define __NR_HPUX_audswitch 247
237#define __NR_HPUX_audctl 248
238#define __NR_HPUX_ogetaccess 249
239#define __NR_HPUX_fsctl 250
240/* 251 - 258 missing */
241#define __NR_HPUX_swapfs 259
242#define __NR_HPUX_fss 260
243/* 261 - 266 missing */
244#define __NR_HPUX_tsync 267
245#define __NR_HPUX_getnumfds 268
246#define __NR_HPUX_poll 269
247#define __NR_HPUX_getmsg 270
248#define __NR_HPUX_putmsg 271
249#define __NR_HPUX_fchdir 272
250#define __NR_HPUX_getmount_cnt 273
251#define __NR_HPUX_getmount_entry 274
252#define __NR_HPUX_accept 275
253#define __NR_HPUX_bind 276
254#define __NR_HPUX_connect 277
255#define __NR_HPUX_getpeername 278
256#define __NR_HPUX_getsockname 279
257#define __NR_HPUX_getsockopt 280
258#define __NR_HPUX_listen 281
259#define __NR_HPUX_recv 282
260#define __NR_HPUX_recvfrom 283
261#define __NR_HPUX_recvmsg 284
262#define __NR_HPUX_send 285
263#define __NR_HPUX_sendmsg 286
264#define __NR_HPUX_sendto 287
265#define __NR_HPUX_setsockopt 288
266#define __NR_HPUX_shutdown 289
267#define __NR_HPUX_socket 290
268#define __NR_HPUX_socketpair 291
269#define __NR_HPUX_proc_open 292
270#define __NR_HPUX_proc_close 293
271#define __NR_HPUX_proc_send 294
272#define __NR_HPUX_proc_recv 295
273#define __NR_HPUX_proc_sendrecv 296
274#define __NR_HPUX_proc_syscall 297
275/* 298 - 311 missing */
276#define __NR_HPUX_semctl 312
277#define __NR_HPUX_msgctl 313
278#define __NR_HPUX_shmctl 314
279#define __NR_HPUX_mpctl 315
280#define __NR_HPUX_exportfs 316
281#define __NR_HPUX_getpmsg 317
282#define __NR_HPUX_putpmsg 318
283/* 319 missing */
284#define __NR_HPUX_msync 320
285#define __NR_HPUX_msleep 321
286#define __NR_HPUX_mwakeup 322
287#define __NR_HPUX_msem_init 323
288#define __NR_HPUX_msem_remove 324
289#define __NR_HPUX_adjtime 325
290#define __NR_HPUX_kload 326
291#define __NR_HPUX_fattach 327
292#define __NR_HPUX_fdetach 328
293#define __NR_HPUX_serialize 329
294#define __NR_HPUX_statvfs 330
295#define __NR_HPUX_fstatvfs 331
296#define __NR_HPUX_lchown 332
297#define __NR_HPUX_getsid 333
298#define __NR_HPUX_sysfs 334
299/* 335, 336 missing */
300#define __NR_HPUX_sched_setparam 337
301#define __NR_HPUX_sched_getparam 338
302#define __NR_HPUX_sched_setscheduler 339
303#define __NR_HPUX_sched_getscheduler 340
304#define __NR_HPUX_sched_yield 341
305#define __NR_HPUX_sched_get_priority_max 342
306#define __NR_HPUX_sched_get_priority_min 343
307#define __NR_HPUX_sched_rr_get_interval 344
308#define __NR_HPUX_clock_settime 345
309#define __NR_HPUX_clock_gettime 346
310#define __NR_HPUX_clock_getres 347
311#define __NR_HPUX_timer_create 348
312#define __NR_HPUX_timer_delete 349
313#define __NR_HPUX_timer_settime 350
314#define __NR_HPUX_timer_gettime 351
315#define __NR_HPUX_timer_getoverrun 352
316#define __NR_HPUX_nanosleep 353
317#define __NR_HPUX_toolbox 354
318/* 355 missing */
319#define __NR_HPUX_getdents 356
320#define __NR_HPUX_getcontext 357
321#define __NR_HPUX_sysinfo 358
322#define __NR_HPUX_fcntl64 359
323#define __NR_HPUX_ftruncate64 360
324#define __NR_HPUX_fstat64 361
325#define __NR_HPUX_getdirentries64 362
326#define __NR_HPUX_getrlimit64 363
327#define __NR_HPUX_lockf64 364
328#define __NR_HPUX_lseek64 365
329#define __NR_HPUX_lstat64 366
330#define __NR_HPUX_mmap64 367
331#define __NR_HPUX_setrlimit64 368
332#define __NR_HPUX_stat64 369
333#define __NR_HPUX_truncate64 370
334#define __NR_HPUX_ulimit64 371
335#define __NR_HPUX_pread 372
336#define __NR_HPUX_preadv 373
337#define __NR_HPUX_pwrite 374
338#define __NR_HPUX_pwritev 375
339#define __NR_HPUX_pread64 376
340#define __NR_HPUX_preadv64 377
341#define __NR_HPUX_pwrite64 378
342#define __NR_HPUX_pwritev64 379
343#define __NR_HPUX_setcontext 380
344#define __NR_HPUX_sigaltstack 381
345#define __NR_HPUX_waitid 382
346#define __NR_HPUX_setpgrp 383
347#define __NR_HPUX_recvmsg2 384
348#define __NR_HPUX_sendmsg2 385
349#define __NR_HPUX_socket2 386
350#define __NR_HPUX_socketpair2 387
351#define __NR_HPUX_setregid 388
352#define __NR_HPUX_lwp_create 389
353#define __NR_HPUX_lwp_terminate 390
354#define __NR_HPUX_lwp_wait 391
355#define __NR_HPUX_lwp_suspend 392
356#define __NR_HPUX_lwp_resume 393
357/* 394 missing */
358#define __NR_HPUX_lwp_abort_syscall 395
359#define __NR_HPUX_lwp_info 396
360#define __NR_HPUX_lwp_kill 397
361#define __NR_HPUX_ksleep 398
362#define __NR_HPUX_kwakeup 399
363/* 400 missing */
364#define __NR_HPUX_pstat_getlwp 401
365#define __NR_HPUX_lwp_exit 402
366#define __NR_HPUX_lwp_continue 403
367#define __NR_HPUX_getacl 404
368#define __NR_HPUX_fgetacl 405
369#define __NR_HPUX_setacl 406
370#define __NR_HPUX_fsetacl 407
371#define __NR_HPUX_getaccess 408
372#define __NR_HPUX_lwp_mutex_init 409
373#define __NR_HPUX_lwp_mutex_lock_sys 410
374#define __NR_HPUX_lwp_mutex_unlock 411
375#define __NR_HPUX_lwp_cond_init 412
376#define __NR_HPUX_lwp_cond_signal 413
377#define __NR_HPUX_lwp_cond_broadcast 414
378#define __NR_HPUX_lwp_cond_wait_sys 415
379#define __NR_HPUX_lwp_getscheduler 416
380#define __NR_HPUX_lwp_setscheduler 417
381#define __NR_HPUX_lwp_getstate 418
382#define __NR_HPUX_lwp_setstate 419
383#define __NR_HPUX_lwp_detach 420
384#define __NR_HPUX_mlock 421
385#define __NR_HPUX_munlock 422
386#define __NR_HPUX_mlockall 423
387#define __NR_HPUX_munlockall 424
388#define __NR_HPUX_shm_open 425
389#define __NR_HPUX_shm_unlink 426
390#define __NR_HPUX_sigqueue 427
391#define __NR_HPUX_sigwaitinfo 428
392#define __NR_HPUX_sigtimedwait 429
393#define __NR_HPUX_sigwait 430
394#define __NR_HPUX_aio_read 431
395#define __NR_HPUX_aio_write 432
396#define __NR_HPUX_lio_listio 433
397#define __NR_HPUX_aio_error 434
398#define __NR_HPUX_aio_return 435
399#define __NR_HPUX_aio_cancel 436
400#define __NR_HPUX_aio_suspend 437
401#define __NR_HPUX_aio_fsync 438
402#define __NR_HPUX_mq_open 439
403#define __NR_HPUX_mq_close 440
404#define __NR_HPUX_mq_unlink 441
405#define __NR_HPUX_mq_send 442
406#define __NR_HPUX_mq_receive 443
407#define __NR_HPUX_mq_notify 444
408#define __NR_HPUX_mq_setattr 445
409#define __NR_HPUX_mq_getattr 446
410#define __NR_HPUX_ksem_open 447
411#define __NR_HPUX_ksem_unlink 448
412#define __NR_HPUX_ksem_close 449
413#define __NR_HPUX_ksem_post 450
414#define __NR_HPUX_ksem_wait 451
415#define __NR_HPUX_ksem_read 452
416#define __NR_HPUX_ksem_trywait 453
417#define __NR_HPUX_lwp_rwlock_init 454
418#define __NR_HPUX_lwp_rwlock_destroy 455
419#define __NR_HPUX_lwp_rwlock_rdlock_sys 456
420#define __NR_HPUX_lwp_rwlock_wrlock_sys 457
421#define __NR_HPUX_lwp_rwlock_tryrdlock 458
422#define __NR_HPUX_lwp_rwlock_trywrlock 459
423#define __NR_HPUX_lwp_rwlock_unlock 460
424#define __NR_HPUX_ttrace 461
425#define __NR_HPUX_ttrace_wait 462
426#define __NR_HPUX_lf_wire_mem 463
427#define __NR_HPUX_lf_unwire_mem 464
428#define __NR_HPUX_lf_send_pin_map 465
429#define __NR_HPUX_lf_free_buf 466
430#define __NR_HPUX_lf_wait_nq 467
431#define __NR_HPUX_lf_wakeup_conn_q 468
432#define __NR_HPUX_lf_unused 469
433#define __NR_HPUX_lwp_sema_init 470
434#define __NR_HPUX_lwp_sema_post 471
435#define __NR_HPUX_lwp_sema_wait 472
436#define __NR_HPUX_lwp_sema_trywait 473
437#define __NR_HPUX_lwp_sema_destroy 474
438#define __NR_HPUX_statvfs64 475
439#define __NR_HPUX_fstatvfs64 476
440#define __NR_HPUX_msh_register 477
441#define __NR_HPUX_ptrace64 478
442#define __NR_HPUX_sendfile 479
443#define __NR_HPUX_sendpath 480
444#define __NR_HPUX_sendfile64 481
445#define __NR_HPUX_sendpath64 482
446#define __NR_HPUX_modload 483
447#define __NR_HPUX_moduload 484
448#define __NR_HPUX_modpath 485
449#define __NR_HPUX_getksym 486
450#define __NR_HPUX_modadm 487
451#define __NR_HPUX_modstat 488
452#define __NR_HPUX_lwp_detached_exit 489
453#define __NR_HPUX_crashconf 490
454#define __NR_HPUX_siginhibit 491
455#define __NR_HPUX_sigenable 492
456#define __NR_HPUX_spuctl 493
457#define __NR_HPUX_zerokernelsum 494
458#define __NR_HPUX_nfs_kstat 495
459#define __NR_HPUX_aio_read64 496
460#define __NR_HPUX_aio_write64 497
461#define __NR_HPUX_aio_error64 498
462#define __NR_HPUX_aio_return64 499
463#define __NR_HPUX_aio_cancel64 500
464#define __NR_HPUX_aio_suspend64 501
465#define __NR_HPUX_aio_fsync64 502
466#define __NR_HPUX_lio_listio64 503
467#define __NR_HPUX_recv2 504
468#define __NR_HPUX_recvfrom2 505
469#define __NR_HPUX_send2 506
470#define __NR_HPUX_sendto2 507
471#define __NR_HPUX_acl 508
472#define __NR_HPUX___cnx_p2p_ctl 509
473#define __NR_HPUX___cnx_gsched_ctl 510
474#define __NR_HPUX___cnx_pmon_ctl 511
475
476#define __NR_HPUX_syscalls 512
477
478/*
479 * Linux system call numbers.
480 *
481 * Cary Coutant says that we should just use another syscall gateway
482 * page to avoid clashing with the HPUX space, and I think he's right:
483 * it will would keep a branch out of our syscall entry path, at the
484 * very least. If we decide to change it later, we can ``just'' tweak
485 * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be
486 * 1024 or something. Oh, and recompile libc. =)
487 *
488 * 64-bit HPUX binaries get the syscall gateway address passed in a register
489 * from the kernel at startup, which seems a sane strategy.
490 */
491
492#define __NR_Linux 0
493#define __NR_restart_syscall (__NR_Linux + 0)
494#define __NR_exit (__NR_Linux + 1)
495#define __NR_fork (__NR_Linux + 2)
496#define __NR_read (__NR_Linux + 3)
497#define __NR_write (__NR_Linux + 4)
498#define __NR_open (__NR_Linux + 5)
499#define __NR_close (__NR_Linux + 6)
500#define __NR_waitpid (__NR_Linux + 7)
501#define __NR_creat (__NR_Linux + 8)
502#define __NR_link (__NR_Linux + 9)
503#define __NR_unlink (__NR_Linux + 10)
504#define __NR_execve (__NR_Linux + 11)
505#define __NR_chdir (__NR_Linux + 12)
506#define __NR_time (__NR_Linux + 13)
507#define __NR_mknod (__NR_Linux + 14)
508#define __NR_chmod (__NR_Linux + 15)
509#define __NR_lchown (__NR_Linux + 16)
510#define __NR_socket (__NR_Linux + 17)
511#define __NR_stat (__NR_Linux + 18)
512#define __NR_lseek (__NR_Linux + 19)
513#define __NR_getpid (__NR_Linux + 20)
514#define __NR_mount (__NR_Linux + 21)
515#define __NR_bind (__NR_Linux + 22)
516#define __NR_setuid (__NR_Linux + 23)
517#define __NR_getuid (__NR_Linux + 24)
518#define __NR_stime (__NR_Linux + 25)
519#define __NR_ptrace (__NR_Linux + 26)
520#define __NR_alarm (__NR_Linux + 27)
521#define __NR_fstat (__NR_Linux + 28)
522#define __NR_pause (__NR_Linux + 29)
523#define __NR_utime (__NR_Linux + 30)
524#define __NR_connect (__NR_Linux + 31)
525#define __NR_listen (__NR_Linux + 32)
526#define __NR_access (__NR_Linux + 33)
527#define __NR_nice (__NR_Linux + 34)
528#define __NR_accept (__NR_Linux + 35)
529#define __NR_sync (__NR_Linux + 36)
530#define __NR_kill (__NR_Linux + 37)
531#define __NR_rename (__NR_Linux + 38)
532#define __NR_mkdir (__NR_Linux + 39)
533#define __NR_rmdir (__NR_Linux + 40)
534#define __NR_dup (__NR_Linux + 41)
535#define __NR_pipe (__NR_Linux + 42)
536#define __NR_times (__NR_Linux + 43)
537#define __NR_getsockname (__NR_Linux + 44)
538#define __NR_brk (__NR_Linux + 45)
539#define __NR_setgid (__NR_Linux + 46)
540#define __NR_getgid (__NR_Linux + 47)
541#define __NR_signal (__NR_Linux + 48)
542#define __NR_geteuid (__NR_Linux + 49)
543#define __NR_getegid (__NR_Linux + 50)
544#define __NR_acct (__NR_Linux + 51)
545#define __NR_umount2 (__NR_Linux + 52)
546#define __NR_getpeername (__NR_Linux + 53)
547#define __NR_ioctl (__NR_Linux + 54)
548#define __NR_fcntl (__NR_Linux + 55)
549#define __NR_socketpair (__NR_Linux + 56)
550#define __NR_setpgid (__NR_Linux + 57)
551#define __NR_send (__NR_Linux + 58)
552#define __NR_uname (__NR_Linux + 59)
553#define __NR_umask (__NR_Linux + 60)
554#define __NR_chroot (__NR_Linux + 61)
555#define __NR_ustat (__NR_Linux + 62)
556#define __NR_dup2 (__NR_Linux + 63)
557#define __NR_getppid (__NR_Linux + 64)
558#define __NR_getpgrp (__NR_Linux + 65)
559#define __NR_setsid (__NR_Linux + 66)
560#define __NR_pivot_root (__NR_Linux + 67)
561#define __NR_sgetmask (__NR_Linux + 68)
562#define __NR_ssetmask (__NR_Linux + 69)
563#define __NR_setreuid (__NR_Linux + 70)
564#define __NR_setregid (__NR_Linux + 71)
565#define __NR_mincore (__NR_Linux + 72)
566#define __NR_sigpending (__NR_Linux + 73)
567#define __NR_sethostname (__NR_Linux + 74)
568#define __NR_setrlimit (__NR_Linux + 75)
569#define __NR_getrlimit (__NR_Linux + 76)
570#define __NR_getrusage (__NR_Linux + 77)
571#define __NR_gettimeofday (__NR_Linux + 78)
572#define __NR_settimeofday (__NR_Linux + 79)
573#define __NR_getgroups (__NR_Linux + 80)
574#define __NR_setgroups (__NR_Linux + 81)
575#define __NR_sendto (__NR_Linux + 82)
576#define __NR_symlink (__NR_Linux + 83)
577#define __NR_lstat (__NR_Linux + 84)
578#define __NR_readlink (__NR_Linux + 85)
579#define __NR_uselib (__NR_Linux + 86)
580#define __NR_swapon (__NR_Linux + 87)
581#define __NR_reboot (__NR_Linux + 88)
582#define __NR_mmap2 (__NR_Linux + 89)
583#define __NR_mmap (__NR_Linux + 90)
584#define __NR_munmap (__NR_Linux + 91)
585#define __NR_truncate (__NR_Linux + 92)
586#define __NR_ftruncate (__NR_Linux + 93)
587#define __NR_fchmod (__NR_Linux + 94)
588#define __NR_fchown (__NR_Linux + 95)
589#define __NR_getpriority (__NR_Linux + 96)
590#define __NR_setpriority (__NR_Linux + 97)
591#define __NR_recv (__NR_Linux + 98)
592#define __NR_statfs (__NR_Linux + 99)
593#define __NR_fstatfs (__NR_Linux + 100)
594#define __NR_stat64 (__NR_Linux + 101)
595/* #define __NR_socketcall (__NR_Linux + 102) */
596#define __NR_syslog (__NR_Linux + 103)
597#define __NR_setitimer (__NR_Linux + 104)
598#define __NR_getitimer (__NR_Linux + 105)
599#define __NR_capget (__NR_Linux + 106)
600#define __NR_capset (__NR_Linux + 107)
601#define __NR_pread64 (__NR_Linux + 108)
602#define __NR_pwrite64 (__NR_Linux + 109)
603#define __NR_getcwd (__NR_Linux + 110)
604#define __NR_vhangup (__NR_Linux + 111)
605#define __NR_fstat64 (__NR_Linux + 112)
606#define __NR_vfork (__NR_Linux + 113)
607#define __NR_wait4 (__NR_Linux + 114)
608#define __NR_swapoff (__NR_Linux + 115)
609#define __NR_sysinfo (__NR_Linux + 116)
610#define __NR_shutdown (__NR_Linux + 117)
611#define __NR_fsync (__NR_Linux + 118)
612#define __NR_madvise (__NR_Linux + 119)
613#define __NR_clone (__NR_Linux + 120)
614#define __NR_setdomainname (__NR_Linux + 121)
615#define __NR_sendfile (__NR_Linux + 122)
616#define __NR_recvfrom (__NR_Linux + 123)
617#define __NR_adjtimex (__NR_Linux + 124)
618#define __NR_mprotect (__NR_Linux + 125)
619#define __NR_sigprocmask (__NR_Linux + 126)
620#define __NR_create_module (__NR_Linux + 127)
621#define __NR_init_module (__NR_Linux + 128)
622#define __NR_delete_module (__NR_Linux + 129)
623#define __NR_get_kernel_syms (__NR_Linux + 130)
624#define __NR_quotactl (__NR_Linux + 131)
625#define __NR_getpgid (__NR_Linux + 132)
626#define __NR_fchdir (__NR_Linux + 133)
627#define __NR_bdflush (__NR_Linux + 134)
628#define __NR_sysfs (__NR_Linux + 135)
629#define __NR_personality (__NR_Linux + 136)
630#define __NR_afs_syscall (__NR_Linux + 137) /* Syscall for Andrew File System */
631#define __NR_setfsuid (__NR_Linux + 138)
632#define __NR_setfsgid (__NR_Linux + 139)
633#define __NR__llseek (__NR_Linux + 140)
634#define __NR_getdents (__NR_Linux + 141)
635#define __NR__newselect (__NR_Linux + 142)
636#define __NR_flock (__NR_Linux + 143)
637#define __NR_msync (__NR_Linux + 144)
638#define __NR_readv (__NR_Linux + 145)
639#define __NR_writev (__NR_Linux + 146)
640#define __NR_getsid (__NR_Linux + 147)
641#define __NR_fdatasync (__NR_Linux + 148)
642#define __NR__sysctl (__NR_Linux + 149)
643#define __NR_mlock (__NR_Linux + 150)
644#define __NR_munlock (__NR_Linux + 151)
645#define __NR_mlockall (__NR_Linux + 152)
646#define __NR_munlockall (__NR_Linux + 153)
647#define __NR_sched_setparam (__NR_Linux + 154)
648#define __NR_sched_getparam (__NR_Linux + 155)
649#define __NR_sched_setscheduler (__NR_Linux + 156)
650#define __NR_sched_getscheduler (__NR_Linux + 157)
651#define __NR_sched_yield (__NR_Linux + 158)
652#define __NR_sched_get_priority_max (__NR_Linux + 159)
653#define __NR_sched_get_priority_min (__NR_Linux + 160)
654#define __NR_sched_rr_get_interval (__NR_Linux + 161)
655#define __NR_nanosleep (__NR_Linux + 162)
656#define __NR_mremap (__NR_Linux + 163)
657#define __NR_setresuid (__NR_Linux + 164)
658#define __NR_getresuid (__NR_Linux + 165)
659#define __NR_sigaltstack (__NR_Linux + 166)
660#define __NR_query_module (__NR_Linux + 167)
661#define __NR_poll (__NR_Linux + 168)
662#define __NR_nfsservctl (__NR_Linux + 169)
663#define __NR_setresgid (__NR_Linux + 170)
664#define __NR_getresgid (__NR_Linux + 171)
665#define __NR_prctl (__NR_Linux + 172)
666#define __NR_rt_sigreturn (__NR_Linux + 173)
667#define __NR_rt_sigaction (__NR_Linux + 174)
668#define __NR_rt_sigprocmask (__NR_Linux + 175)
669#define __NR_rt_sigpending (__NR_Linux + 176)
670#define __NR_rt_sigtimedwait (__NR_Linux + 177)
671#define __NR_rt_sigqueueinfo (__NR_Linux + 178)
672#define __NR_rt_sigsuspend (__NR_Linux + 179)
673#define __NR_chown (__NR_Linux + 180)
674#define __NR_setsockopt (__NR_Linux + 181)
675#define __NR_getsockopt (__NR_Linux + 182)
676#define __NR_sendmsg (__NR_Linux + 183)
677#define __NR_recvmsg (__NR_Linux + 184)
678#define __NR_semop (__NR_Linux + 185)
679#define __NR_semget (__NR_Linux + 186)
680#define __NR_semctl (__NR_Linux + 187)
681#define __NR_msgsnd (__NR_Linux + 188)
682#define __NR_msgrcv (__NR_Linux + 189)
683#define __NR_msgget (__NR_Linux + 190)
684#define __NR_msgctl (__NR_Linux + 191)
685#define __NR_shmat (__NR_Linux + 192)
686#define __NR_shmdt (__NR_Linux + 193)
687#define __NR_shmget (__NR_Linux + 194)
688#define __NR_shmctl (__NR_Linux + 195)
689
690#define __NR_getpmsg (__NR_Linux + 196) /* some people actually want streams */
691#define __NR_putpmsg (__NR_Linux + 197) /* some people actually want streams */
692
693#define __NR_lstat64 (__NR_Linux + 198)
694#define __NR_truncate64 (__NR_Linux + 199)
695#define __NR_ftruncate64 (__NR_Linux + 200)
696#define __NR_getdents64 (__NR_Linux + 201)
697#define __NR_fcntl64 (__NR_Linux + 202)
698#define __NR_attrctl (__NR_Linux + 203)
699#define __NR_acl_get (__NR_Linux + 204)
700#define __NR_acl_set (__NR_Linux + 205)
701#define __NR_gettid (__NR_Linux + 206)
702#define __NR_readahead (__NR_Linux + 207)
703#define __NR_tkill (__NR_Linux + 208)
704#define __NR_sendfile64 (__NR_Linux + 209)
705#define __NR_futex (__NR_Linux + 210)
706#define __NR_sched_setaffinity (__NR_Linux + 211)
707#define __NR_sched_getaffinity (__NR_Linux + 212)
708#define __NR_set_thread_area (__NR_Linux + 213)
709#define __NR_get_thread_area (__NR_Linux + 214)
710#define __NR_io_setup (__NR_Linux + 215)
711#define __NR_io_destroy (__NR_Linux + 216)
712#define __NR_io_getevents (__NR_Linux + 217)
713#define __NR_io_submit (__NR_Linux + 218)
714#define __NR_io_cancel (__NR_Linux + 219)
715#define __NR_alloc_hugepages (__NR_Linux + 220)
716#define __NR_free_hugepages (__NR_Linux + 221)
717#define __NR_exit_group (__NR_Linux + 222)
718#define __NR_lookup_dcookie (__NR_Linux + 223)
719#define __NR_epoll_create (__NR_Linux + 224)
720#define __NR_epoll_ctl (__NR_Linux + 225)
721#define __NR_epoll_wait (__NR_Linux + 226)
722#define __NR_remap_file_pages (__NR_Linux + 227)
723#define __NR_semtimedop (__NR_Linux + 228)
724#define __NR_mq_open (__NR_Linux + 229)
725#define __NR_mq_unlink (__NR_Linux + 230)
726#define __NR_mq_timedsend (__NR_Linux + 231)
727#define __NR_mq_timedreceive (__NR_Linux + 232)
728#define __NR_mq_notify (__NR_Linux + 233)
729#define __NR_mq_getsetattr (__NR_Linux + 234)
730#define __NR_waitid (__NR_Linux + 235)
731#define __NR_fadvise64_64 (__NR_Linux + 236)
732#define __NR_set_tid_address (__NR_Linux + 237)
733#define __NR_setxattr (__NR_Linux + 238)
734#define __NR_lsetxattr (__NR_Linux + 239)
735#define __NR_fsetxattr (__NR_Linux + 240)
736#define __NR_getxattr (__NR_Linux + 241)
737#define __NR_lgetxattr (__NR_Linux + 242)
738#define __NR_fgetxattr (__NR_Linux + 243)
739#define __NR_listxattr (__NR_Linux + 244)
740#define __NR_llistxattr (__NR_Linux + 245)
741#define __NR_flistxattr (__NR_Linux + 246)
742#define __NR_removexattr (__NR_Linux + 247)
743#define __NR_lremovexattr (__NR_Linux + 248)
744#define __NR_fremovexattr (__NR_Linux + 249)
745#define __NR_timer_create (__NR_Linux + 250)
746#define __NR_timer_settime (__NR_Linux + 251)
747#define __NR_timer_gettime (__NR_Linux + 252)
748#define __NR_timer_getoverrun (__NR_Linux + 253)
749#define __NR_timer_delete (__NR_Linux + 254)
750#define __NR_clock_settime (__NR_Linux + 255)
751#define __NR_clock_gettime (__NR_Linux + 256)
752#define __NR_clock_getres (__NR_Linux + 257)
753#define __NR_clock_nanosleep (__NR_Linux + 258)
754#define __NR_tgkill (__NR_Linux + 259)
755#define __NR_mbind (__NR_Linux + 260)
756#define __NR_get_mempolicy (__NR_Linux + 261)
757#define __NR_set_mempolicy (__NR_Linux + 262)
758
759#define __NR_Linux_syscalls 263
760
761#define HPUX_GATEWAY_ADDR 0xC0000004
762#define LINUX_GATEWAY_ADDR 0x100
763
764#ifndef __ASSEMBLY__
765
766#define SYS_ify(syscall_name) __NR_##syscall_name
767
768/* Assume all syscalls are done from PIC code just to be
769 * safe. The worst case scenario is that you lose a register
770 * and save/restore r19 across the syscall. */
771#define PIC
772
773#ifndef ASM_LINE_SEP
774# define ASM_LINE_SEP ;
775#endif
776
777/* Definition taken from glibc 2.3.3
778 * sysdeps/unix/sysv/linux/hppa/sysdep.h
779 */
780
781#ifdef PIC
782/* WARNING: CANNOT BE USED IN A NOP! */
783# define K_STW_ASM_PIC " copy %%r19, %%r4\n"
784# define K_LDW_ASM_PIC " copy %%r4, %%r19\n"
785# define K_USING_GR4 "%r4",
786#else
787# define K_STW_ASM_PIC " \n"
788# define K_LDW_ASM_PIC " \n"
789# define K_USING_GR4
790#endif
791
792/* GCC has to be warned that a syscall may clobber all the ABI
793 registers listed as "caller-saves", see page 8, Table 2
794 in section 2.2.6 of the PA-RISC RUN-TIME architecture
795 document. However! r28 is the result and will conflict with
796 the clobber list so it is left out. Also the input arguments
797 registers r20 -> r26 will conflict with the list so they
798 are treated specially. Although r19 is clobbered by the syscall
799 we cannot say this because it would violate ABI, thus we say
800 r4 is clobbered and use that register to save/restore r19
801 across the syscall. */
802
803#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \
804 "%r20", "%r29", "%r31"
805
806#undef K_INLINE_SYSCALL
807#define K_INLINE_SYSCALL(name, nr, args...) ({ \
808 long __sys_res; \
809 { \
810 register unsigned long __res asm("r28"); \
811 K_LOAD_ARGS_##nr(args) \
812 /* FIXME: HACK stw/ldw r19 around syscall */ \
813 asm volatile( \
814 K_STW_ASM_PIC \
815 " ble 0x100(%%sr2, %%r0)\n" \
816 " ldi %1, %%r20\n" \
817 K_LDW_ASM_PIC \
818 : "=r" (__res) \
819 : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \
820 : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \
821 ); \
822 __sys_res = (long)__res; \
823 } \
824 if ( (unsigned long)__sys_res >= (unsigned long)-4095 ){ \
825 errno = -__sys_res; \
826 __sys_res = -1; \
827 } \
828 __sys_res; \
829})
830
831#define K_LOAD_ARGS_0()
832#define K_LOAD_ARGS_1(r26) \
833 register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \
834 K_LOAD_ARGS_0()
835#define K_LOAD_ARGS_2(r26,r25) \
836 register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
837 K_LOAD_ARGS_1(r26)
838#define K_LOAD_ARGS_3(r26,r25,r24) \
839 register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
840 K_LOAD_ARGS_2(r26,r25)
841#define K_LOAD_ARGS_4(r26,r25,r24,r23) \
842 register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \
843 K_LOAD_ARGS_3(r26,r25,r24)
844#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
845 register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \
846 K_LOAD_ARGS_4(r26,r25,r24,r23)
847#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
848 register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \
849 K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
850
851/* Even with zero args we use r20 for the syscall number */
852#define K_ASM_ARGS_0
853#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26)
854#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25)
855#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24)
856#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23)
857#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22)
858#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21)
859
860/* The registers not listed as inputs but clobbered */
861#define K_CLOB_ARGS_6
862#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
863#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22"
864#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23"
865#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24"
866#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
867#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26"
868
869#define _syscall0(type,name) \
870type name(void) \
871{ \
872 return K_INLINE_SYSCALL(name, 0); \
873}
874
875#define _syscall1(type,name,type1,arg1) \
876type name(type1 arg1) \
877{ \
878 return K_INLINE_SYSCALL(name, 1, arg1); \
879}
880
881#define _syscall2(type,name,type1,arg1,type2,arg2) \
882type name(type1 arg1, type2 arg2) \
883{ \
884 return K_INLINE_SYSCALL(name, 2, arg1, arg2); \
885}
886
887#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
888type name(type1 arg1, type2 arg2, type3 arg3) \
889{ \
890 return K_INLINE_SYSCALL(name, 3, arg1, arg2, arg3); \
891}
892
893#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
894type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
895{ \
896 return K_INLINE_SYSCALL(name, 4, arg1, arg2, arg3, arg4); \
897}
898
899/* select takes 5 arguments */
900#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
901type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
902{ \
903 return K_INLINE_SYSCALL(name, 5, arg1, arg2, arg3, arg4, arg5); \
904}
905
906#ifdef __KERNEL__
907#define __ARCH_WANT_OLD_READDIR
908#define __ARCH_WANT_STAT64
909#define __ARCH_WANT_SYS_ALARM
910#define __ARCH_WANT_SYS_GETHOSTNAME
911#define __ARCH_WANT_SYS_PAUSE
912#define __ARCH_WANT_SYS_SGETMASK
913#define __ARCH_WANT_SYS_SIGNAL
914#define __ARCH_WANT_SYS_TIME
915#define __ARCH_WANT_COMPAT_SYS_TIME
916#define __ARCH_WANT_SYS_UTIME
917#define __ARCH_WANT_SYS_WAITPID
918#define __ARCH_WANT_SYS_SOCKETCALL
919#define __ARCH_WANT_SYS_FADVISE64
920#define __ARCH_WANT_SYS_GETPGRP
921#define __ARCH_WANT_SYS_LLSEEK
922#define __ARCH_WANT_SYS_NICE
923#define __ARCH_WANT_SYS_OLD_GETRLIMIT
924#define __ARCH_WANT_SYS_OLDUMOUNT
925#define __ARCH_WANT_SYS_SIGPENDING
926#define __ARCH_WANT_SYS_SIGPROCMASK
927#define __ARCH_WANT_SYS_RT_SIGACTION
928#endif
929
930/* mmap & mmap2 take 6 arguments */
931#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \
932type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \
933{ \
934 return K_INLINE_SYSCALL(name, 6, arg1, arg2, arg3, arg4, arg5, arg6); \
935}
936
937#ifdef __KERNEL_SYSCALLS__
938
939#include <asm/current.h>
940#include <linux/compiler.h>
941#include <linux/types.h>
942#include <linux/syscalls.h>
943
944static inline pid_t setsid(void)
945{
946 return sys_setsid();
947}
948
949static inline int write(int fd, const char *buf, off_t count)
950{
951 return sys_write(fd, buf, count);
952}
953
954static inline int read(int fd, char *buf, off_t count)
955{
956 return sys_read(fd, buf, count);
957}
958
959static inline off_t lseek(int fd, off_t offset, int count)
960{
961 return sys_lseek(fd, offset, count);
962}
963
964static inline int dup(int fd)
965{
966 return sys_dup(fd);
967}
968
969static inline int execve(char *filename, char * argv [],
970 char * envp[])
971{
972 extern int __execve(char *, char **, char **, struct task_struct *);
973 return __execve(filename, argv, envp, current);
974}
975
976static inline int open(const char *file, int flag, int mode)
977{
978 return sys_open(file, flag, mode);
979}
980
981static inline int close(int fd)
982{
983 return sys_close(fd);
984}
985
986static inline void _exit(int exitcode)
987{
988 sys_exit(exitcode);
989}
990
991static inline pid_t waitpid(pid_t pid, int *wait_stat, int options)
992{
993 return sys_wait4(pid, wait_stat, options, NULL);
994}
995
996asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len,
997 unsigned long prot, unsigned long flags,
998 unsigned long fd, unsigned long offset);
999asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len,
1000 unsigned long prot, unsigned long flags,
1001 unsigned long fd, unsigned long pgoff);
1002struct pt_regs;
1003asmlinkage int sys_execve(struct pt_regs *regs);
1004int sys_clone(unsigned long clone_flags, unsigned long usp,
1005 struct pt_regs *regs);
1006int sys_vfork(struct pt_regs *regs);
1007int sys_pipe(int *fildes);
1008long sys_ptrace(long request, pid_t pid, long addr, long data);
1009struct sigaction;
1010asmlinkage long sys_rt_sigaction(int sig,
1011 const struct sigaction __user *act,
1012 struct sigaction __user *oact,
1013 size_t sigsetsize);
1014
1015#endif /* __KERNEL_SYSCALLS__ */
1016
1017#endif /* __ASSEMBLY__ */
1018
1019#undef STR
1020
1021/*
1022 * "Conditional" syscalls
1023 *
1024 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
1025 * but it doesn't work on all toolchains, so we just do it by hand
1026 */
1027#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
1028
1029#endif /* _ASM_PARISC_UNISTD_H_ */
diff --git a/include/asm-parisc/unwind.h b/include/asm-parisc/unwind.h
new file mode 100644
index 000000000000..2f7e6e50a158
--- /dev/null
+++ b/include/asm-parisc/unwind.h
@@ -0,0 +1,77 @@
1#ifndef _UNWIND_H_
2#define _UNWIND_H_
3
4#include <linux/list.h>
5
6/* From ABI specifications */
7struct unwind_table_entry {
8 unsigned int region_start;
9 unsigned int region_end;
10 unsigned int Cannot_unwind:1; /* 0 */
11 unsigned int Millicode:1; /* 1 */
12 unsigned int Millicode_save_sr0:1; /* 2 */
13 unsigned int Region_description:2; /* 3..4 */
14 unsigned int reserved1:1; /* 5 */
15 unsigned int Entry_SR:1; /* 6 */
16 unsigned int Entry_FR:4; /* number saved *//* 7..10 */
17 unsigned int Entry_GR:5; /* number saved *//* 11..15 */
18 unsigned int Args_stored:1; /* 16 */
19 unsigned int Variable_Frame:1; /* 17 */
20 unsigned int Separate_Package_Body:1; /* 18 */
21 unsigned int Frame_Extension_Millicode:1; /* 19 */
22 unsigned int Stack_Overflow_Check:1; /* 20 */
23 unsigned int Two_Instruction_SP_Increment:1; /* 21 */
24 unsigned int Ada_Region:1; /* 22 */
25 unsigned int cxx_info:1; /* 23 */
26 unsigned int cxx_try_catch:1; /* 24 */
27 unsigned int sched_entry_seq:1; /* 25 */
28 unsigned int reserved2:1; /* 26 */
29 unsigned int Save_SP:1; /* 27 */
30 unsigned int Save_RP:1; /* 28 */
31 unsigned int Save_MRP_in_frame:1; /* 29 */
32 unsigned int extn_ptr_defined:1; /* 30 */
33 unsigned int Cleanup_defined:1; /* 31 */
34
35 unsigned int MPE_XL_interrupt_marker:1; /* 0 */
36 unsigned int HP_UX_interrupt_marker:1; /* 1 */
37 unsigned int Large_frame:1; /* 2 */
38 unsigned int Pseudo_SP_Set:1; /* 3 */
39 unsigned int reserved4:1; /* 4 */
40 unsigned int Total_frame_size:27; /* 5..31 */
41};
42
43struct unwind_table {
44 struct list_head list;
45 const char *name;
46 unsigned long gp;
47 unsigned long base_addr;
48 unsigned long start;
49 unsigned long end;
50 const struct unwind_table_entry *table;
51 unsigned long length;
52};
53
54struct unwind_frame_info {
55 struct task_struct *t;
56 /* Eventually we would like to be able to get at any of the registers
57 available; but for now we only try to get the sp and ip for each
58 frame */
59 /* struct pt_regs regs; */
60 unsigned long sp, ip, rp, r31;
61 unsigned long prev_sp, prev_ip;
62};
63
64struct unwind_table *
65unwind_table_add(const char *name, unsigned long base_addr,
66 unsigned long gp, void *start, void *end);
67void
68unwind_table_remove(struct unwind_table *table);
69
70void unwind_frame_init(struct unwind_frame_info *info, struct task_struct *t,
71 struct pt_regs *regs);
72void unwind_frame_init_from_blocked_task(struct unwind_frame_info *info, struct task_struct *t);
73void unwind_frame_init_running(struct unwind_frame_info *info, struct pt_regs *regs);
74int unwind_once(struct unwind_frame_info *info);
75int unwind_to_user(struct unwind_frame_info *info);
76
77#endif
diff --git a/include/asm-parisc/user.h b/include/asm-parisc/user.h
new file mode 100644
index 000000000000..80224753e508
--- /dev/null
+++ b/include/asm-parisc/user.h
@@ -0,0 +1,5 @@
1/* This file should not exist, but lots of generic code still includes
2 it. It's a hangover from old a.out days and the traditional core
3 dump format. We are ELF-only, and so are our core dumps. If we
4 need to support HP/UX core format then we'll do it here
5 eventually. */
diff --git a/include/asm-parisc/xor.h b/include/asm-parisc/xor.h
new file mode 100644
index 000000000000..c82eb12a5b18
--- /dev/null
+++ b/include/asm-parisc/xor.h
@@ -0,0 +1 @@
#include <asm-generic/xor.h>