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authorDavid S. Miller <davem@davemloft.net>2005-06-02 15:55:50 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2005-06-28 00:52:45 -0400
commite24c2d963a604d9eaa560c90371fa387d3eec8f1 (patch)
tree66be193d59dd22fac0b62980769c4f19e045b5a2 /include/asm-parisc
parent2311b1f2bbd36fa5f366a7448c718b2556e0f02c (diff)
[PATCH] PCI: DMA bursting advice
After seeing, at best, "guesses" as to the following kind of information in several drivers, I decided that we really need a way for platforms to specifically give advice in this area for what works best with their PCI controller implementation. Basically, this new interface gives DMA bursting advice on PCI. There are three forms of the advice: 1) Burst as much as possible, it is not necessary to end bursts on some particular boundary for best performance. 2) Burst on some byte count multiple. A DMA burst to some multiple of number of bytes may be done, but it is important to end the burst on an exact multiple for best performance. The best example of this I am aware of are the PPC64 PCI controllers, where if you end a burst mid-cacheline then chip has to refetch the data and the IOMMU translations which hurts performance a lot. 3) Burst on a single byte count multiple. Bursts shall end exactly on the next multiple boundary for best performance. Sparc64 and Alpha's PCI controllers operate this way. They disconnect any device which tries to burst across a cacheline boundary. Actually, newer sparc64 PCI controllers do not have this behavior. That is why the "pdev" is passed into the interface, so I can add code later to check which PCI controller the system is using and give advice accordingly. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/asm-parisc')
-rw-r--r--include/asm-parisc/pci.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h
index 0763c2982fb0..f9f5bf90111d 100644
--- a/include/asm-parisc/pci.h
+++ b/include/asm-parisc/pci.h
@@ -230,6 +230,23 @@ extern inline void pcibios_register_hba(struct pci_hba_data *x)
230/* export the pci_ DMA API in terms of the dma_ one */ 230/* export the pci_ DMA API in terms of the dma_ one */
231#include <asm-generic/pci-dma-compat.h> 231#include <asm-generic/pci-dma-compat.h>
232 232
233static inline void pci_dma_burst_advice(struct pci_dev *pdev,
234 enum pci_dma_burst_strategy *strat,
235 unsigned long *strategy_parameter)
236{
237 unsigned long cacheline_size;
238 u8 byte;
239
240 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
241 if (byte == 0)
242 cacheline_size = 1024;
243 else
244 cacheline_size = (int) byte * 4;
245
246 *strat = PCI_DMA_BURST_MULTIPLE;
247 *strategy_parameter = cacheline_size;
248}
249
233extern void 250extern void
234pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 251pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
235 struct resource *res); 252 struct resource *res);