diff options
author | Kyle McMartin <kyle@parisc-linux.org> | 2006-04-22 02:48:22 -0400 |
---|---|---|
committer | Kyle McMartin <kyle@hera.kernel.org> | 2006-06-27 19:28:32 -0400 |
commit | 64f495323c9a902b3e59fe0a588585102bb3b13e (patch) | |
tree | 202d6c0105b0348aadfa8761e7c3cf27a5e98db9 /include/asm-parisc/system.h | |
parent | f36f44de721db44b4c2944133c3c5c2e06f633f0 (diff) |
[PARISC] Ensure all ldcw uses are ldcw,co on pa2.0
ldcw,co should always be used on pa2.0, otherwise the strict cache
width alignment requirement is not relaxed.
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc/system.h')
-rw-r--r-- | include/asm-parisc/system.h | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h index 863876134b2c..5fe2d2329ab5 100644 --- a/include/asm-parisc/system.h +++ b/include/asm-parisc/system.h | |||
@@ -155,13 +155,14 @@ static inline void set_eiem(unsigned long val) | |||
155 | type and dynamically select the 16-byte aligned int from the array | 155 | type and dynamically select the 16-byte aligned int from the array |
156 | for the semaphore. */ | 156 | for the semaphore. */ |
157 | 157 | ||
158 | #define __PA_LDCW_ALIGNMENT 16 | 158 | #define __PA_LDCW_ALIGNMENT 16 |
159 | #define __ldcw_align(a) ({ \ | 159 | #define __ldcw_align(a) ({ \ |
160 | unsigned long __ret = (unsigned long) &(a)->lock[0]; \ | 160 | unsigned long __ret = (unsigned long) &(a)->lock[0]; \ |
161 | __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \ | 161 | __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \ |
162 | (volatile unsigned int *) __ret; \ | 162 | & ~(__PA_LDCW_ALIGNMENT - 1); \ |
163 | (volatile unsigned int *) __ret; \ | ||
163 | }) | 164 | }) |
164 | #define LDCW "ldcw" | 165 | #define __LDCW "ldcw" |
165 | 166 | ||
166 | #else /*CONFIG_PA20*/ | 167 | #else /*CONFIG_PA20*/ |
167 | /* From: "Jim Hull" <jim.hull of hp.com> | 168 | /* From: "Jim Hull" <jim.hull of hp.com> |
@@ -171,17 +172,18 @@ static inline void set_eiem(unsigned long val) | |||
171 | they only require "natural" alignment (4-byte for ldcw, 8-byte for | 172 | they only require "natural" alignment (4-byte for ldcw, 8-byte for |
172 | ldcd). */ | 173 | ldcd). */ |
173 | 174 | ||
174 | #define __PA_LDCW_ALIGNMENT 4 | 175 | #define __PA_LDCW_ALIGNMENT 4 |
175 | #define __ldcw_align(a) ((volatile unsigned int *)a) | 176 | #define __ldcw_align(a) ((volatile unsigned int *)a) |
176 | #define LDCW "ldcw,co" | 177 | #define __LDCW "ldcw,co" |
177 | 178 | ||
178 | #endif /*!CONFIG_PA20*/ | 179 | #endif /*!CONFIG_PA20*/ |
179 | 180 | ||
180 | /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ | 181 | /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ |
181 | #define __ldcw(a) ({ \ | 182 | #define __ldcw(a) ({ \ |
182 | unsigned __ret; \ | 183 | unsigned __ret; \ |
183 | __asm__ __volatile__(LDCW " 0(%1),%0" : "=r" (__ret) : "r" (a)); \ | 184 | __asm__ __volatile__(__LDCW " 0(%1),%0" \ |
184 | __ret; \ | 185 | : "=r" (__ret) : "r" (a)); \ |
186 | __ret; \ | ||
185 | }) | 187 | }) |
186 | 188 | ||
187 | #ifdef CONFIG_SMP | 189 | #ifdef CONFIG_SMP |