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authorJames Bottomley <jejb@parisc-linux.org>2006-08-23 12:00:04 -0400
committerMatthew Wilcox <willy@parisc-linux.org>2006-10-04 08:46:21 -0400
commit20f4d3cb9b94ce3fec9a6135b9ad075b82b24f41 (patch)
tree995dec90d251e8e57abca8fea552d8ae5314a493 /include/asm-parisc/processor.h
parente45da35e180a4fc91307648d021a598495742c32 (diff)
[PARISC] parisc specific kmap API implementation for pa8800
This patch fixes the pa8800 at a gross level (there are still other subtle incoherency issues which can still cause crashes and HPMCs). What it does is try to force eject inequivalent aliases before they become visible to the L2 cache (which is where we get the incoherence problems). A new function (parisc_requires_coherency) is introduced in asm/processor.h to identify the pa8x00 processors (8800 and 8900) which have the issue. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc/processor.h')
-rw-r--r--include/asm-parisc/processor.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
index c72b8fa49686..4313618c98ee 100644
--- a/include/asm-parisc/processor.h
+++ b/include/asm-parisc/processor.h
@@ -332,6 +332,19 @@ extern unsigned long get_wchan(struct task_struct *p);
332 332
333#define cpu_relax() barrier() 333#define cpu_relax() barrier()
334 334
335/* Used as a macro to identify the combined VIPT/PIPT cached
336 * CPUs which require a guarantee of coherency (no inequivalent
337 * aliases with different data, whether clean or not) to operate */
338static inline int parisc_requires_coherency(void)
339{
340#ifdef CONFIG_PA8X00
341 /* FIXME: also pa8900 - when we see one */
342 return boot_cpu_data.cpu_type == mako;
343#else
344 return 0;
345#endif
346}
347
335#endif /* __ASSEMBLY__ */ 348#endif /* __ASSEMBLY__ */
336 349
337#endif /* __ASM_PARISC_PROCESSOR_H */ 350#endif /* __ASM_PARISC_PROCESSOR_H */