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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-30 18:04:13 -0500 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-30 18:04:13 -0500 |
commit | ce362c009250340358a7221f3cdb7954cbf19c01 (patch) | |
tree | 38b4700e51d3cce214690e7882069e0e12abf8d4 /include/asm-parisc/io.h | |
parent | 064c94f9da8845f12446ab37142aa10f3c6f66ac (diff) | |
parent | cd7a9202a5a6e7712df2b80ed5ebd7b078130fc3 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6: (24 commits)
[PARISC] Fix double free when removing HIL drivers
[PARISC] Add atomic_sub_and_test
[PARISC] Enabled some NLS modules in a500, b180 and c3000 defconfigs
[PARISC] Kill duplicated EXPORT_SYMBOL warnings
[PARISC] Move ioremap EXPORT_SYMBOL from parisc_ksyms.c
[PARISC] Make local_t use atomic_long_t
[PARISC] Update defconfigs
[PARISC] Add PREEMPT support
[PARISC] More useful readwrite lock helpers
[PARISC] Convert HIL drivers to use input_allocate_device
[PARISC] Fixup CONFIG_EISA a bit
[PARISC] getsockopt should be ENTRY_COMP
[PARISC] Remove obsolete CONFIG_DEBUG_IOREMAP
[PARISC] Temporary FIXME for ioremapping EISA regions
[PARISC] Enable ioremap functionality unconditionally
[PARISC] Fix stifb with IOREMAP and a 64-bit kernel
[PARISC] Add CONFIG_HPPA_IOREMAP to conditionally enable ioremap
[PARISC] Add STRICT_MM_TYPECHECKS
[PARISC] Fix IOREMAP with a 64-bit kernel
[PARISC] Add parisc implementation of flush_kernel_dcache_page()
...
Diffstat (limited to 'include/asm-parisc/io.h')
-rw-r--r-- | include/asm-parisc/io.h | 95 |
1 files changed, 0 insertions, 95 deletions
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h index be0c7234a6da..29da31194b91 100644 --- a/include/asm-parisc/io.h +++ b/include/asm-parisc/io.h | |||
@@ -25,35 +25,11 @@ extern unsigned long parisc_vmerge_max_size; | |||
25 | * eg dev->hpa or 0xfee00000. | 25 | * eg dev->hpa or 0xfee00000. |
26 | */ | 26 | */ |
27 | 27 | ||
28 | #ifdef CONFIG_DEBUG_IOREMAP | ||
29 | #ifdef CONFIG_64BIT | ||
30 | #define NYBBLE_SHIFT 60 | ||
31 | #else | ||
32 | #define NYBBLE_SHIFT 28 | ||
33 | #endif | ||
34 | extern void gsc_bad_addr(unsigned long addr); | ||
35 | extern void __raw_bad_addr(const volatile void __iomem *addr); | ||
36 | #define gsc_check_addr(addr) \ | ||
37 | if ((addr >> NYBBLE_SHIFT) != 0xf) { \ | ||
38 | gsc_bad_addr(addr); \ | ||
39 | addr |= 0xfUL << NYBBLE_SHIFT; \ | ||
40 | } | ||
41 | #define __raw_check_addr(addr) \ | ||
42 | if (((unsigned long)addr >> NYBBLE_SHIFT) != 0xe) \ | ||
43 | __raw_bad_addr(addr); \ | ||
44 | addr = (void __iomem *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT)); | ||
45 | #else | ||
46 | #define gsc_check_addr(addr) | ||
47 | #define __raw_check_addr(addr) | ||
48 | #endif | ||
49 | |||
50 | static inline unsigned char gsc_readb(unsigned long addr) | 28 | static inline unsigned char gsc_readb(unsigned long addr) |
51 | { | 29 | { |
52 | long flags; | 30 | long flags; |
53 | unsigned char ret; | 31 | unsigned char ret; |
54 | 32 | ||
55 | gsc_check_addr(addr); | ||
56 | |||
57 | __asm__ __volatile__( | 33 | __asm__ __volatile__( |
58 | " rsm 2,%0\n" | 34 | " rsm 2,%0\n" |
59 | " ldbx 0(%2),%1\n" | 35 | " ldbx 0(%2),%1\n" |
@@ -68,8 +44,6 @@ static inline unsigned short gsc_readw(unsigned long addr) | |||
68 | long flags; | 44 | long flags; |
69 | unsigned short ret; | 45 | unsigned short ret; |
70 | 46 | ||
71 | gsc_check_addr(addr); | ||
72 | |||
73 | __asm__ __volatile__( | 47 | __asm__ __volatile__( |
74 | " rsm 2,%0\n" | 48 | " rsm 2,%0\n" |
75 | " ldhx 0(%2),%1\n" | 49 | " ldhx 0(%2),%1\n" |
@@ -83,8 +57,6 @@ static inline unsigned int gsc_readl(unsigned long addr) | |||
83 | { | 57 | { |
84 | u32 ret; | 58 | u32 ret; |
85 | 59 | ||
86 | gsc_check_addr(addr); | ||
87 | |||
88 | __asm__ __volatile__( | 60 | __asm__ __volatile__( |
89 | " ldwax 0(%1),%0\n" | 61 | " ldwax 0(%1),%0\n" |
90 | : "=r" (ret) : "r" (addr) ); | 62 | : "=r" (ret) : "r" (addr) ); |
@@ -95,7 +67,6 @@ static inline unsigned int gsc_readl(unsigned long addr) | |||
95 | static inline unsigned long long gsc_readq(unsigned long addr) | 67 | static inline unsigned long long gsc_readq(unsigned long addr) |
96 | { | 68 | { |
97 | unsigned long long ret; | 69 | unsigned long long ret; |
98 | gsc_check_addr(addr); | ||
99 | 70 | ||
100 | #ifdef __LP64__ | 71 | #ifdef __LP64__ |
101 | __asm__ __volatile__( | 72 | __asm__ __volatile__( |
@@ -112,8 +83,6 @@ static inline unsigned long long gsc_readq(unsigned long addr) | |||
112 | static inline void gsc_writeb(unsigned char val, unsigned long addr) | 83 | static inline void gsc_writeb(unsigned char val, unsigned long addr) |
113 | { | 84 | { |
114 | long flags; | 85 | long flags; |
115 | gsc_check_addr(addr); | ||
116 | |||
117 | __asm__ __volatile__( | 86 | __asm__ __volatile__( |
118 | " rsm 2,%0\n" | 87 | " rsm 2,%0\n" |
119 | " stbs %1,0(%2)\n" | 88 | " stbs %1,0(%2)\n" |
@@ -124,8 +93,6 @@ static inline void gsc_writeb(unsigned char val, unsigned long addr) | |||
124 | static inline void gsc_writew(unsigned short val, unsigned long addr) | 93 | static inline void gsc_writew(unsigned short val, unsigned long addr) |
125 | { | 94 | { |
126 | long flags; | 95 | long flags; |
127 | gsc_check_addr(addr); | ||
128 | |||
129 | __asm__ __volatile__( | 96 | __asm__ __volatile__( |
130 | " rsm 2,%0\n" | 97 | " rsm 2,%0\n" |
131 | " sths %1,0(%2)\n" | 98 | " sths %1,0(%2)\n" |
@@ -135,8 +102,6 @@ static inline void gsc_writew(unsigned short val, unsigned long addr) | |||
135 | 102 | ||
136 | static inline void gsc_writel(unsigned int val, unsigned long addr) | 103 | static inline void gsc_writel(unsigned int val, unsigned long addr) |
137 | { | 104 | { |
138 | gsc_check_addr(addr); | ||
139 | |||
140 | __asm__ __volatile__( | 105 | __asm__ __volatile__( |
141 | " stwas %0,0(%1)\n" | 106 | " stwas %0,0(%1)\n" |
142 | : : "r" (val), "r" (addr) ); | 107 | : : "r" (val), "r" (addr) ); |
@@ -144,8 +109,6 @@ static inline void gsc_writel(unsigned int val, unsigned long addr) | |||
144 | 109 | ||
145 | static inline void gsc_writeq(unsigned long long val, unsigned long addr) | 110 | static inline void gsc_writeq(unsigned long long val, unsigned long addr) |
146 | { | 111 | { |
147 | gsc_check_addr(addr); | ||
148 | |||
149 | #ifdef __LP64__ | 112 | #ifdef __LP64__ |
150 | __asm__ __volatile__( | 113 | __asm__ __volatile__( |
151 | " stda %0,0(%1)\n" | 114 | " stda %0,0(%1)\n" |
@@ -180,14 +143,7 @@ extern inline void * ioremap_nocache(unsigned long offset, unsigned long size) | |||
180 | 143 | ||
181 | extern void iounmap(void __iomem *addr); | 144 | extern void iounmap(void __iomem *addr); |
182 | 145 | ||
183 | /* | ||
184 | * USE_HPPA_IOREMAP is the magic flag to enable or disable real ioremap() | ||
185 | * functionality. It's currently disabled because it may not work on some | ||
186 | * machines. | ||
187 | */ | ||
188 | #define USE_HPPA_IOREMAP 0 | ||
189 | 146 | ||
190 | #if USE_HPPA_IOREMAP | ||
191 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) | 147 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) |
192 | { | 148 | { |
193 | return (*(volatile unsigned char __force *) (addr)); | 149 | return (*(volatile unsigned char __force *) (addr)); |
@@ -221,57 +177,6 @@ static inline void __raw_writeq(unsigned long long b, volatile void __iomem *add | |||
221 | { | 177 | { |
222 | *(volatile unsigned long long __force *) addr = b; | 178 | *(volatile unsigned long long __force *) addr = b; |
223 | } | 179 | } |
224 | #else /* !USE_HPPA_IOREMAP */ | ||
225 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) | ||
226 | { | ||
227 | __raw_check_addr(addr); | ||
228 | |||
229 | return gsc_readb((unsigned long) addr); | ||
230 | } | ||
231 | static inline unsigned short __raw_readw(const volatile void __iomem *addr) | ||
232 | { | ||
233 | __raw_check_addr(addr); | ||
234 | |||
235 | return gsc_readw((unsigned long) addr); | ||
236 | } | ||
237 | static inline unsigned int __raw_readl(const volatile void __iomem *addr) | ||
238 | { | ||
239 | __raw_check_addr(addr); | ||
240 | |||
241 | return gsc_readl((unsigned long) addr); | ||
242 | } | ||
243 | static inline unsigned long long __raw_readq(const volatile void __iomem *addr) | ||
244 | { | ||
245 | __raw_check_addr(addr); | ||
246 | |||
247 | return gsc_readq((unsigned long) addr); | ||
248 | } | ||
249 | |||
250 | static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr) | ||
251 | { | ||
252 | __raw_check_addr(addr); | ||
253 | |||
254 | gsc_writeb(b, (unsigned long) addr); | ||
255 | } | ||
256 | static inline void __raw_writew(unsigned short b, volatile void __iomem *addr) | ||
257 | { | ||
258 | __raw_check_addr(addr); | ||
259 | |||
260 | gsc_writew(b, (unsigned long) addr); | ||
261 | } | ||
262 | static inline void __raw_writel(unsigned int b, volatile void __iomem *addr) | ||
263 | { | ||
264 | __raw_check_addr(addr); | ||
265 | |||
266 | gsc_writel(b, (unsigned long) addr); | ||
267 | } | ||
268 | static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr) | ||
269 | { | ||
270 | __raw_check_addr(addr); | ||
271 | |||
272 | gsc_writeq(b, (unsigned long) addr); | ||
273 | } | ||
274 | #endif /* !USE_HPPA_IOREMAP */ | ||
275 | 180 | ||
276 | /* readb can never be const, so use __fswab instead of le*_to_cpu */ | 181 | /* readb can never be const, so use __fswab instead of le*_to_cpu */ |
277 | #define readb(addr) __raw_readb(addr) | 182 | #define readb(addr) __raw_readb(addr) |