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authorKyle McMartin <kyle@parisc-linux.org>2006-08-13 20:37:26 -0400
committerMatthew Wilcox <willy@parisc-linux.org>2006-10-04 08:44:58 -0400
commit32104b29cdf93f78ac37e681bd4547413466d13c (patch)
tree4b058cad9227dd960da79daf94235517690f9197 /include/asm-parisc/cache.h
parent4068d93cd17561bcbfc821c831cb048385320bd6 (diff)
[PARISC] PA7200 also supports prefetch for read
It seems PA7200 processors also suppress traps on loads to %r0. This means we can prefetch for read on these cpus. Of course, we can't support prefetch for write, since that requires LOAD DOUBLEWORD which was added with PA2.0 Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc/cache.h')
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