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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-02-26 15:48:06 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-02-26 15:48:06 -0500
commitb0138a6cb7923a997d278b47c176778534d1095b (patch)
tree4fcb8822a69631baba568e4e1942847747123887 /include/asm-parisc/cache.h
parent6572d6d7d0f965dda19d02af804ed3ae4b3bf1fc (diff)
parent1055a8af093fea7490445bd15cd671020e542035 (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6: (78 commits) [PARISC] Use symbolic last syscall in __NR_Linux_syscalls [PARISC] Add missing statfs64 and fstatfs64 syscalls Revert "[PARISC] Optimize TLB flush on SMP systems" [PARISC] Compat signal fixes for 64-bit parisc [PARISC] Reorder syscalls to match unistd.h Revert "[PATCH] make kernel/signal.c:kill_proc_info() static" [PARISC] fix sys_rt_sigqueueinfo [PARISC] fix section mismatch warnings in harmony sound driver [PARISC] do not export get_register/set_register [PARISC] add ENTRY()/ENDPROC() and simplify assembly of HP/UX emulation code [PARISC] convert to use CONFIG_64BIT instead of __LP64__ [PARISC] use CONFIG_64BIT instead of __LP64__ [PARISC] add ASM_EXCEPTIONTABLE_ENTRY() macro [PARISC] more ENTRY(), ENDPROC(), END() conversions [PARISC] fix ENTRY() and ENDPROC() for 64bit-parisc [PARISC] Fixes /proc/cpuinfo cache output on B160L [PARISC] implement standard ENTRY(), END() and ENDPROC() [PARISC] kill ENTRY_SYS_CPUS [PARISC] clean up debugging printks in smp.c [PARISC] factor syscall_restart code out of do_signal ... Fix conflict in include/linux/sched.h due to kill_proc_info() being made publicly available to PARISC again.
Diffstat (limited to 'include/asm-parisc/cache.h')
-rw-r--r--include/asm-parisc/cache.h29
1 files changed, 5 insertions, 24 deletions
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h
index 7d22fa206fc4..32c2cca74345 100644
--- a/include/asm-parisc/cache.h
+++ b/include/asm-parisc/cache.h
@@ -30,31 +30,11 @@
30 30
31#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 31#define __read_mostly __attribute__((__section__(".data.read_mostly")))
32 32
33extern void flush_data_cache_local(void *); /* flushes local data-cache only */ 33void parisc_cache_init(void); /* initializes cache-flushing */
34extern void flush_instruction_cache_local(void *); /* flushes local code-cache only */ 34void disable_sr_hashing_asm(int); /* low level support for above */
35#ifdef CONFIG_SMP 35void disable_sr_hashing(void); /* turns off space register hashing */
36extern void flush_data_cache(void); /* flushes data-cache only (all processors) */ 36void free_sid(unsigned long);
37extern void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
38#else
39#define flush_data_cache() flush_data_cache_local(NULL)
40#define flush_instruction_cache() flush_instruction_cache_local(NULL)
41#endif
42
43extern void parisc_cache_init(void); /* initializes cache-flushing */
44extern void flush_all_caches(void); /* flush everything (tlb & cache) */
45extern int get_cache_info(char *);
46extern void flush_user_icache_range_asm(unsigned long, unsigned long);
47extern void flush_kernel_icache_range_asm(unsigned long, unsigned long);
48extern void flush_user_dcache_range_asm(unsigned long, unsigned long);
49extern void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
50extern void flush_kernel_dcache_page_asm(void *);
51extern void flush_kernel_icache_page(void *);
52extern void disable_sr_hashing(void); /* turns off space register hashing */
53extern void disable_sr_hashing_asm(int); /* low level support for above */
54extern void free_sid(unsigned long);
55unsigned long alloc_sid(void); 37unsigned long alloc_sid(void);
56extern void flush_user_dcache_page(unsigned long);
57extern void flush_user_icache_page(unsigned long);
58 38
59struct seq_file; 39struct seq_file;
60extern void show_cache_info(struct seq_file *m); 40extern void show_cache_info(struct seq_file *m);
@@ -63,6 +43,7 @@ extern int split_tlb;
63extern int dcache_stride; 43extern int dcache_stride;
64extern int icache_stride; 44extern int icache_stride;
65extern struct pdc_cache_info cache_info; 45extern struct pdc_cache_info cache_info;
46void parisc_setup_cache_timing(void);
66 47
67#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr)); 48#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr));
68#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr)); 49#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr));