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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-parisc/assembly.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
new file mode 100644
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1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
4 * Copyright (C) 1999 SuSE GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef _PARISC_ASSEMBLY_H
22#define _PARISC_ASSEMBLY_H
23
24#ifdef __LP64__
25#define LDREG ldd
26#define STREG std
27#define LDREGX ldd,s
28#define LDREGM ldd,mb
29#define STREGM std,ma
30#define SHRREG shrd
31#define RP_OFFSET 16
32#define FRAME_SIZE 128
33#define CALLEE_SAVE_FRAME_SIZE 144
34#else
35#define LDREG ldw
36#define STREG stw
37#define LDREGX ldwx,s
38#define LDREGM ldwm
39#define STREGM stwm
40#define SHRREG shr
41#define RP_OFFSET 20
42#define FRAME_SIZE 64
43#define CALLEE_SAVE_FRAME_SIZE 128
44#endif
45
46#ifdef CONFIG_PA20
47#define BL b,l
48# ifdef CONFIG_64BIT
49# define LEVEL 2.0w
50# else
51# define LEVEL 2.0
52# endif
53#else
54#define BL bl
55#define LEVEL 1.1
56#endif
57
58#ifdef __ASSEMBLY__
59
60#ifdef __LP64__
61/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
62 * work around that for now... */
63 .level 2.0w
64#endif
65
66#include <asm/offsets.h>
67#include <asm/page.h>
68
69#include <asm/asmregs.h>
70
71 sp = 30
72 gp = 27
73 ipsw = 22
74
75 /*
76 * We provide two versions of each macro to convert from physical
77 * to virtual and vice versa. The "_r1" versions take one argument
78 * register, but trashes r1 to do the conversion. The other
79 * version takes two arguments: a src and destination register.
80 * However, the source and destination registers can not be
81 * the same register.
82 */
83
84 .macro tophys grvirt, grphys
85 ldil L%(__PAGE_OFFSET), \grphys
86 sub \grvirt, \grphys, \grphys
87 .endm
88
89 .macro tovirt grphys, grvirt
90 ldil L%(__PAGE_OFFSET), \grvirt
91 add \grphys, \grvirt, \grvirt
92 .endm
93
94 .macro tophys_r1 gr
95 ldil L%(__PAGE_OFFSET), %r1
96 sub \gr, %r1, \gr
97 .endm
98
99 .macro tovirt_r1 gr
100 ldil L%(__PAGE_OFFSET), %r1
101 add \gr, %r1, \gr
102 .endm
103
104 .macro delay value
105 ldil L%\value, 1
106 ldo R%\value(1), 1
107 addib,UV,n -1,1,.
108 addib,NUV,n -1,1,.+8
109 nop
110 .endm
111
112 .macro debug value
113 .endm
114
115
116 /* Shift Left - note the r and t can NOT be the same! */
117 .macro shl r, sa, t
118 dep,z \r, 31-\sa, 32-\sa, \t
119 .endm
120
121 /* The PA 2.0 shift left */
122 .macro shlw r, sa, t
123 depw,z \r, 31-\sa, 32-\sa, \t
124 .endm
125
126 /* And the PA 2.0W shift left */
127 .macro shld r, sa, t
128 depd,z \r, 63-\sa, 64-\sa, \t
129 .endm
130
131 /* Shift Right - note the r and t can NOT be the same! */
132 .macro shr r, sa, t
133 extru \r, 31-\sa, 32-\sa, \t
134 .endm
135
136 /* pa20w version of shift right */
137 .macro shrd r, sa, t
138 extrd,u \r, 63-\sa, 64-\sa, \t
139 .endm
140
141 /* load 32-bit 'value' into 'reg' compensating for the ldil
142 * sign-extension when running in wide mode.
143 * WARNING!! neither 'value' nor 'reg' can be expressions
144 * containing '.'!!!! */
145 .macro load32 value, reg
146 ldil L%\value, \reg
147 ldo R%\value(\reg), \reg
148 .endm
149
150 .macro loadgp
151#ifdef __LP64__
152 ldil L%__gp, %r27
153 ldo R%__gp(%r27), %r27
154#else
155 ldil L%$global$, %r27
156 ldo R%$global$(%r27), %r27
157#endif
158 .endm
159
160#define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where
161#define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r
162#define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
163#define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
164
165 .macro save_general regs
166 STREG %r1, PT_GR1 (\regs)
167 STREG %r2, PT_GR2 (\regs)
168 STREG %r3, PT_GR3 (\regs)
169 STREG %r4, PT_GR4 (\regs)
170 STREG %r5, PT_GR5 (\regs)
171 STREG %r6, PT_GR6 (\regs)
172 STREG %r7, PT_GR7 (\regs)
173 STREG %r8, PT_GR8 (\regs)
174 STREG %r9, PT_GR9 (\regs)
175 STREG %r10, PT_GR10(\regs)
176 STREG %r11, PT_GR11(\regs)
177 STREG %r12, PT_GR12(\regs)
178 STREG %r13, PT_GR13(\regs)
179 STREG %r14, PT_GR14(\regs)
180 STREG %r15, PT_GR15(\regs)
181 STREG %r16, PT_GR16(\regs)
182 STREG %r17, PT_GR17(\regs)
183 STREG %r18, PT_GR18(\regs)
184 STREG %r19, PT_GR19(\regs)
185 STREG %r20, PT_GR20(\regs)
186 STREG %r21, PT_GR21(\regs)
187 STREG %r22, PT_GR22(\regs)
188 STREG %r23, PT_GR23(\regs)
189 STREG %r24, PT_GR24(\regs)
190 STREG %r25, PT_GR25(\regs)
191 /* r26 is saved in get_stack and used to preserve a value across virt_map */
192 STREG %r27, PT_GR27(\regs)
193 STREG %r28, PT_GR28(\regs)
194 /* r29 is saved in get_stack and used to point to saved registers */
195 /* r30 stack pointer saved in get_stack */
196 STREG %r31, PT_GR31(\regs)
197 .endm
198
199 .macro rest_general regs
200 /* r1 used as a temp in rest_stack and is restored there */
201 LDREG PT_GR2 (\regs), %r2
202 LDREG PT_GR3 (\regs), %r3
203 LDREG PT_GR4 (\regs), %r4
204 LDREG PT_GR5 (\regs), %r5
205 LDREG PT_GR6 (\regs), %r6
206 LDREG PT_GR7 (\regs), %r7
207 LDREG PT_GR8 (\regs), %r8
208 LDREG PT_GR9 (\regs), %r9
209 LDREG PT_GR10(\regs), %r10
210 LDREG PT_GR11(\regs), %r11
211 LDREG PT_GR12(\regs), %r12
212 LDREG PT_GR13(\regs), %r13
213 LDREG PT_GR14(\regs), %r14
214 LDREG PT_GR15(\regs), %r15
215 LDREG PT_GR16(\regs), %r16
216 LDREG PT_GR17(\regs), %r17
217 LDREG PT_GR18(\regs), %r18
218 LDREG PT_GR19(\regs), %r19
219 LDREG PT_GR20(\regs), %r20
220 LDREG PT_GR21(\regs), %r21
221 LDREG PT_GR22(\regs), %r22
222 LDREG PT_GR23(\regs), %r23
223 LDREG PT_GR24(\regs), %r24
224 LDREG PT_GR25(\regs), %r25
225 LDREG PT_GR26(\regs), %r26
226 LDREG PT_GR27(\regs), %r27
227 LDREG PT_GR28(\regs), %r28
228 /* r29 points to register save area, and is restored in rest_stack */
229 /* r30 stack pointer restored in rest_stack */
230 LDREG PT_GR31(\regs), %r31
231 .endm
232
233 .macro save_fp regs
234 fstd,ma %fr0, 8(\regs)
235 fstd,ma %fr1, 8(\regs)
236 fstd,ma %fr2, 8(\regs)
237 fstd,ma %fr3, 8(\regs)
238 fstd,ma %fr4, 8(\regs)
239 fstd,ma %fr5, 8(\regs)
240 fstd,ma %fr6, 8(\regs)
241 fstd,ma %fr7, 8(\regs)
242 fstd,ma %fr8, 8(\regs)
243 fstd,ma %fr9, 8(\regs)
244 fstd,ma %fr10, 8(\regs)
245 fstd,ma %fr11, 8(\regs)
246 fstd,ma %fr12, 8(\regs)
247 fstd,ma %fr13, 8(\regs)
248 fstd,ma %fr14, 8(\regs)
249 fstd,ma %fr15, 8(\regs)
250 fstd,ma %fr16, 8(\regs)
251 fstd,ma %fr17, 8(\regs)
252 fstd,ma %fr18, 8(\regs)
253 fstd,ma %fr19, 8(\regs)
254 fstd,ma %fr20, 8(\regs)
255 fstd,ma %fr21, 8(\regs)
256 fstd,ma %fr22, 8(\regs)
257 fstd,ma %fr23, 8(\regs)
258 fstd,ma %fr24, 8(\regs)
259 fstd,ma %fr25, 8(\regs)
260 fstd,ma %fr26, 8(\regs)
261 fstd,ma %fr27, 8(\regs)
262 fstd,ma %fr28, 8(\regs)
263 fstd,ma %fr29, 8(\regs)
264 fstd,ma %fr30, 8(\regs)
265 fstd %fr31, 0(\regs)
266 .endm
267
268 .macro rest_fp regs
269 fldd 0(\regs), %fr31
270 fldd,mb -8(\regs), %fr30
271 fldd,mb -8(\regs), %fr29
272 fldd,mb -8(\regs), %fr28
273 fldd,mb -8(\regs), %fr27
274 fldd,mb -8(\regs), %fr26
275 fldd,mb -8(\regs), %fr25
276 fldd,mb -8(\regs), %fr24
277 fldd,mb -8(\regs), %fr23
278 fldd,mb -8(\regs), %fr22
279 fldd,mb -8(\regs), %fr21
280 fldd,mb -8(\regs), %fr20
281 fldd,mb -8(\regs), %fr19
282 fldd,mb -8(\regs), %fr18
283 fldd,mb -8(\regs), %fr17
284 fldd,mb -8(\regs), %fr16
285 fldd,mb -8(\regs), %fr15
286 fldd,mb -8(\regs), %fr14
287 fldd,mb -8(\regs), %fr13
288 fldd,mb -8(\regs), %fr12
289 fldd,mb -8(\regs), %fr11
290 fldd,mb -8(\regs), %fr10
291 fldd,mb -8(\regs), %fr9
292 fldd,mb -8(\regs), %fr8
293 fldd,mb -8(\regs), %fr7
294 fldd,mb -8(\regs), %fr6
295 fldd,mb -8(\regs), %fr5
296 fldd,mb -8(\regs), %fr4
297 fldd,mb -8(\regs), %fr3
298 fldd,mb -8(\regs), %fr2
299 fldd,mb -8(\regs), %fr1
300 fldd,mb -8(\regs), %fr0
301 .endm
302
303#ifdef __LP64__
304 .macro callee_save
305 std,ma %r3, CALLEE_SAVE_FRAME_SIZE(%r30)
306 mfctl %cr27, %r3
307 std %r4, -136(%r30)
308 std %r5, -128(%r30)
309 std %r6, -120(%r30)
310 std %r7, -112(%r30)
311 std %r8, -104(%r30)
312 std %r9, -96(%r30)
313 std %r10, -88(%r30)
314 std %r11, -80(%r30)
315 std %r12, -72(%r30)
316 std %r13, -64(%r30)
317 std %r14, -56(%r30)
318 std %r15, -48(%r30)
319 std %r16, -40(%r30)
320 std %r17, -32(%r30)
321 std %r18, -24(%r30)
322 std %r3, -16(%r30)
323 .endm
324
325 .macro callee_rest
326 ldd -16(%r30), %r3
327 ldd -24(%r30), %r18
328 ldd -32(%r30), %r17
329 ldd -40(%r30), %r16
330 ldd -48(%r30), %r15
331 ldd -56(%r30), %r14
332 ldd -64(%r30), %r13
333 ldd -72(%r30), %r12
334 ldd -80(%r30), %r11
335 ldd -88(%r30), %r10
336 ldd -96(%r30), %r9
337 ldd -104(%r30), %r8
338 ldd -112(%r30), %r7
339 ldd -120(%r30), %r6
340 ldd -128(%r30), %r5
341 ldd -136(%r30), %r4
342 mtctl %r3, %cr27
343 ldd,mb -CALLEE_SAVE_FRAME_SIZE(%r30), %r3
344 .endm
345
346#else /* ! __LP64__ */
347
348 .macro callee_save
349 stw,ma %r3, CALLEE_SAVE_FRAME_SIZE(%r30)
350 mfctl %cr27, %r3
351 stw %r4, -124(%r30)
352 stw %r5, -120(%r30)
353 stw %r6, -116(%r30)
354 stw %r7, -112(%r30)
355 stw %r8, -108(%r30)
356 stw %r9, -104(%r30)
357 stw %r10, -100(%r30)
358 stw %r11, -96(%r30)
359 stw %r12, -92(%r30)
360 stw %r13, -88(%r30)
361 stw %r14, -84(%r30)
362 stw %r15, -80(%r30)
363 stw %r16, -76(%r30)
364 stw %r17, -72(%r30)
365 stw %r18, -68(%r30)
366 stw %r3, -64(%r30)
367 .endm
368
369 .macro callee_rest
370 ldw -64(%r30), %r3
371 ldw -68(%r30), %r18
372 ldw -72(%r30), %r17
373 ldw -76(%r30), %r16
374 ldw -80(%r30), %r15
375 ldw -84(%r30), %r14
376 ldw -88(%r30), %r13
377 ldw -92(%r30), %r12
378 ldw -96(%r30), %r11
379 ldw -100(%r30), %r10
380 ldw -104(%r30), %r9
381 ldw -108(%r30), %r8
382 ldw -112(%r30), %r7
383 ldw -116(%r30), %r6
384 ldw -120(%r30), %r5
385 ldw -124(%r30), %r4
386 mtctl %r3, %cr27
387 ldw,mb -CALLEE_SAVE_FRAME_SIZE(%r30), %r3
388 .endm
389#endif /* ! __LP64__ */
390
391 .macro save_specials regs
392
393 SAVE_SP (%sr0, PT_SR0 (\regs))
394 SAVE_SP (%sr1, PT_SR1 (\regs))
395 SAVE_SP (%sr2, PT_SR2 (\regs))
396 SAVE_SP (%sr3, PT_SR3 (\regs))
397 SAVE_SP (%sr4, PT_SR4 (\regs))
398 SAVE_SP (%sr5, PT_SR5 (\regs))
399 SAVE_SP (%sr6, PT_SR6 (\regs))
400 SAVE_SP (%sr7, PT_SR7 (\regs))
401
402 SAVE_CR (%cr17, PT_IASQ0(\regs))
403 mtctl %r0, %cr17
404 SAVE_CR (%cr17, PT_IASQ1(\regs))
405
406 SAVE_CR (%cr18, PT_IAOQ0(\regs))
407 mtctl %r0, %cr18
408 SAVE_CR (%cr18, PT_IAOQ1(\regs))
409
410#ifdef __LP64__
411 /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
412 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
413 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
414 * we lose the 6th bit on a save/restore over interrupt.
415 */
416 mfctl,w %cr11, %r1
417 STREG %r1, PT_SAR (\regs)
418#else
419 SAVE_CR (%cr11, PT_SAR (\regs))
420#endif
421 SAVE_CR (%cr19, PT_IIR (\regs))
422
423 /*
424 * Code immediately following this macro (in intr_save) relies
425 * on r8 containing ipsw.
426 */
427 mfctl %cr22, %r8
428 STREG %r8, PT_PSW(\regs)
429 .endm
430
431 .macro rest_specials regs
432
433 REST_SP (%sr0, PT_SR0 (\regs))
434 REST_SP (%sr1, PT_SR1 (\regs))
435 REST_SP (%sr2, PT_SR2 (\regs))
436 REST_SP (%sr3, PT_SR3 (\regs))
437 REST_SP (%sr4, PT_SR4 (\regs))
438 REST_SP (%sr5, PT_SR5 (\regs))
439 REST_SP (%sr6, PT_SR6 (\regs))
440 REST_SP (%sr7, PT_SR7 (\regs))
441
442 REST_CR (%cr17, PT_IASQ0(\regs))
443 REST_CR (%cr17, PT_IASQ1(\regs))
444
445 REST_CR (%cr18, PT_IAOQ0(\regs))
446 REST_CR (%cr18, PT_IAOQ1(\regs))
447
448 REST_CR (%cr11, PT_SAR (\regs))
449
450 REST_CR (%cr22, PT_PSW (\regs))
451 .endm
452
453#endif /* __ASSEMBLY__ */
454#endif