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authorDavid S. Miller <davem@davemloft.net>2005-06-02 15:55:50 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2005-06-28 00:52:45 -0400
commite24c2d963a604d9eaa560c90371fa387d3eec8f1 (patch)
tree66be193d59dd22fac0b62980769c4f19e045b5a2 /include/asm-mips
parent2311b1f2bbd36fa5f366a7448c718b2556e0f02c (diff)
[PATCH] PCI: DMA bursting advice
After seeing, at best, "guesses" as to the following kind of information in several drivers, I decided that we really need a way for platforms to specifically give advice in this area for what works best with their PCI controller implementation. Basically, this new interface gives DMA bursting advice on PCI. There are three forms of the advice: 1) Burst as much as possible, it is not necessary to end bursts on some particular boundary for best performance. 2) Burst on some byte count multiple. A DMA burst to some multiple of number of bytes may be done, but it is important to end the burst on an exact multiple for best performance. The best example of this I am aware of are the PPC64 PCI controllers, where if you end a burst mid-cacheline then chip has to refetch the data and the IOMMU translations which hurts performance a lot. 3) Burst on a single byte count multiple. Bursts shall end exactly on the next multiple boundary for best performance. Sparc64 and Alpha's PCI controllers operate this way. They disconnect any device which tries to burst across a cacheline boundary. Actually, newer sparc64 PCI controllers do not have this behavior. That is why the "pdev" is passed into the interface, so I can add code later to check which PCI controller the system is using and give advice accordingly. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/pci.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index c9c576b48556..20b93bfa4565 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -130,6 +130,14 @@ extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
130extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, 130extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
131 dma64_addr_t dma_addr, size_t len, int direction); 131 dma64_addr_t dma_addr, size_t len, int direction);
132 132
133static inline void pci_dma_burst_advice(struct pci_dev *pdev,
134 enum pci_dma_burst_strategy *strat,
135 unsigned long *strategy_parameter)
136{
137 *strat = PCI_DMA_BURST_INFINITY;
138 *strategy_parameter = ~0UL;
139}
140
133extern void pcibios_resource_to_bus(struct pci_dev *dev, 141extern void pcibios_resource_to_bus(struct pci_dev *dev,
134 struct pci_bus_region *region, struct resource *res); 142 struct pci_bus_region *region, struct resource *res);
135 143